1# Facebook Monolith 2 3This page describes how to run coreboot on the Facebook Monolith. 4 5Please note: the coreboot implementation for this board is in its 6Beta state and isn't fully tested yet. 7 8## Required blobs 9 10Mainboard is based on the Intel Kaby Lake U SoC. 11Intel company provides [Firmware Support Package (2.0)](../../soc/intel/fsp/index.md) 12(intel FSP 2.0) to initialize this generation silicon. Please see this 13[document](../../soc/intel/code_development_model/code_development_model.md). 14 15FSP Information: 16 17```{eval-rst} 18+-----------------------------+-------------------+-------------------+ 19| FSP Project Name | Directory | Specification | 20+-----------------------------+-------------------+-------------------+ 21| 7th Generation Intel® Core™ | KabylakeFspBinPkg | 2.0 | 22| processors and chipsets | | | 23| (formerly Kaby Lake) | | | 24+-----------------------------+-------------------+-------------------+ 25``` 26 27Microcode: 3rdparty/intel-microcode/intel-ucode 28 29## Flash components 30 31To create a complete flash image, the flash descriptor, GBE and ME blobs are required. The 32complete image can be used when e.g. a blank flash should be programmed. In other cases (when 33only coreboot needs to be replaced) placeholders can be used for the GBE and ME regions. 34 35These can be extracted from the original flash image as follows: 361) Read the complete image from flash. 372) Create a layout file with the following content: 38``` 3900000000:00000fff fd 4000700000:00ffffff bios 4100003000:006FFFFF me 4200001000:00002fff gbe 43``` 443) Use `ifdtool -n <layout_file> <flash_image>` to resize the *bios* region from the default 6 MiB 45 to 9 MiB, this is required to create sufficient space for LinuxBoot. 46 NOTE: Please make sure only the firmware descriptor (*fd*) region is changed. Older versions 47 of the ifdtool corrupt the *me* region. 484) Use `ifdtool -x <resized_flash_image>` to extract the components. 49 50The regions extracted can be used to generate a full flash image. The *bios* region is 51not needed as this is replaced by the coreboot image. 52 53NOTE: The gbe region contains the MAC address so be careful. When updating the flash using 54 flashrom it is advisable to leave out the *gbe* area. 55 56## Flashing coreboot 57 58### Internal programming 59 60The SPI flash can be accessed using [flashrom]. 61 62The descriptor area needs to be updated once to resize the *bios* region. 63`flashrom -p internal --ifd -i fd -w <coreboot.bin>` 64 65After that only the bios area should to be updated. 66`flashrom -p internal --ifd -i bios -w <coreboot.bin>` 67 68The *gbe* and *me* regions should not be updated. 69 70NOTE: As `flashrom --ifd` uses the flash descriptor it is required to update the 71 descriptor and bios regions in the right sequence. Don't update both in one command. 72 73### External programming 74 75The system has an internal flash chip which is a 16 MiB soldered SOIC-8 chip. 76Specifically, it's a Winbond W25Q128JVSIQ (3.3V). 77 78The system has an external flash chip which is a 16 MiB soldered SOIC-8 chip. 79Specifically, it's a Winbond W25Q128JVSIM (3.3V). 80 81Flashing of these devices is very difficult, disassembling the system destroys the cooling 82solution. Wires need to be connected to be able to flash using an external programmer. 83 84## Known issues 85 86- None 87 88## Untested 89 90- Hardware monitor 91- Full Embedded Controller support 92- SATA 93- xDCI 94 95## Working 96 97- USB 98- Gigabit Ethernet (i219 and i210) 99- Graphics (Using FSP GOP) 100- flashrom 101- PCIe including hotplug on FPGA root port 102- EC serial port 103- EC CPU temperature 104- SMBus 105- Initialization with FSP 106- SeaBIOS payload (commit a5cab58e9a3fb6e168aba919c5669bea406573b4) 107- edk2 payload (commit 860a8d95c2ee89c9916d6e11230f246afa1cd629) 108- LinuxBoot (kernel kernel-4_19_97) (uroot commit 9c9db9dbd6b532f5f91a511a0de885c6562aadd7) 109- eMMC 110 111All of the above has been briefly tested by booting Linux from eMMC using the edk2 payload 112and LinuxBoot. 113 114SeaBios has been checked to the extend that it runs to the boot selection and provides display 115output. 116 117## Technology 118 119```{eval-rst} 120+------------------+--------------------------------------------------+ 121| SoC | Intel Kaby Lake U | 122+------------------+--------------------------------------------------+ 123| CPU | Intel i3-7100U | 124+------------------+--------------------------------------------------+ 125| Super I/O, EC | ITE8528 | 126+------------------+--------------------------------------------------+ 127| Coprocessor | Intel Management Engine | 128+------------------+--------------------------------------------------+ 129``` 130 131[W25Q128JVSIQ]: https://www.winbond.com/resource-files/w25q128jv%20revf%2003272018%20plus.pdf 132[W25Q128JVSIM]: https://www.winbond.com/resource-files/w25q128jv%20dtr%20revb%2011042016.pdf 133[flashrom]: https://flashrom.org/Flashrom 134