1# ASUS P3B-F 2 3This page describes how to run coreboot on the ASUS P3B-F mainboard. 4 5## Flashing coreboot 6 7```{eval-rst} 8+---------------------+---------------------------+ 9| Type | Value | 10+=====================+===========================+ 11| Model | SST 39SF020A (or similar) | 12+---------------------+---------------------------+ 13| Protocol | Parallel | 14+---------------------+---------------------------+ 15| Size | 256 KiB | 16+---------------------+---------------------------+ 17| Package | DIP-32 | 18+---------------------+---------------------------+ 19| Socketed | yes | 20+---------------------+---------------------------+ 21| Write protection | See below | 22+---------------------+---------------------------+ 23| Internal flashing | yes | 24+---------------------+---------------------------+ 25``` 26 27flashrom supports this mainboard since commit c7e9a6e15153684672bbadd1fc6baed8247ba0f6. 28If you are using older versions of flashrom, below has to be done (with ACPI disabled!) 29before flashrom can detect the flash chip: 30 31```bash 32 # rmmod w83781d 33 # modprobe i2c-dev 34 # i2cset 0 0x48 0x80 0x80 35``` 36 37Upon power up, flash chip is inaccessible until flashrom has been run once. 38Since flashrom does not support reversing board enabling steps, 39once it detects the flash chip, there will be no write protection until 40the next power cycle. 41 42### CPU microcode considerations 43 44By default, this board includes microcode updates for 5 families of Intel CPUs 45because of the wide variety of CPUs the board supports, directly or with an 46adapter. These take up a third of the total flash space leaving only 20kB free 47in the final cbfs image. It may be necessary to build a custom microcode update 48file by manually concatenating files in 3rdparty/intel-microcode/intel-ucode 49for only CPU models that the board will actually be run with. 50 51## Working 52 53- Slot 1 and Socket 370 CPUs and their L1/L2 caches 54- PS/2 keyboard with SeaBIOS (See [Known issues]) 55- IDE hard drives 56- USB 57- PCI add-on cards 58- AGP graphics cards 59- Serial ports 1 and 2 60- Reboot 61 62## Known issues 63 64- PS/2 keyboard may not be usable until Linux has completely booted. With SeaBIOS 65 as payload, setting keyboard initialization timeout to 2500ms may help. 66 67- The coreboot+SeaBIOS combination boots so quickly some IDE hard drives are not 68 yet ready by the time SeaBIOS attempts to boot from them. 69 70- i440BX does not support 256Mbit RAM modules. If installed, coreboot 71 will attempt to initialize them at half their capacity anyway 72 whereas vendor firmware will not boot at all. 73 74- ECC memory can be used, but ECC support is still pending. 75 76## Untested 77 78- Floppy 79- Parallel port 80- EDO memory 81- ECC memory 82- Infrared 83- PC speaker 84 85## Not working 86 87- ACPI (Support is currently [under gerrit review](https://review.coreboot.org/c/coreboot/+/41098)) 88 89## Technology 90 91```{eval-rst} 92+------------------+--------------------------------------------------+ 93| Northbridge | Intel I440BX | 94+------------------+--------------------------------------------------+ 95| Southbridge | i82371eb | 96+------------------+--------------------------------------------------+ 97| CPU | P6 family for Slot 1 and Socket 370 | 98| | (all models from model_63x to model_6bx) | 99+------------------+--------------------------------------------------+ 100| Super I/O | winbond/w83977tf | 101+------------------+--------------------------------------------------+ 102``` 103 104## Extra resources 105 106[flashrom]: https://flashrom.org/Flashrom 107