1# ASRock H110M-DVS 2 3This page describes how to run coreboot on the [ASRock H110M-DVS]. 4 5## Required proprietary blobs 6 7Mainboard is based on Intel Skylake/Kaby Lake processor and H110 Chipset. 8Intel company provides [Firmware Support Package (2.0)](../../soc/intel/fsp/index.md) 9(intel FSP 2.0) to initialize this generation silicon. Please see this 10[document](../../soc/intel/code_development_model/code_development_model.md). 11 12FSP Information: 13 14```{eval-rst} 15+-----------------------------+-------------------+-------------------+ 16| FSP Project Name | Directory | Specification | 17+-----------------------------+-------------------+-------------------+ 18| 7th Generation Intel® Core™ | KabylakeFspBinPkg | 2.0 | 19| processors and chipsets | | | 20| (formerly Kaby Lake) | | | 21+-----------------------------+-------------------+-------------------+ 22``` 23 24## Building coreboot 25 26The following steps set the default parameters for this board to build a 27fully working image: 28 29```bash 30make distclean 31touch .config 32./util/scripts/config --enable VENDOR_ASROCK 33./util/scripts/config --enable BOARD_ASROCK_H110M_DVS 34./util/scripts/config --set-str REALTEK_8168_MACADDRESS "xx:xx:xx:xx:xx:xx" 35make olddefconfig 36``` 37 38However, it is strongly advised to use `make menuconfig` afterwards 39(or instead), so that you can see all of the settings. 40 41Use the following command to disable the serial console if debugging 42output is not required: 43 44```bash 45./util/scripts/config --disable CONSOLE_SERIAL 46``` 47 48However, a more flexible method is to change the console log level from 49within an OS using `util/nvramtool`, or with the `nvramcui` payload. 50 51Now, run `make` to build the coreboot image. 52 53## Flashing coreboot 54 55### Internal programming 56 57The main SPI flash can be accessed using [flashrom]. By default, only 58the BIOS region of the flash is writable. If you wish to change any 59other region, such as the Management Engine or firmware descriptor, then 60an external programmer is required (unless you find a clever way around 61the flash protection). More information about this [here](../../tutorial/flashing_firmware/index.md). 62 63### External programming 64 65The flash chip is a 8 MiB socketed DIP-8 chip. Specifically, it's a 66Macronix MX25L6473E, whose datasheet can be found [here][MX25L6473E]. 67The chip is located to the bottom right-hand side of the board. For 68a precise location, refer to section 1.3 (Motherboard Layout) of the 69[H110M-DVS manual], where the chip is labelled "64Mb BIOS". Take note of 70the chip's orientation, remove it from its socket, and flash it with 71an external programmer. For reference, the notch in the chip should be 72facing towards the bottom of the board. 73 74## Known issues 75 76- The VGA port doesn't work. Discrete graphic card is used as primary 77 device for display output (if CONFIG_ONBOARD_VGA_IS_PRIMARY is not 78 set). Dynamic switching between iGPU and PEG is not yet supported. 79 80- SuperIO GPIO pin is used to reset Realtek chip. However, since the 81 Logical Device 7 (GPIO6, GPIO7, GPIO8) is not initialized, the network 82 chip is in a reset state all the time. 83 84## Untested 85 86- parallel port 87- PS/2 keyboard 88- PS/2 mouse 89- EHCI debug 90- TPM 91- infrared module 92- chassis intrusion header 93- chassis speaker header 94 95## Working 96 97- integrated graphics init with libgfxinit (see [Known issues](#known-issues)) 98- PCIe x1 99- PEG x16 Gen3 100- SATA 101- USB 102- serial port 103- onboard audio 104- using `me_cleaner` 105- using `flashrom` 106 107## TODO 108 109- NCT6791D GPIOs 110- onboard network (see [Known issues](#known-issues)) 111- S3 suspend/resume 112- Wake-on-LAN 113- hardware monitor 114 115## Technology 116 117```{eval-rst} 118+------------------+--------------------------------------------------+ 119| CPU | Intel Skylake/Kaby Lake (LGA1151) | 120+------------------+--------------------------------------------------+ 121| PCH | Intel Sunrise Point H110 | 122+------------------+--------------------------------------------------+ 123| Super I/O | Nuvoton NCT6791D | 124+------------------+--------------------------------------------------+ 125| EC | None | 126+------------------+--------------------------------------------------+ 127| Coprocessor | Intel Management Engine | 128+------------------+--------------------------------------------------+ 129``` 130 131[ASRock H110M-DVS]: https://www.asrock.com/mb/Intel/H110M-DVS%20R2.0/ 132[MX25L6473E]: http://www.macronix.com/Lists/Datasheet/Attachments/7380/MX25L6473E,%203V,%2064Mb,%20v1.4.pdf 133[flashrom]: https://flashrom.org/Flashrom 134[H110M-DVS manual]: https://web.archive.org/web/20191023230631/http://asrock.pc.cdn.bitgravity.com/Manual/H110M-DVS%20R2.0.pdf 135