1# Firmware and Computer Acronyms, Initialisms and Definitions 2 3 4## _0-9 5 6* _XXX - An underscore followed by 3 uppercase letters will typically be 7an ACPI specified method. Look in the [ACPI 8Spec](https://uefi.org/specifications) for details, or run the tool 9`acpihelp _XXX` 10* 2FA - [**Two-factor Authentication**](https://en.wikipedia.org/wiki/Multi-factor_authentication) 11* 4G - In coreboot, this typically refers to the 4 gibibyte boundary of 32-bit addressable memory space. 12 Better abbreviated as 4GiB 13* 5G - Telecommunication: [**Fifth-Generation Cellular Network**](https://en.wikipedia.org/wiki/5G) 14 15## A 16* ABI - [**Application Binary Interface**](https://en.wikipedia.org/wiki/Application_binary_interface) 17* ABL - AMD: AGESA BootLoader (or AMD BootLoader) - The portion of the AMD processor 18 initialization that happens from the PSP. Significantly, Memory 19 Initialization. 20* AC - Electricity: [**Alternating Current**](https://en.wikipedia.org/wiki/Alternating_current) 21* Ack - Acknowledgment / Acknowledged 22* ACM – [**Authenticated Code Module**](https://doc.coreboot.org/security/intel/acm.html) 23* ACP - [**Average CPU power**](https://en.wikipedia.org/wiki/Thermal_design_power) 24* ACPI - The [**Advanced Configuration and Power 25 Interface**](http://en.wikipedia.org/wiki/Advanced_Configuration_and_Power_Interface) 26 is an industry standard for letting the OS control power management. 27 * [https://uefi.org/specifications](https://uefi.org/specifications) 28 * [http://kernelslacker.livejournal.com/88243.html](http://kernelslacker.livejournal.com/88243.html) 29* ADC - [**Analog-to-Digital Converter**](https://en.wikipedia.org/wiki/Analog-to-digital_converter) 30* ADL - Intel: [**Alder Lake**](https://en.wikichip.org/wiki/intel/microarchitectures/alder_lake) 31* AES - [**Advanced Encryption Standard**](https://en.wikipedia.org/wiki/Advanced_Encryption_Standard) 32* AESKL - Intel: AES Key Locker 33* AGESA - [**AMD Generic Encapsulated Software Architecture**](https://en.wikipedia.org/wiki/AGESA_) 34* AGP - The [**Accelerated Graphics 35 Port**](https://en.wikipedia.org/wiki/Accelerated_Graphics_Port) is an 36 older (1997-2004) point-to-point bus for video cards to communicate 37 with the processor. 38* AHCI - The [**Advanced Host Controller 39 Interface**](https://en.wikipedia.org/wiki/Advanced_Host_Controller_Interface) 40 is a standard register set for communicating with a SATA controller. 41 * [http://www.intel.com/technology/serialata/ahci.htm](http://www.intel.com/technology/serialata/ahci.htm) 42 * [http://download.intel.com/technology/serialata/pdf/rev1_3.pdf](http://download.intel.com/technology/serialata/pdf/rev1_3.pdf) 43* AIC - Add-in Card 44* AIO - Computer formfactor: [**All In One**](https://en.wikipedia.org/wiki/Desktop_computer#All-in-one) 45* ALIB - AMD: ACPI-ASL Library 46* ALS - [**Ambient Light Sensor**](https://en.wikipedia.org/wiki/Ambient_light_sensor) 47* ALU - [**Arithmetic Logic Unit**](https://en.wikipedia.org/wiki/Arithmetic_logic_unit) 48* AMBA - ARM: [**Advanced Microcontroller Bus 49 Architecture**](https://en.wikipedia.org/wiki/Advanced_Microcontroller_Bus_Architecture): 50 An open standard to connect and manage functional blocks in an SoC 51 (System on a Chip) 52* AMD64 - Another name for [**x86-64**](https://en.wikipedia.org/wiki/X86-64) 53* AMD-Vi AMD: The AMD name for their IOMMU implementation 54* AMPL - AMD: [**Advanced Platform Management Link**](https://web.archive.org/web/20220509053546/https://developer.amd.com/wordpress/media/2012/10/419181.pdf) - Also referred to as 55 SBI: Sideband Interface 56* AMT - Intel: [**Active Management Technology**](https://en.wikipedia.org/wiki/Intel_Active_Management_Technology) 57* ANSI - [**American National Standards Institute**](https://en.wikipedia.org/wiki/American_National_Standards_Institute) 58* AOAC - AMD: Always On, Always Connected 59* AP - Application processor - The main processor on the board (as 60 opposed to the embedded controller or other processors that may be on 61 the system), any cores in the processor chip that aren't the BSP (Boot 62 Strap Processor). 63* APCB - AMD: AMD PSP Customization Block 64* API - [**Application Programming Interface**](https://en.wikipedia.org/wiki/API) 65* APIC - [**Advanced Programmable Interrupt 66 Controller**](https://en.wikipedia.org/wiki/Advanced_Programmable_Interrupt_Controller) 67 this is an advanced version of a PIC that can handle interrupts from 68 and for multiple CPUs. Modern systems usually have several APICs: 69 Local APICs (LAPIC) are CPU-bound, IO-APICs are bridge-bound. 70 * [http://osdev.berlios.de/pic.html](http://osdev.berlios.de/pic.html) 71* APL - Intel: [**Apollo Lake**](https://en.wikichip.org/wiki/intel/cores/apollo_lake) 72* APM - [**Advanced Power Management**](https://en.wikipedia.org/wiki/Advanced_Power_Management) - The standard for power management 73 before ACPI (Yes, they’re both advanced). APM was managed entirely by 74 the firmware and the operating system had no control or even awareness 75 of the power management. 76* APOB - AMD: [**AGESA PSP Output Buffer**](https://doc.coreboot.org/soc/amd/family17h.html#additional-definitions) 77* APU - AMD: [**Accelerated Processing Unit**](https://en.wikipedia.org/wiki/AMD_Accelerated_Processing_Unit) 78* ARC - HDMI: [**Audio Return Channel**](https://en.wikipedia.org/wiki/HDMI#ARC) 79* ARM - [**Advanced RISC Machines**](https://en.wikipedia.org/wiki/Arm_%28company%29) - Originally Acorn RISC Machine. This 80 may refer to either the company or the instruction set. 81* ARP - Networking: [**Address Resolution Protocol**](https://en.wikipedia.org/wiki/Address_Resolution_Protocol) 82* ASCII - [**American Standard Code for Information Interchange**](https://en.wikipedia.org/wiki/ASCII) 83* ASEG - The A_0000h-B_FFFFh memory segment - this area was typically 84 hidden by the Video BIOS 85* ASF - [**Alert Standard Format**](https://en.wikipedia.org/wiki/Alert_Standard_Format) 86* ASL - [**ACPI Source Language**](https://uefi.org/htmlspecs/ACPI_Spec_6_4_html/19_ASL_Reference/ACPI_Source_Language_Reference.html) 87* ASLR - Address Space Layout Randomization 88* ASP - AMD: AMD Security Processor (Formerly the PSP - Platform 89 Security Processor) 90* ASPM - PCI: [**Active State Power 91 Management**](https://en.wikipedia.org/wiki/Active_State_Power_Management) 92* ATA - [**Advanced Technology Attachment**](https://en.wikipedia.org/wiki/Parallel_ATA) 93* ATS - PCIe: Address Translation Services 94* ATAPI - [**ATA Packet Interface**](https://en.wikipedia.org/wiki/Parallel_ATA#ATAPI) 95* ATX - [**Advanced Technology eXtended**](https://en.wikipedia.org/wiki/ATX) 96* AVX - [**Advanced Vector Extensions**](https://en.wikipedia.org/wiki/Advanced_Vector_Extensions) 97 98 99## B 100 101* BAR - [**Base Address Register**](https://en.wikipedia.org/wiki/Base_Address_Register) This generally refers to one of the 102 base address registers in the PCI config space of a PCI device 103* Baud - [**Baud**](https://en.wikipedia.org/wiki/Baud) - Not an acronym - Symbol rate unit of symbols per second, named 104 after Émile Baudot 105* BBS - [**BIOS boot specification**](https://en.wikipedia.org/wiki/Option_ROM#BIOS_Boot_Specification) 106* BCD - [**Binary-Coded Decimal**](https://en.wikipedia.org/wiki/Binary-coded_decimal) 107* BCT - Intel: [**Binary Configuration Tool**](https://github.com/intel/BCT) 108* BDA - [**BIOS Data Area**](http://www.bioscentral.com/misc/bda.htm) This refers to the memory area of 0x40:0000 which is where the original PC-BIOS stored its data tables. 109* BDF - [**BUS, Device, Function**](https://en.wikipedia.org/wiki/PCI_configuration_space#Technical_information) - A way of referencing a PCI Device 110 function address. 111* BDS - UEFI: [**Boot-Device Select**](https://en.wikipedia.org/wiki/Unified_Extensible_Firmware_Interface#BDS_%E2%80%93_Boot_Device_Select) 112* BDW - Intel: [**Broadwell**](https://en.wikichip.org/wiki/intel/microarchitectures/broadwell_%28client%29) 113* BERT - ACPI: [**Boot Error Record Table**](https://uefi.org/specs/ACPI/6.4/18_ACPI_Platform_Error_Interfaces/error-source-discovery.html) 114* BGA - [**Ball Grid Array**](https://en.wikipedia.org/wiki/Ball_grid_array) 115* BGP - Networking: [**Border Gateway Protocol**](https://en.wikipedia.org/wiki/Border_Gateway_Protocol) 116* Big Real mode - Real mode running in a way that allows it to access 117 the entire 4GiB of the 32-bit address space. Also known as flat mode 118 or [**Unreal mode**](https://en.wikipedia.org/wiki/Unreal_mode). 119* BIOS - [**Basic Input/Output 120 System**](https://en.wikipedia.org/wiki/BIOS) 121* BIST - The [**Built-in Self Test**](https://en.wikipedia.org/wiki/Built-in_self-test) is a test run by the processor on 122 itself when it is first started. Usually, any nonzero value indicates 123 that the selftest failed. 124* Bit-banging - [**Bit-banging**](https://en.wikipedia.org/wiki/Bit_banging) - A term for the method of emulating a more complex 125 protocol by using GPIOs. 126* BKDG - AMD: [**Bios & Kernel Developers' guide**](https://en.wikichip.org/wiki/amd/List_of_AMD_publications) (Replaced by the PPR - 127 Processor Programming Reference) 128* BLOB - [**Binary Large OBject**](https://en.wikipedia.org/wiki/Binary_large_object) - Originally a collection of binary files 129 stored as a single object, this was co-opted by the open source 130 communities to mean any proprietary binary file that is not available 131 as source code. 132* BM - [**Bus Master**](https://en.wikipedia.org/wiki/Bus_mastering) 133* BMC - [**Baseboard Management Controller**](https://en.wikipedia.org/wiki/Intelligent_Platform_Management_Interface#Baseboard_management_controller) 134* BMP - [**Bitmap**](https://en.wikipedia.org/wiki/BMP_file_format) 135* BOM - [**Bill of Materials**](https://en.wikipedia.org/wiki/Bill_of_materials) 136* BPDT - Boot Partition Description Table 137* bps - Bits Per Second 138* BS - coreboot: Boot State - coreboot's ramstage sequence are made up 139 of boot states. Each of these states can be hooked to run functions 140 before the stat, during the state, or after the state is complete. 141* BSF - Intel: [**Boot Specification File**](https://www.intel.com/content/dam/develop/external/us/en/documents/boot-setting-1-0-820293.pdf) 142* BSP - BootStrap Processor - The initialization core of the main 143 system processor. This is the processor core that starts the boot 144 process. 145* BSS - [**Block Starting Symbol**](https://en.wikipedia.org/wiki/.bss) 146* BT - [**Bluetooth**](https://en.wikipedia.org/wiki/Bluetooth) 147* Bus - Initially a term for a number of connectors wired together in 148 parallel, this is now used as a term for any hardware communication 149 method. 150* BWG - Intel: BIOS Writers Guide 151 152 153## C 154* C-states: ACPI Processor Idle states. 155 [**C-States**](https://en.wikichip.org/wiki/acpi/c-states) C0-Cx: Each 156 higher number saves more power, but takes longer to return to a fully 157 running processor. 158* C0 - ACPI Defined Processor Idle state: Active - CPU is running 159* C1 - ACPI Defined Processor Idle state: Halt - Nothing currently 160 running, but can start running again immediately 161* C2 - ACPI Defined Processor Idle state: Stop-clock - core clocks off 162* C3 - ACPI Defined Processor Idle state: Sleep - L1 & L2 caches may be 163 saved to Last Level Cache (LLC), core powered down. 164* C4+ - Processor Specific idle states 165* CAR - [**Cache As RAM**](https://web.archive.org/web/20140818050214/https://www.coreboot.org/data/yhlu/cache_as_ram_lb_09142006.pdf) 166* CBFS - coreboot filesystem 167* CBMEM - coreboot Memory 168* CBI - Google: [**CrOS Board Information**](https://chromium.googlesource.com/chromiumos/docs/+/HEAD/design_docs/cros_board_info.md) 169* CDN - [**Content Delivery Network**](https://en.wikipedia.org/wiki/Content_delivery_network) 170* CEM - PCIe: [**Card ElectroMechanical**](https://members.pcisig.com/wg/PCI-SIG/document/folder/839) specification 171* CFL - [**Coffee Lake**](https://en.wikichip.org/wiki/intel/microarchitectures/coffee_lake) 172* CID - [**Coverity ID**](https://en.wikipedia.org/wiki/Coverity) 173* CIM - [**Common Information Model**](https://www.dmtf.org/standards/cim) 174* CISC - [**Complex Instruction Set Computer**](https://en.wikipedia.org/wiki/Complex_instruction_set_computer) 175* CL - ChangeList - Another name for a patch or commit. This seems to be 176 Perforce notation. 177* CLK - Clock - Used when there isn't enough room for 2 additional 178 characters - similar to RST, for people who hate vowels. 179* CML - Intel: [**Comet Lake**](https://en.wikichip.org/wiki/intel/microarchitectures/comet_lake) 180* CMOS - [**Complementary Metal Oxide 181 Semiconductor**](https://en.wikipedia.org/wiki/Nonvolatile_BIOS_memory) 182 - This is a method of making ICs (Integrated Circuits). For BIOS, it’s 183 generally used to describe a section of NVRAM (Non-volatile RAM), in 184 this case a section battery-backed memory in the RTC (Real Time Clock) 185 that is typically used to store BIOS settings. 186 *[https://en.wikipedia.org/wiki/Nonvolatile_BIOS_memory](https://en.wikipedia.org/wiki/Nonvolatile_BIOS_memory) 187* CNL - Intel: [**Cannon Lake**](https://en.wikichip.org/wiki/intel/microarchitectures/cannon_lake) (formerly Skymont) 188* CNVi - Intel: [**Connectivity Integration**](https://en.wikipedia.org/wiki/CNVi) 189* CPL - x86: Current Privilege Level - Privilege levels range from 0-3; lower numbers are more privileged. 190* CPLD - [**Complex Programmable Logic Device**](https://en.wikipedia.org/wiki/Complex_programmable_logic_device) 191* CPPC - AMD: Collaborative Processor Performance Controls 192* CPS - Characters Per Second 193* CPU - [**Central Processing 194 Unit**](https://en.wikipedia.org/wiki/Central_processing_unit) 195* CPUID - x86: [**CPU Identification**](https://en.wikipedia.org/wiki/CPUID) opcode 196* Cr50 - Google: The first generation Google Security Chip (GSC) used on 197 ChromeOS devices. 198* CRB - Customer Reference Board 199* CRLF - Carriage Return, Line Feed - \\r\\n - The standard window EOL 200 (End-of-Line) marker. 201* crt0 - [**C Run Time 0**](https://en.wikipedia.org/wiki/Crt0) 202* crt0s - crt0 Source code 203* CRT - [**Cathode Ray Tube**](https://en.wikipedia.org/wiki/Cathode-ray_tube) 204* CSE - Intel: Converged Security Engine 205* CSI - MIPI: [**Camera Serial 206 Interface**](https://en.wikipedia.org/wiki/Camera_Serial_Interface) 207* CSME - Intel: Converged Security and Management Engine 208* CTLE - Intel: Continuous Time Linear Equalization 209* CVE - [**Common Vulnerabilities and Exposures**](https://en.wikipedia.org/wiki/Common_Vulnerabilities_and_Exposures) 210* CXMT - ChangXin Memory Technologies 211* CZN - AMD: [**Cezanne**](https://en.wikichip.org/wiki/amd/cores/cezanne) - CPU Family 19h, Model 50h 212 213 214## D 215 216* D$ - Data Cache 217* D-States - [**ACPI Device power 218 states**](https://en.wikipedia.org/wiki/Advanced_Configuration_and_Power_Interface#Device_states) 219 D0-D3 - These are device specific power states, with each higher 220 number requiring less power, and typically taking a longer time to get 221 back to D0, fully running. 222* D0 - ACPI Device power state: Active - Device fully on and running 223* D1 - ACPI Device power state: Lower power than D0 224* D2 - ACPI Device power state: Lower power than D1 225* D3 Hot - ACPI Device power state: Device is in a low power state, but 226 still has power. 227* D3 Cold - ACPI Device power state: Power is completely removed from 228 the device. 229* DASH - [**Desktop and mobile Architecture for System Hardware**](https://en.wikipedia.org/wiki/Desktop_and_mobile_Architecture_for_System_Hardware) 230* DB - DaughterBoard 231* DbC - USB: Debug Capability on the USB host controller 232* DC - Electricity: Direct Current 233* DCP - Digital Content Protection 234* DCR - **Decode Control Register** This is a way of identifying the 235 hardware in question. This is generally paired with a Vendor ID (VID) 236* DDC - [**Display Data Channel**](https://en.wikipedia.org/wiki/Display_Data_Channel) 237* DDI - Intel: Digital Display Interface 238* DDR - [**Double Data Rate**](https://en.wikipedia.org/wiki/Double_data_rate) 239* DEVAPC - Mediatek: Device Access Permission Control 240* DF - Data Fabric 241* DFP - USB: Downstream Facing port 242* DHCP - [**Dynamic Host Configuration Protocol**](https://en.wikipedia.org/wiki/Dynamic_Host_Configuration_Protocol) 243* DID - Device Identifier 244* DIMM - [**Dual Inline Memory Module**](https://en.wikipedia.org/wiki/DIMM) 245* DIP - [**Dual inline package**](https://en.wikipedia.org/wiki/Dual_in-line_package) 246* DMA - [**Direct Memory 247 Access**](https://en.wikipedia.org/wiki/Direct_memory_access) Allows 248 certain hardware subsystems within a computer to access system memory 249 for reading and/or writing independently of the main CPU. Examples of 250 systems that use DMA: Hard Disk Controller, Disk Drive Controller, 251 Graphics Card, Sound Card. DMA is an essential feature of all modern 252 computers, as it allows devices of different speeds to communicate 253 without subjecting the CPU to a massive interrupt load. 254* DMI - Direct Media Interface is a link/bus between CPU and PCH. 255* DMI - [**Desktop Management Interface**](https://en.wikipedia.org/wiki/Desktop_Management_Interface) 256* DMIC - Digital Microphone 257* DMTF - [**Distributed Management Task Force**](https://en.wikipedia.org/wiki/Distributed_Management_Task_Force) 258* DMZ - Demilitarized Zone 259* DNS - [**Domain Name Service**](https://en.wikipedia.org/wiki/Domain_Name_System) 260* DNV - Intel: [**Denverton**](https://en.wikichip.org/wiki/intel/cores/denverton) 261* DOS - Disk Operating System 262* DP - DisplayPort 263* DPM - Mediatek: DRAM Power Manager 264* DPTC - AMD: Dynamic Power and Thermal Control 265* DPTF - Intel: Dynamic Power and Thermal Framework 266* DRAM - Memory: [**Dynamic Random Access Memory**](https://en.wikipedia.org/wiki/Dynamic_random-access_memory) 267* DRTM - Dynamic Root of Trust for Measurement 268* DQ - Memory: Data I/O signals. On a D-flipflop, used for SRAM, the 269 data-in pin is generally referred to as D, and the data-out pin is Q, 270 thus the IO Data signal lines are referred to as DQ lines. 271* DQS - Memory: Data Q Strobe - Data valid signal for DDR memory. 272* DRM - [**Digital Rights 273 Management**](https://en.wikipedia.org/wiki/Digital_rights_management) 274* DRP - USB: Port than can be switched between either a Downstream facing (DFP) or 275 an Upstream Facing (UFP). 276* DRQ - DMA Request 277* DRTU - Intel: Diagnostics and Regulatory Testing Utility 278* DSDT - The [**Differentiated System Descriptor 279 Table**](http://acpi.sourceforge.net/dsdt/index.php), is generated by 280 BIOS and necessary for ACPI. Implementation of ACPI in coreboot needs 281 to be done in a "cleanroom" development process and **MAY NOT BE 282 COPIED** from an existing firmware to avoid legal issues. 283* DSC - [**Digital Signal Controller**](https://en.wikipedia.org/wiki/Digital_signal_controller) 284* DSL - [**Digital subscriber line**](https://en.wikipedia.org/wiki/Digital_subscriber_line) 285* DSP - [**Digital Signal Processor**](https://en.wikipedia.org/wiki/Digital_signal_processor) 286* DTB - U-Boot: Device Tree Binary 287* dTPM - Discrete TPM (Trusted Platform Module) - A separate TPM chip, 288 vs Integrated TPMs or fTPMs (Firmware TPMs). 289* DTS - U-Boot: Device Tree Source 290* DUT - Device Under Test 291* DvC - USB: Debug Capability on the USB Device (Device Capability) 292* DVFS - ARM: Dynamic Voltage and Frequency Scaling 293* DVI - [**Digital Video Interface**](https://en.wikipedia.org/wiki/Digital_Visual_Interface) 294* DVT - Production Timeline: Design Validation Test 295* DW - DesignWare: A portfolio of silicon IP blocks for sale by the 296 Synopsys company. Includes blocks like USB, MIPI, PCIe, HDMI, SATA, 297 I2c, memory controllers and more. 298* DXE - UEFI: [**Driver Execution Environment**](https://en.wikipedia.org/wiki/Unified_Extensible_Firmware_Interface#DXE_%E2%80%93_Driver_Execution_Environment_) 299* DXIO - AMD: Distributed CrossBar I/O 300 301 302## E 303 304* EAPD - Intel: [**External Amplifier Power Down**](https://web.archive.org/web/20210203194800/https://www.eeweb.com/hd-audio-eapd/) 305* EBDA - Extended BIOS Data Area 306* EBG - Intel: Emmitsburg PCH 307* ECC - [**Error Correction Code**](https://en.wikipedia.org/wiki/Error_correction_code) - Typically used to refer to a type of 308 memory that can detect and correct memory errors. 309* EDID - [**Extended Display Identification Data**](https://en.wikipedia.org/wiki/Extended_Display_Identification_Data) 310* EDK2 - EFI Development Kit 2 311* EDO - Memory: [**Extended Data 312 Out**](https://en.wikipedia.org/wiki/Dynamic_random-access_memory#Extended_data_out_DRAM) 313 - A DRAM standard introduced in 1994 that improved upon, but was 314 backwards compatible with FPM (Fast Page Mode) memory. 315* eDP - [**Embedded DisplayPort**](https://en.wikipedia.org/wiki/DisplayPort#eDP) 316* EDS - Intel: External Design Specification 317* EEPROM - [**Electrically Erasable Programmable ROM**](https://en.wikipedia.org/wiki/EEPROM) (common mistake: 318 electrical erasable programmable ROM). 319* EFI - [**Extensible Firmware Interface**](https://en.wikipedia.org/wiki/Unified_Extensible_Firmware_Interface) 320* EFS - AMD: Embedded Firmware Structure: The data structure that AMD processors look for first in the boot ROM to start the boot process. 321* EHCI - [**Enhanced Host Controller Interface**](https://en.wikipedia.org/wiki/Host_controller_interface_%28USB%2C_Firewire%29#EHCI) - USB 2.0 322* EHL - Intel: [**Elkhart Lake**](https://en.wikichip.org/wiki/intel/cores/elkhart_lake) 323* EIDE - Enhanced Integrated Drive Electronics 324* EMI - [**ElectroMagnetic 325 Interference**](https://en.wikipedia.org/wiki/Electromagnetic_interference) 326* eMMC - [**embedded MultiMedia 327 Card**](https://en.wikipedia.org/wiki/MultiMediaCard#eMMC) 328* EOP - End of POST 329* EOL - End of Life 330* EPP - Intel: Energy-Performance Preference 331* EPROM - Erasable Programmable Read-Only Memory 332* EROFS - Linux: [**Enhanced Read-Only File System**](https://en.wikipedia.org/wiki/EROFS) 333* ESD - Electrostatic discharge 334* eSPI - Enhanced System Peripheral Interface 335* EVT - Production Timeline: Engineering Validation Test 336 337 338## F 339 340* FADT - ACPI Table: Fixed ACPI Description Table 341* FAE - Field Application Engineer 342* FAT - File Allocation Table 343* FBVDDQ - Nvidia Power: Framebuffer Voltage 344* FCH - AMD: Firmware Control Hub 345* FCS - Production Timeline: First Customer Shipment 346* FDD - Floppy Disk Drive 347* FFS - UEFI: Firmware File System 348* FIFO - First In, First Out 349* FIT - Intel: Firmware Interface Table 350* FIT - Flattened-Image Tree 351* FIVR - Intel: Fully Integrated Voltage Regulators 352* Flashing - Flashing means the writing of flash memory. The BIOS on 353 modern mainboards is stored in a NOR flash EEPROM chip. 354* Flat mode - Real mode running in a way that allows it to access the 355 entire 4GiB of the 32-bit address space. Also known as Unreal mode or 356 Big Real mode 357* FMAP - coreboot: [**Flash map**](https://doc.coreboot.org/lib/flashmap.html) 358* FPDT - ACPI: Firmware Performance Data Table 359* FPGA - [**Field-Programmable Gate Array**](https://en.wikipedia.org/wiki/Field-programmable_gate_array) 360* Framebuffer - The 361 [**framebuffer**](https://en.wikipedia.org/wiki/Framebuffer) is a part 362 of RAM in a computer which is allocated to hold the graphics 363 information for one frame or picture. This information typically 364 consists of color values for every pixel on the screen. A framebuffer 365 is either: 366 * Off-screen, meaning that writes to the framebuffer don't appear on 367 the visible screen. 368 * On-screen, meaning that the framebuffer is directly coupled to the 369 visible display. 370* FPM - Memory: [**Fast Page Mode**](https://en.wikipedia.org/wiki/Dynamic_random-access_memory#Page_mode_DRAM) - A DRAM standard introduced in 1990. 371* FPU - [**Floating-Point Unit**](https://en.wikipedia.org/wiki/Floating-point_unit) 372* FSB - [**Front-Side Bus**](https://en.wikipedia.org/wiki/Front-side_bus) 373* FSM - Finite State Machine 374* FSP - Intel: Firmware Support Package 375* FSR - Intel: Firmware Status Register 376* FTP - Network Protocol: [**File Transfer Protocol**](https://en.wikipedia.org/wiki/File_Transfer_Protocol) 377* fTPM - Firmware TPM (Trusted Platform Module). This is a TPM that is 378 based in firmware instead of actual hardware. It typically runs in 379 some sort of TEE (Trusted Execution Environment). 380* FWCM Intel: firmware Connection Manager 381* FWID - Firmware Identifier 382 383 384## G 385 386* G0 - ACPI Global Power State: System is running 387* G0-G3 - ACPI Global Power States 388* G1 - ACPI Global Power State: System is suspended 389* G2 - ACPI Global Power State: Soft power-off. The mainboard is off, 390 but can be woken up electronically, by a button, wake-on-lan, a 391 keypress, or some other method. 392* G3 - ACPI Global Power State: Mechanical Off. There is no power going 393 to the system except for a small battery to keep the CMOS contents, 394 Real Time Clock, and maybe a few other registers running. 395* GART - AMD: [**Graphics Address Remapping Table**](https://en.wikipedia.org/wiki/Graphics_address_remapping_table) 396* GATT - Graphics Aperture Translation Table 397* GDT - [Global Descriptor Table](https://wiki.osdev.org/Global_Descriptor_Table) 398* GLK - Intel: [**Gemini Lake**](https://en.wikichip.org/wiki/intel/cores/gemini_lake) 399* GMA - Intel: [**Graphics Media 400 Accelerator**](https://en.wikipedia.org/wiki/Intel_GMA) 401* GNB - Graphics NorthBridge 402* GND - Power: Ground 403* GNVS - Global Non-Volatile Storage 404* GPD - PCH GPIO in Deep Sleep well (D5 power) 405* GPE - ACPI: General Purpose Event 406* GPI - GPIOs: GPIO Input 407* GPIO - [**General Purpose Input/Output**](https://en.wikipedia.org/wiki/General-purpose_Input/Output) (Pin) 408* GPMR - Intel: General Purpose Memory Range 409* GPO - GPIOs: GPIO Output 410* GPP - AMD: General Purpose (PCI/PCIe) port 411* GPP - Intel: PCH GPIO in Primary Well (S0 power only) 412* GPS - Nvidia: GPU Performance Scale 413* GPT - UEFI: [**GUID Partition Table**](https://en.wikipedia.org/wiki/GUID_Partition_Table) 414* GPU - [**Graphics Processing Unit**](https://en.wikipedia.org/wiki/Graphics_processing_unit) 415* GSoC - [**Google Summer of Code**](https://en.wikipedia.org/wiki/Google_Summer_of_Code) 416* GSC - Google Security Chip - Typically Cr50/Ti50, though could also refer to the titan chips 417* GSPI - Generic SPI - These are SPI controllers available for general 418 use, not dedicated to flash, for example. 419* GTDT - ACPI: Generic Timer Description Table 420* GTT - [**Graphics Translation Table**](https://en.wikipedia.org/wiki/Graphics_address_remapping_table) 421* GUID - UEFI: [**Globally Unique IDentifier**](https://en.wikipedia.org/wiki/Universally_unique_identifier) 422 423 424## H 425 426* HBP - Graphics: [**Horizontal Back Porch**](https://en.wikipedia.org/wiki/Horizontal_blanking_interval) In the Horizontal blanking interval, this is the blank area past the end of the scanline 427* HDA - [**High Definition Audio**](https://en.wikipedia.org/wiki/Intel_High_Definition_Audio) 428* HDCP - [**High-bandwidth Digital Content Protection**](https://en.wikipedia.org/wiki/High-bandwidth_Digital_Content_Protection) 429* HDD - Hard Disk Drive 430* HDMI - [**High-Definition Multimedia Interface**](https://en.wikipedia.org/wiki/HDMI) 431* HDR - [**High Dynamic Range**](https://en.wikipedia.org/wiki/High_dynamic_range) 432* HECI - Intel: [**Host Embedded Controller Interface**](https://en.wikipedia.org/wiki/Host_Embedded_Controller_Interface) (Replaced by MEI) 433* HFP - Graphics: [**Horizontal Front Porch**](https://en.wikipedia.org/wiki/Horizontal_blanking_interval) In the Horizontal blanking interval, this is the blank before the start of the next scanline. 434* HID - [**Human Interface 435 Device**](https://en.wikipedia.org/wiki/Human_interface_device) 436* HOB - UEFI: Hand-Off Block 437* HPD - Hot-Plug Detect 438* HPET - [**High Precision Event Timer**](https://en.wikipedia.org/wiki/High_Precision_Event_Timer) 439* HSP - AMD: Hardware Security Processor 440* HSPHY - USB: USB3 High-Speed PHY 441* HSTI - Hardware Security Test Interface 442* HSW - Intel: Haswell 443* Hybrid S3 - System Power State: This is where the operating system 444 saves the contents of RAM out to the Hard drive, as if preparing to go 445 to S4, but then goes into suspend to RAM. This allows the system to 446 resume quickly from S3 if the system stays powered, and resume from 447 the disk if power is lost. 448* Hypertransport - AMD: The 449 [**Hypertransport**](https://en.wikipedia.org/wiki/Hypertransport) bus 450 is an older (2001-2017) high-speed electrical interconnection protocol 451 specification between CPU, Memory, and (occasionally) peripheral 452 devices. This was originally called the Lightning Data Transport 453 (LDT), which could be seen reflected in various register names. 454 Hypertransport was replaced by AMD's Infinity Fabric (IF) on AMD's Zen 455 processors. 456 457 458## I 459 460* I$ - Instruction Cache 461* I2C - **Inter-Integrated Circuit** is a bidirectional 2-wire bus for 462 communication generally between different ICs on a circuit board. 463 * [https://www.esacademy.com/en/library/technical-articles-and-documents/miscellaneous/i2c-bus.html](https://www.esacademy.com/en/library/technical-articles-and-documents/miscellaneous/i2c-bus.html) 464* I2S - [**Inter-IC Sound**](https://en.wikipedia.org/wiki/I%C2%B2S) 465* I3C - [**I3c**](https://en.wikipedia.org/wiki/I3C_%28bus%29) is not an 466 acronym - The follower to I2C (Inter-Integrated Circuit) 467 - Also known as SenseWire 468* IA - Intel Architecture 469* IA-64 - Intel Itanium 64-bit architecture 470* IAFC - RISC-V: [**RISC-V Base Integer instruction set**](https://en.wikipedia.org/wiki/RISC-V), plus atomic instructions, single precision floating point instructions, and compressed instructions 471* IBB – Initial Boot Block 472* IBV - Independent BIOS Vendor 473* IC - Integrated Circuit 474* ICL - Intel: Ice Lake 475* IDE - Software: Integrated Development Environment 476* IDE - Integrated Drive Electronics - A type of hard drive - Used 477 interchangeable with ATA, though IDE describes the drive, and ATA 478 describes the interface. Generally replaced by SATA (Though again, 479 SATA describes the interface, not actually the drive) 480* IDSEL/AD - Initialization Device SELect/Address and Data. Each PCI 481 slot has a signal called IDSEL. It is used to differentiate between 482 the different slots. 483* IDT - [Interrupt Descriptor Table](https://en.wikipedia.org/wiki/Interrupt_descriptor_table) 484* IF - AMD: [**Infinity 485 Fabric**](https://en.wikipedia.org/wiki/HyperTransport#Infinity_Fabric) 486 is a superset of AMD's earlier Hypertransport interconnect. 487* IFD - Intel: Intel Flash Descriptor 488* IMAFC - RISC-V: [**RISC-V Base Integer instruction set**](https://en.wikipedia.org/wiki/RISC-V), plus integer multiply & divide, atomic instructions, single precision floating point instructions, and compressed instructions 489* IMC - AMD: Integrated micro-controller - An 8051 microcontroller built 490 into some AMD FCHs (Fusion Controller Hubs) and Southbridge chips. 491 This never worked well for anything beyond fan control and caused 492 numerous issues by reading from the BIOS flash chip, preventing other 493 devices from communicating with the flash chip at runtime. 494* IMC - Integrated Memory Controller - This is a less usual use of the 495 IMC acronym, but seems to be growing somewhat. 496* IO or I/O - Input/Output 497* IoC - Security: Indicator of Compromise 498* IOC - Intel: I/O Cache 499* IOE - Intel: I/O Expander 500* IOHC - AMD: I/O Hub Controller 501* IOM - Intel: I/O Manager 502* IOMMU - [**I/O Memory Management Unit**](https://en.wikipedia.org/wiki/Input%E2%80%93output_memory_management_unit) 503* IOMUX - AMD: The I/O Mux block controls how each GPIO is configured. 504* IOSF - Intel: Intel On-chip System Fabric 505* IP - Intellectual Property 506* IP - Internet Protocol 507* IPC - Inter-Processor Communication/Inter-Process Communication 508* IPI - Inter Processor Interrupt 509* IPMI - Intelligent Platform Management Interface 510* IRQ - Interrupt Request 511* ISA - Instruction set architecture 512* ISA (bus) - Industry standard architecture - Replaced generally by PCI 513 (Peripheral Control Interface) 514* ISDN - Integrated Services Digital Network 515* ISH - AMD PSP: Image Slot Header 516* ISH - Intel: Integrated Sensor Hub - A microcontroller built into the 517 processor to help offload data processing from various sensors on a 518 mainboard. 519* ISP - Internet Service Provider 520* IVHD - ACPI: I/O Virtualization Hardware Definition 521* IVMD - ACPI: I/O Virtualization Memory Definition 522* IVRS - I/O Virtualization Reporting Structure 523* IWYU - Include What you Use - A tool to help with include file use 524 525 526## J 527 528* JEDEC - Joint Electron Device Engineering Council 529* JSL - Intel: Jasper Lake 530* JTAG - The [**Joint Test Action 531 Group**](https://en.wikipedia.org/wiki/JTAG) created a standard for 532 communicating between chips to verify and test ICs and PCB designs. 533 The standard was named after the group, and has become a standard 534 method of accessing special debug functions on a chip allowing for 535 hardware-level debug of both the hardware and software. 536 537 538## K 539 540* KBL - Intel: Kaby Lake 541* KVM - Keyboard Video Mouse 542 543 544## L 545* L0s - ASPM Power State: Turn off power for one direction of the PCIe 546 serial link. 547* L1-Cache - The fastest but smallest memory cache on a processor. 548 Frequently split into Instruction and Data caches (I-Cache / D-Cache, 549 also occasionally abbreviated as i$ and d$) 550* L1 - ASPM Power State: The L1 power state shuts the PCIe link off 551 completely until triggered to resume by the CLKREQ# signal. 552* L2-Cache - The second level of memory cache on a processor, this is a 553 larger cache than L1, but takes longer to access. Typically checked 554 only after data has not been found in the L1-cache. 555* L3-Cache - The Third, and typically final memory cache level on a 556 processor. The L3 cache is typically quite a bit larger than the L1 & 557 L2 caches, but again takes longer to access, though it's still much 558 faster than reading memory. The L3 cache is frequently shared between 559 multiple cores on a modern CPU. 560* LAN - Local Area Network 561* LAPIC - Local APIC 562* LBA - Logical Block Address 563* LCD - Liquid Crystal Display 564* LCAP - PCIe: Link Capabilities 565* LED - Light Emitting Diode 566* LF - Line Feed - The standard Unix EOL (End-of-Line) marker. 567* LGTM - Looks Good To Me 568* LLC - Last Level Cache 569* LLVM - Initially stood for Low Level Virtual Machine, but now is just 570 the name of the project, as it has expanded past its original goal. 571* LP5 - LPDDR5 572* LPDDR5 - [**Low-Power DDR 5 SDRAM**](https://en.wikipedia.org/wiki/LPDDR) 573* LPC - The [**Low Pin 574 count**](http://www.intel.com/design/chipsets/industry/lpc.htm) bus 575 was a replacement for the ISA bus, created by serializing a number of 576 parallel signals to get rid of those connections. 577* LPM - USB: Link Power Management 578* LPT - Line Print Terminal, Local Print Terminal, or Line Printer. - 579 The Parallel Port 580* LRU - Least Recently Used - a rule used in operating systems that 581 utilises a paging system. LRU selects a page to be paged out if it has 582 been used less recently than any other page. This may be applied to a 583 cache system as well. 584* LSB - Least Significant Bit 585* LTE - Telecommunication: [**Long-Term 586 Evolution**](https://en.wikipedia.org/wiki/LTE_%28telecommunication%29) 587* LVDS - Low-Voltage Differential Signaling 588 589 590## M 591 592* M.2 - An interface specification for small peripheral cards. 593* MAC Address - Media Access Control Address 594* MAFS - (eSPI) Master Attached Flash Sharing: Flash components are 595 attached to the controller device and may be accessed by by the 596 peripheral devices through the eSPI flash access channel. 597* MBP - Intel UEFI: ME-to-BIOS Payload 598* MBR - Master Boot Record 599* MCA - [**Machine Check Architecture**](https://en.wikipedia.org/wiki/Machine_Check_Architecture) 600* MCR - Machine Check Registers 601* MCTP - [**Management Component Transport Protocol**](https://en.wikipedia.org/wiki/Management_Component_Transport_Protocol) 602* MCU - Memory Control Unit 603* MCU - [**MicroController 604 Unit**](https://en.wikipedia.org/wiki/Microcontroller) 605* MCUPM - Mediatek: MCUPM is a hardware module which is used for MCUSYS Power Management. MCUPM firmware (mcupm.bin) is loaded into MCUPM SRAM at system initialization. 606* MDFIO - Intel: Multi-Die Fabric IO 607* MDN - AMD: Mendocino 608* mDP - Mini DisplayPort connector 609* ME - Intel: Management Engine 610* MEI - Intel: ME Interface (Previously known as HECI) 611* Memory training - the process of finding the best speeds, voltages, 612 and delays for system memory. 613* MHU: ARM: Message Handling Unit 614* MIPI: The [**Mobile Industry Processor 615 Interface**](https://en.wikipedia.org/wiki/MIPI_Alliance) Alliance has 616 developed a number of different specifications for mobile devices. 617 The Camera Serial Interface (CSI) is a widely used interface that has 618 made its way into laptops. 619* MIPS - Millions of Instructions per Second 620* MIPS (processor) - Microprocessor without Interlocked Pipelined 621 Stages. 622* MKBP - Matrix Keyboard Protocol 623* MMC - [**MultiMedia 624 Card**](https://en.wikipedia.org/wiki/MultiMediaCard) 625* MMIO - [**Memory Mapped I/O**](https://en.wikipedia.org/wiki/MMIO) 626 allows peripherals' memory or registers to be accessed directly 627 through the memory bus. When the memory bus size was very small, this 628 was initially done by hiding any memory at that address, effectively 629 wasting that memory. In modern systems, that memory is typically 630 moved to the end of the physical memory space, freeing a 'hole' to map 631 devices into. 632* MMU - Memory Management Unit 633* MMX - Officially, not an acronym, trademarked by Intel. Unofficially, 634 Matrix Math eXtension. 635* MODEM - Modulator-Demodulator 636* Modern Standby - Microsoft's name for the S0iX states 637* MOP - Macro-Operation 638* MOS - Metal-Oxide-Silicon 639* MP - Production Timeline: Mass Production 640* MPU - Memory Protection Unit 641* MPTable - The Intel [**MultiProcessor 642 specification**](https://en.wikipedia.org/wiki/MultiProcessor_Specification) 643 is a hardware compatibility guide for machine hardware designers and 644 OS software writers to produce SMP-capable machines and OSes in a 645 vendor-independent manner. Version 1.1 of the spec was released in 646 1994, and the 1.4 version was released in 1995. This has been 647 generally superseded by the ACPI tables. 648* MRC - Intel: Memory Reference Code 649* MSB - Most Significant Bit 650* MSI - Message Signaled Interrupt 651* MSR - Machine-Specific Register 652* MTS or MT/s - MegaTransfers per second 653* MTL - Intel: Meteor Lake 654* MTL - ARM: MHU Transport Layer 655* MTRR - [**Memory Type and Range Register**](https://en.wikipedia.org/wiki/MTRR) 656 allows to set the cache behaviour on memory access in x86. Basically, 657 it tells the CPU how to cache certain ranges of memory 658 (e.g. write-through, write-combining, write-back...). Memory ranges 659 are specified over physical address ranges. In Linux, they are visible 660 over `/proc/mtrr` and they can be modified there. For further 661 information, see the [**Linux documentation**](https://www.kernel.org/doc/html/v5.19/x86/pat.html). 662* MXM - PCIe: [**Mobile PCI Express Module**](https://en.wikipedia.org/wiki/Mobile_PCI_Express_Module) 663 664 665## N 666 667* Nack - Negative Acknowledgement 668* NB - North Bridge 669* NBCI - Nvidia: NoteBook Common Interface 670* NC - GPIOs: No Connect 671* NDA - Non-Disclosure Agreement. 672* NF - GPIOs: Native Function - GPIOs frequently have multiple different 673 functions, one of which is defined as the default, or Native function. 674* NFC - [**Near Field 675 Communication**](https://en.wikipedia.org/wiki/Near-field_communication) 676* NGFF - [**Next Generation Form 677 Factor**](https://en.wikipedia.org/wiki/M.2) - The original name for 678 M.2 679* NHLT - ACPI Table - Non-HDA Link Table 680* NIC - Network Interface Card 681* NMI - Non-maskable interrupt 682* Nonce - Cryptography: [**Number used once**](https://en.wikipedia.org/wiki/Cryptographic_nonce) 683* NOP - No Operation 684* NTFS - New Technology File System 685* NVME - Non-Volatile Memory Express - An SSD interface that allows 686 access to the flash memory through a PCIe bus. 687* NVPCF - Nvidia Platform and Control Framework 688* NVVDD - Nvidia Power: Core voltage 689* NX - No Execute 690 691 692## O 693 694* ODH - GPIOs: Open Drain High - High is driven to the reference voltage, low is a high-impedance state 695* ODL - GPIOs: Open Drain Low - Low is driven to ground, High is a high-impedance state. 696* ODM - [**Original Design Manufacturer**](https://en.wikipedia.org/wiki/Original_design_manufacturer) 697* OEM - [**Original Equipment Manufacturer**](https://en.wikipedia.org/wiki/Original_equipment_manufacturer) 698* OHCI - [**Open Host Controller 699 Interface**](https://en.wikipedia.org/wiki/Host_Controller_Interface_%28USB%29) 700 - non-proprietary USB Host controller for USB 1.1 (May also refer to 701 the open host controller for IEEE 1394, but this is less common). 702* OOBE - Out Of the Box Experience 703* OPP - ARM: Operating Performance Points 704* OS - Operating System 705* OTA - Over the Air 706* OTP - One Time Programmable 707 708 709## P 710 711* PAE - physical address extension 712* PAL - Programmable Array Logic 713* PAM - Intel: Programmable Attribute Map - This is the legacy BIOS 714 region from 0xC_0000 to 0xF_FFFF 715* PAT - [**Page Attribute 716 Table**](https://en.wikipedia.org/wiki/Page_attribute_table) This can 717 be used independently or in combination with MTRR to setup memory type 718 access ranges. Allows more finely-grained control than MTRR. Compared to MTRR, 719 which sets memory types by physical address ranges, PAT sets them at Page 720 level. 721* PAT - Intel: [**Performance Acceleration 722 Technology**](https://en.wikipedia.org/wiki/Performance_acceleration_technology) 723* PATA - Parallel Advanced Technology Attachment - A renaming of ATA 724 after SATA became the standard. 725* PAVP - [**Intel: Protected Audio-Video 726 Path**](https://en.wikipedia.org/wiki/Intel_GMA#Protected_Audio_Video_Path) 727* PC - Personal Computer 728* PC AT - Personal Computer Advanced Technology 729* PC100 - An SDRAM specification for a 100MHz memory bus. 730* PCB - Printed Circuit Board 731* PCD - UEFI: Platform Configuration Database 732* PCH - Intel: [**Platform Controller Hub**](https://en.wikipedia.org/wiki/Platform_Controller_Hub) 733* PCI - [**Peripheral Control 734 Interconnect**](https://en.wikipedia.org/wiki/Peripheral_Component_Interconnect) 735 - Replaced generally by PCIe (PCI Express) 736* PCI Configuration Space - The [**PCI Config 737 space**](https://en.wikipedia.org/wiki/PCI_Configuration_Space) is an 738 [address space](https://en.wikipedia.org/wiki/Address_space) for all 739 PCI devices. Originally, this address space was accessed through an 740 index/data pair by writing the address that you wanted to read/write 741 into the I/O address 0xCF8, then reading or writing I/O Address 0xCFC. 742 This has been updated to an MMIO method which increases each PCI 743 function's configuration space from 256 bytes to 4K. 744* PCIe - [**PCI Express**](https://en.wikipedia.org/wiki/Pci_express) 745* PCMCIA: Personal Computer Memory Card International Association 746* PCO - AMD: [**Picasso**](https://en.wikichip.org/wiki/amd/cores/picasso) 747* PCR: TPM: Platform Configuration Register 748* PD - GPIOs: Pull-Down - Drives the pin to ground through a resistor. 749 The resistor allows the pin to be set to the reference voltage as 750 needed. 751* PD - Power Delivery - This is a specification for communicating power 752 needs and availability between two devices, typically over USB type C. 753* PEG - PCIe Graphics - A (typically) x16 PCIe slot connected to the CPU 754 for higher graphics bandwidth and lower latency. 755* PEI - UEFI: Pre-EFI Initialization 756* PEIM - UEFI: PEI Module 757* PEP - Intel: Power Engine Plug-in 758* PEXVDD - Nvidia Power: PCIExpress Voltage 759* PHX - AMD: Phoenix SoC 760* PHY - [**PHYsical layer**](https://en.wikipedia.org/wiki/PHY) - The 761 hardware that implements the send/receive functionality of a 762 communication protocol. 763* PI - Platform Initialization 764* PIC - [**Programmable Interrupt 765 Controller**](https://en.wikipedia.org/wiki/Programmable_interrupt_controller) 766* PII - [**Personally Identifiable 767 Information**](https://en.wikipedia.org/wiki/Personal_data) 768* PIO - [**Programmed 769 I/O**](https://en.wikipedia.org/wiki/Programmed_input%E2%80%93output) 770* PIR - PCI Interrupt Router 771* PIR Table - The [**PCI Interrupt Routing 772 Table**](https://web.archive.org/web/20080206072638/http://www.microsoft.com/whdc/archive/pciirq.mspx) 773 was a Microsoft specification that allowed windows to determine how 774 each PCI slot was wired to the interrupt router. 775* PIRQ - PCI IRQ 776* PIT - Generally refers to the 8253/8254 [**Programmable Interval 777 Timer**](https://en.wikipedia.org/wiki/Programmable_interval_timer). 778* PLCC - [**Plastic leaded chip 779 carrier**](https://en.wikipedia.org/wiki/Plastic_leaded_chip_carrier) 780* PLL - [**Phase-Locked 781 Loop**](https://en.wikipedia.org/wiki/Phase-locked_loop) 782* PM - Platform Management 783* PM - Power Management 784* PMC Intel: Power Management Controller 785* PMIC - Power Management IC (Pronounced "P-mick") 786* PMIO - Port-Mapped I/O 787* PMU - Power Management Unit 788* PNP - Plug aNd Play 789* PoP - Point-of-Presence 790* POR - Plan of Record 791* POR - Power On Reset 792* Port80 - The [**I/O port 793 0x80**](https://en.wikipedia.org/wiki/Power-on_self-test#Progress_and_error_reporting) 794 is the address for BIOS writes to update diagnostic information during 795 the boot process. 796* POST - [**Power-On Self 797 Test**](https://en.wikipedia.org/wiki/Power-on_self-test) 798* POTS - [**Plain Old Telephone 799 Service**](https://en.wikipedia.org/wiki/Plain_old_telephone_service) 800* PPI - UEFI: PEIM-to-PEIM Interface 801* PPR - Processor Programming Reference 802* PPT - AMD: Package Power Tracking 803* PROM - Programmable Read Only Memory 804* Proto - Production Timeline: The first initial production to test key 805 concepts. 806* PSE - Page Size Extention 807* PSF - Intel: Primary Sideband Fabric 808* PSP - AMD: Platform Security Processor 809* PSPP - AMD: PCIE Speed Power Policy 810* PSR - Intel: Platform Service Record 811* PSR - Graphics: Panel Self-Refresh - This is a power-savings feature specified in eDP 812* PTT - Intel: Platform Trust Technology - Intel's firmware based TPM. 813* PU - GPIOs: Pull-Up - Drives the pin to reference voltage through a 814 resistor. The resistor allows the signal to still be set to ground 815 when needed. 816* PVT - Production Timeline: (Production Validation Test 817* PWM - Pulse Width Modulation 818* PXE - Pre-boot Execution Environment 819 820 821## Q 822 823* QOS - Quality of Service 824 825 826## R 827 828* RAID - redundant array of inexpensive disks - as opposed to SLED - 829 single large expensive disk. 830* RAM - Random Access Memory 831* RAMID - Boards that have soldered-down memory (no DIMMs) can have 832 various different sizes, speeds, and brands of memory chips attached. 833 Because there is no SPD, (for cost savings) the memory needs to be 834 identified in a different manner. The simplest of these is done using 835 a set of 3 or 4 GPIOs to allow 8 to 16 different memory chips to be 836 used. 837* RAPL - Running Average Power Limit 838* RCB - PCIe: Read Completion Boundary - Sets the address alignment on which a read request may be serviced with multiple completions 839* RCS - [**Revision control 840 system**](https://en.wikipedia.org/wiki/Revision_Control_System) 841* Real mode - The original 20-bit addressing mode of the 8086 & 8088 842 computers, allowing the system to access 1MiB of memory through a 843 Segment:Offset index pair. In 2022, this is still the mode that 844 x86-64 processors are in at the reset vector! 845* RDMA - [**Remote Direct Memory 846 Access**](https://en.wikipedia.org/wiki/Remote_Direct_Memory_Access) is 847 a concept whereby two or more computers communicate via DMA directly 848 from main memory of one system to the main memory of another. 849* RFC - Request for Comment 850* RFI - [**Radio-Frequency 851 Interference**](https://en.wikipedia.org/wiki/Electromagnetic_interference) 852* RGB - Red, Green, Blue 853* RISC - Reduced Instruction Set Computer 854* RMA - Return Merchandise Authorization 855* RO - Read Only 856* ROM - Read Only Memory 857* RoT - Root of Trust 858* RPL - Intel: [**Raptor Lake**](https://en.wikipedia.org/wiki/Raptor_Lake) 859* RPP - Intel: Raptor Point PCH 860* RRG - AMD (ATI): Register Reference Guide 861* RSDP - Root System Description Pointer 862* RTC - Real Time Clock 863* RTD3 - Power State: Runtime D3 864* RTFM - Read the Fucking Manual 865* RTOS - Real-Time Operating System 866* RVP - Intel: Reference Validation Platform 867* RW - Read / Write 868* RX - Receive 869 870 871## S 872 873* S-states - ACPI System Power States: [**Sleep states**](https://uefi.org/specs/ACPI/6.4/16_Waking_and_Sleeping/sleeping-states.html) 874* S0 - ACPI System Power State: Fully running 875* S0 - S5 - ACPI System power states level 0 - 5, with each higher 876 numbered power state being (theoretically) lower power than the 877 previous, and (again theoretically) taking longer to get back to a 878 fully running system than the previous. 879* S1 - ACPI System Power State: Standby - This isn’t use much anymore, 880 but it used to put the Processor into a powered, but idle state, power 881 down any drives, and turn off the display. This would wake up almost 882 instantly because no processor context was lost in this state. 883* S2 - ACPI System Power State: Lower power than S1, Higher power than 884 S3, I don’t know that this state was ever well defined by any group. 885* S3 - ACPI System Power State: Suspend to RAM - A low-power state where 886 the processor context is copied to the system Memory, then the 887 processor and all peripherals are powered off. On wake, or resume, 888 the system starts to boot normally, then switches to restore the 889 memory registers to the previous settings, restore the processor 890 context from memory, and jump back to the operating system to pick up 891 where it left off. 892* S4 - ACPI System Power State: Suspend to Disk. The processor context 893 and all the contents of memory are copied to the hard drive. This is 894 typically fully handled by the operating system, so resume is a normal 895 boot through all of the firmware, then the OS restore the original 896 contents of memory. Any critical processor state is restored. 897* S5 - ACPI System Power State: System is “completely powered off”, but 898 still has power going to the board. 899* SAFS - (eSPI) Slave Attached Flash Sharing: Flash is attached to the 900 peripheral device. Only valid for server platforms. 901* SAGV - Intel: System Agent Geyserville. The original internal name 902 for the feature eventually released as Speedstep which controls the 903 processor voltage and frequencies. 904* SAR - The [**Specific Absorption 905 Rate**](https://en.wikipedia.org/wiki/Specific_absorption_rate) is the 906 measurement for the amount of Radio Frequency (RF) energy absorbed by 907 the body in units of Watts per Kilogram. This may be built into 908 coreboot as a table. 909* SAS - Serial Attached SCSI - A serialized version of SCSI used mostly 910 for high performance hard drives and tape drives. 911* SATA - Serial Advanced Technology Attachment 912* SB - South Bridge 913* SB-RMI - AMD: Sideband Remote Management Interface 914* SB-TSI - SideBand Temperature Sensor Interface 915* SBA - SideBand Addressing 916* SBI - SideBand Interface 917* SBOM - Software Bill of Materials 918* SCI - System Control Interrupt 919* SCP - ARM: System Control Processor 920* SCP - Network Protocol: Secure Copy 921* SCSI - Small Computer System Interface - A high-bandwidth 922 communication interface for peripherals. This is a very old interface 923 that has seen numerous updates and is still used today, primarily in 924 SAS (Serial Attached SCSI). The initial version is now often referred 925 to as Parallel SCSI. 926* SD - [**Secure Digital**](https://en.wikipedia.org/wiki/SD_card) card 927* SDHCI - SD Host Controller Interface 928* SDRAM - Synchronous DRAM 929* SDLE: AMD: Stardust Dynamic Load Emulator 930* SEEP - Serial EEPROM (Electrically Erasable Programmable Read-Only 931 Memory) 932* SEV - AMD: Secure Encrypted Virtualization 933* SF - Snoop Filter 934* Shadow RAM - RAM which content is copied from ROM residing at the same 935 address for speedup purposes. 936* Shim - A small piece of code whose only purpose is to act as an 937 interface to load another piece of code. 938* SIMD - Single Instruction, Multiple Data 939* SIMM - Single Inline Memory Module 940* SIPI - Startup Inter Processor Interrupt 941* SIO - [**Super I/O**](https://en.wikipedia.org/wiki/Super_I/O) 942* SKL - Intel: SkyLake 943* SKU - Stock Keeping Unit 944* SMART: [**Self-Monitoring Analysis And Reporting 945 Technology**](https://en.wikipedia.org/wiki/S.M.A.R.T.) 946* SMBIOS - [**System Management 947 BIOS**](https://en.wikipedia.org/wiki/System_Management_BIOS) 948* SMBus - [**System Management 949 Bus**](https://en.wikipedia.org/wiki/System_Management_Bus) 950 * [http://www.smbus.org/](http://www.smbus.org/) 951* SME - AMD: Secure Memory Encryption 952* SMI - System management interrupt 953* SMM - [**System management 954 mode**](https://en.wikipedia.org/wiki/System_Management_Mode) 955* SMN - AMD: System Management Network 956* SMRAM - System Management RAM 957* SMT - Simultaneous Multithreading 958* SMT - Surface Mount 959* SMT - Symmetric Multithreading 960* SNP - AMD: Secure Nested Paging 961* SMU - AMD: System Management Unit 962* SO-DIMM: Small Outline Dual In-Line Memory Module 963* SoC - System on a Chip 964* SOIC - [**Small-Outline Integrated 965 Circuit**](https://en.wikipedia.org/wiki/Small-outline_integrated_circuit) 966* SPD - [**Serial Presence 967 Detect**](https://en.wikipedia.org/wiki/Serial_presence_detect) 968* SPI - [**Serial Peripheral 969 Interface**](https://en.wikipedia.org/wiki/Serial_Peripheral_Interface) 970* SPL - AMD: Security Patch Level 971* SPM - Mediatek: System Power Manager 972* SPMI - MIPI: System Power Management Interface 973* SPR - Sapphire Rapids 974* SRAM - Static Random Access Memory 975* SSD - Solid State Drive 976* SSDT - Secondary System Descriptor Table - ACPI table 977* SSE - Streaming SIMD Extensions 978* SSH - Network Protocol: Secure Shell 979* SSI - **Server System Infrastructure** 980* SSI-CEB - Physical board format: [**SSI Compact Electronics 981 Bay**](https://en.wikipedia.org/wiki/SSI_CEB) 982* SSI-EEB - Physical board format: [**SSI Enterprise Electronics 983 Bay**](https://en.wikipedia.org/wiki/SSI_CEB) is a wider version of 984 ATX with different standoff placement. 985* SSI-MEB - Physical board format: [**SSI Midrange Electronics 986 Bay**](https://en.wikipedia.org/wiki/SSI_CEB) 987* SSI-TEB - Physical board format: [**SSI Thin Electronics 988 Bay**](https://en.wikipedia.org/wiki/SSI_CEB) 989* SSP - [**Speech Signal Processor**](https://en.wikipedia.org/wiki/Speech_processing) 990* SSPHY - USB: USB3 Super-Speed PHY 991* STAPM - AMD: Skin Temperature Aware Power Management 992* STB - AMD: Smart Trace Buffer 993* SuperIO - The [**Super I/O**](https://en.wikipedia.org/wiki/Super_I/O) 994 (SIO) device provides a system with any of a number of different 995 peripherals. Most common are: A PS/2 Keyboard and mouse port, LPT 996 Ports, UARTS, Watchdog Timers, Floppy drive Controllers, GPIOs, or any 997 of a number of various other devices. 998* SVC - ARM: Supervisor Call 999* SVI2/3 - Serial VID (Voltage Identification) Interface 2.0 / 3.0 1000* SWCM - Intel: Software Connection Manager 1001 1002 1003## T 1004 1005* TBT - Thunderbolt 1006* TBT - Intel: Turbo Boost Technology 1007* tBUF - I2C: The bus free time between a STOP and START condition 1008* TCC - Intel: Thermal Control Circuit 1009* TCP - Transmission Control Protocol 1010* TCPC - Type C Port Controller 1011* TCSS - Intel: Type C SubSystem 1012* TDMA - Time-Division Multiple Access 1013* TDP - [**Thermal Design 1014 Power**](https://en.wikipedia.org/wiki/Thermal_design_power) 1015* TEE - [**Trusted Execution 1016 Environment**](https://en.wikipedia.org/wiki/Trusted_execution_environment) 1017* TFTP - Network Protocol: Trivial File Transfer Protocol 1018* TGL - Intel: Tigerlake 1019* THC - Touch Host Controller 1020* Ti50 - Google: The next generation GSC (Google Security chip) on 1021 ChromeOS devices after Cr50 1022* TLA - Techtronics Logic Analyzer 1023* TLA - Three Letter Acronym 1024* TLB - [**Translation Lookside 1025 Buffer**](https://en.wikipedia.org/wiki/Translation_lookaside_buffer) 1026* TME - Intel: Total Memory Encryption 1027* TOCTOU - Time-Of-Check to Time-Of-Use 1028* TOLUM - Top of Low Usable Memory 1029* ToM - Top of Memory 1030* TPM - Trusted Platform Module 1031* TS - TimeStamp 1032* TSN - Time-Sensitive Networking 1033* TSC - [**Time Stamp 1034 Counter**](https://en.wikipedia.org/wiki/Time_Stamp_Counter) 1035* TSEG - TOM (Top of Memory) Segment 1036* TSR - Temperature Sensor 1037* TWAIN - Technology without an interesting name. 1038* TX - Transmit 1039* TXE - Intel: Trusted eXecution Engine 1040 1041 1042## U 1043 1044* UART - Universal asynchronous receiver-transmitter 1045* UC - UnCacheable. Memory type setting in MTRR/PAT. 1046* uCode - [**Microcode**](https://en.wikipedia.org/wiki/Microcode) 1047* UDK - UEFI: UEFI Development Kit 1048* UDP - User Datagram Protocol 1049* UDMA - ATA: [**Ultra DMA**](https://en.wikipedia.org/wiki/UDMA) - The fastest transfer mode for ATA Hard Drives 1050* UEFI - Unified Extensible Firmware Interface 1051* UFC - User Facing Camera 1052* UFP - USB: Upstream Facing Port 1053* UFS - Universal Flash storage 1054* UHCI - USB: [**Universal Host Controller 1055 Interface**](https://en.wikipedia.org/wiki/Host_controller_interface_%28USB%2C_Firewire%29%23UHCI) 1056 - Intel proprietary USB 1.x Host controller 1057* Unreal mode - Real mode running in a way that allows it to access the 1058 entire 4GiB of the 32-bit address space - Also known as Big real mode 1059 or Flat mode. 1060* UMA - Unified Memory Architecture 1061* UMI - AMD: [**Unified Media 1062 Interface**](https://en.wikipedia.org/wiki/Unified_Media_Interface) 1063* UPD - Updatable Product Data 1064* UPS - Uninterruptible Power Supply 1065* USART - Universal Synchronous/Asynchronous Receiver/Transmitter 1066* USB - Universal Serial Bus 1067* USF - Intel: Universal Scalable Firmware 1068 1069 1070## V 1071 1072* VBIOS - Video BIOS 1073* VBNV - Vboot Non-Volatile storage 1074* VBT - [**Video BIOS 1075 Table**](https://www.kernel.org/doc/html/latest/gpu/i915.html#video-bios-table-vbt) 1076* VDDQ Memory/Power: The supply voltage to the output buffers of a memory chip. 1077* VESA - Video Electronics Standards Association 1078* VGA: Video Graphics Array 1079* VID: Vendor Identifier 1080* VID: AMD: Voltage Identifier 1081* VLB - VESA Local Bus 1082* VOIP - Voice over IP 1083* Voodoo mode - a silly name for Big Real mode. 1084* VMX - Intel: CPU flag for Hardware Virtualization 1085* VPD - Vital Product Data 1086* VPN - Virtual Private Network 1087* VPU - Intel: Versatile Processor Unit 1088* VR - Voltage Regulator 1089* VRAM - Video Random Access Memory 1090* VREF Memory/Power: Reference voltage for the input lines of a chip that determines the voltage level at which the threshold between a logical 1 and a logical 0 occurs. Usually 1/2 VDDQ. 1091* VRM - Voltage Regulator Module 1092* VT-d - Intel: Virtualization Technology for Directed I/O 1093* VTT Memory/Power: Tracking Termination Voltage 1094* vUART - Virtual UART 1095 1096 1097## W 1098 1099* WAN - [**Wide Area Network**](https://en.wikipedia.org/wiki/Wide_area_network) 1100* WB - Cache Policy: [**Write-Back**](https://en.wikipedia.org/wiki/Cache_%28computing%29) 1101* WC - Cache Policy: [**Write-Combining**](https://en.wikipedia.org/wiki/Cache_%28computing%29) 1102* WCAM - World-facing Camera - A camera on a device that is not intended 1103 to be used as a webcam, but instead to film scenes away from the user. 1104 For clamshell devices, his may be on the keyboard panel for devices 1105 devices that open 360 degrees, or on the outside of the cover. For 1106 tablets, it's on the the side away from the screen. 1107* WDT - [**WatchDog Timer**](https://en.wikipedia.org/wiki/Watchdog_timer) 1108* WFC - World Facing Camera 1109* WLAN - Wireless LAN (Local Area Network) 1110* WWAN - Telecommunication: Wireless WAN (Wide Area Network) 1111* WP - Cache policy: [**Write-Protected**](https://en.wikipedia.org/wiki/Cache_%28computing%29) 1112* WPT - Intel: Wildcat Point - PCH for Broadwell 1113* WO - Write-only 1114* WOL - [**Wake-on-LAN**](https://en.wikipedia.org/wiki/Wake-on-LAN) 1115* WT - Cache Policy: [**Write Through**](https://en.wikipedia.org/wiki/Cache_%28computing%29) 1116 1117 1118## X 1119 1120* x64 - Another name for [**x86-64**](https://en.wikipedia.org/wiki/X86-64) or AMD64. 1121* x86 - [**x86**](https://en.wikipedia.org/wiki/X86) Originally referred to any device compatible with the 8088/8086 1122 architectures, this now typically means compatibility with the 80386 1123 32-bit instruction set (also referred to as IA-32) 1124* x86-64 - The 64-bit extension to the x86 architecture. Also known as 1125 [**AMD64**](https://en.wikipedia.org/wiki/X86-64) as it was developed by AMD. Long-mode refers to when the 1126 processor is running in the 64-bit mode. 1127* XBAR - AMD: Abbreviation for crossbar, their command packet switch 1128 which determines what data goes where within the processor or SoC 1129* XHCI - USB: [**Extensible Host Controller Interface**](https://en.wikipedia.org/wiki/Extensible_Host_Controller_Interface) - USB Host controller 1130 supporting 1.x, 2.0, and 3.x devices. 1131 1132 1133## Y 1134 1135* YCC - Color Space: [**YCbCr**](https://en.wikipedia.org/wiki/YCbCr) - A family of color spaces used in video 1136 1137 1138## Z 1139 1140* ZIF - Zero Insertion Force 1141 1142 1143## References: 1144```{toctree} 1145:maxdepth: 1 1146 1147AMD Glossary of terms <https://www.amd.com/system/files/documents/glossary-of-terms-20220505-for-web.pdf> 1148``` 1149