xref: /aosp_15_r20/external/capstone/suite/MC/Mips/mips-coprocessor-encodings.s.cs (revision 9a0e4156d50a75a99ec4f1653a0e9602a5d45c18)
1 # CS_ARCH_MIPS, CS_MODE_MIPS64+CS_MODE_BIG_ENDIAN, None
2 0x40,0xac,0x80,0x02 = dmtc0 $t4, $s0, 2
3 0x40,0xac,0x80,0x00 = dmtc0 $t4, $s0, 0
4 0x40,0x8c,0x80,0x02 = mtc0 $t4, $s0, 2
5 0x40,0x8c,0x80,0x00 = mtc0 $t4, $s0, 0
6 0x40,0x2c,0x80,0x02 = dmfc0 $t4, $s0, 2
7 0x40,0x2c,0x80,0x00 = dmfc0 $t4, $s0, 0
8 0x40,0x0c,0x80,0x02 = mfc0 $t4, $s0, 2
9 0x40,0x0c,0x80,0x00 = mfc0 $t4, $s0, 0
10 0x48,0xac,0x80,0x02 = dmtc2 $t4, $s0, 2
11 0x48,0xac,0x80,0x00 = dmtc2 $t4, $s0, 0
12 0x48,0x8c,0x80,0x02 = mtc2 $t4, $s0, 2
13 0x48,0x8c,0x80,0x00 = mtc2 $t4, $s0, 0
14 0x48,0x2c,0x80,0x02 = dmfc2 $t4, $s0, 2
15 0x48,0x2c,0x80,0x00 = dmfc2 $t4, $s0, 0
16 0x48,0x0c,0x80,0x02 = mfc2 $t4, $s0, 2
17 0x48,0x0c,0x80,0x00 = mfc2 $t4, $s0, 0
18