1From 7a436110ef15c803dc8524af2fb5612bcacbb126 Mon Sep 17 00:00:00 2001 2From: mephi42 <[email protected]> 3Date: Tue, 7 Aug 2018 20:55:32 +0200 4Subject: [PATCH 6/7] capstone: generate *MappingInsn.inc 5 6--- 7 lib/Target/SystemZ/CMakeLists.txt | 1 + 8 utils/TableGen/InstrInfoEmitter.cpp | 95 +++++++++++++++++++++++++++++ 9 utils/TableGen/TableGen.cpp | 6 ++ 10 utils/TableGen/TableGenBackends.h | 1 + 11 4 files changed, 103 insertions(+) 12 13diff --git a/lib/Target/SystemZ/CMakeLists.txt b/lib/Target/SystemZ/CMakeLists.txt 14index f83b4242fb4..4b5d9c4a3b2 100644 15--- a/lib/Target/SystemZ/CMakeLists.txt 16+++ b/lib/Target/SystemZ/CMakeLists.txt 17@@ -6,6 +6,7 @@ tablegen(LLVM SystemZGenCallingConv.inc -gen-callingconv) 18 tablegen(LLVM SystemZGenDAGISel.inc -gen-dag-isel) 19 tablegen(LLVM SystemZGenDisassemblerTables.inc -gen-disassembler) 20 tablegen(LLVM SystemZGenInstrInfo.inc -gen-instr-info) 21+tablegen(LLVM SystemZMappingInsn.inc -mapping-insn) 22 tablegen(LLVM SystemZGenMCCodeEmitter.inc -gen-emitter) 23 tablegen(LLVM SystemZGenRegisterInfo.inc -gen-register-info) 24 tablegen(LLVM SystemZGenSubtargetInfo.inc -gen-subtarget) 25diff --git a/utils/TableGen/InstrInfoEmitter.cpp b/utils/TableGen/InstrInfoEmitter.cpp 26index 2f3a2729262..14ab1ea8a72 100644 27--- a/utils/TableGen/InstrInfoEmitter.cpp 28+++ b/utils/TableGen/InstrInfoEmitter.cpp 29@@ -744,4 +744,99 @@ void EmitInstrInfo(RecordKeeper &RK, raw_ostream &OS) { 30 #endif 31 } 32 33+#ifdef CAPSTONE 34+std::string GetPublicName(const CodeGenInstruction *Inst) { 35+ std::string Name = Inst->TheDef->getName(); 36+ // Apply backward compatibility fixups. 37+ // BRNLE -> BNLER. 38+ if (Name.length() >= 5 && Name.substr(0, 5) == "BRAsm") { 39+ Name = "B" + Name.substr(5, Name.length() - 5) + "R"; 40+ } 41+ // SSKEOpt -> SSKE. 42+ while (Name.length() >= 3 && Name.substr(Name.length() - 3, 3) == "Opt") { 43+ Name = Name.substr(0, Name.length() - 3); 44+ } 45+ // BRCLAsm -> BRCL. 46+ while (true) { 47+ size_t pos = Name.find("Asm"); 48+ if (pos == std::string::npos) { 49+ break; 50+ } 51+ Name = Name.substr(0, pos) + Name.substr(pos + 3); 52+ } 53+ // CPSDRxx -> CPSDR. 54+ if (Name.length() >= 2) { 55+ std::string Suffix2 = Name.substr(Name.length() - 2, 2); 56+ if (Suffix2 == "dd" || Suffix2 == "ds" || 57+ Suffix2 == "sd" || Suffix2 == "ss") { 58+ Name = Name.substr(0, Name.length() - 2); 59+ } 60+ } 61+ return "SYSZ_INS_" + Name; 62+} 63+ 64+std::string GetRegisterName(Record *Reg) { 65+ std::string Name = Reg->getName(); 66+ for (char& c : Name) { 67+ c = toupper(c); 68+ } 69+ // R0L, R0D -> R0. 70+ if (Name.length() >= 3 && 71+ Name[Name.length() - 3] == 'R' && 72+ (Name[Name.length() - 1] == 'L' || 73+ Name[Name.length() - 1] == 'D')) { 74+ Name = Name.substr(0, Name.length() - 3) + Name[Name.length() - 2]; 75+ } 76+ return "SYSZ_REG_" + Name; 77+} 78+ 79+std::string GetGroupName(Record *Pred) { 80+ std::string Name = Pred->getName(); 81+ for (char& c : Name) { 82+ c = toupper(c); 83+ } 84+ if (Name.length() >= 7 && Name.substr(0, 7) == "FEATURE") { 85+ Name = Name.substr(7); 86+ } 87+ return "SYSZ_GRP_" + Name; 88+} 89+ 90+void EmitMappingInsn(RecordKeeper &RK, raw_ostream &OS) { 91+ OS << "// This is auto-gen data for Capstone engine (www.capstone-engine.org)\n" 92+ "// By Nguyen Anh Quynh <[email protected]>\n" 93+ "\n"; 94+ CodeGenTarget Target(RK); 95+ for (const CodeGenInstruction *Inst : Target.getInstructionsByEnumValue()) { 96+ if (Inst->TheDef->getValueAsBit("isPseudo") || 97+ Inst->TheDef->getValueAsBit("isCodeGenOnly")) { 98+ continue; 99+ } 100+ OS << "{\n" 101+ << "\t" << Target.getName() << "_" << Inst->TheDef->getName() << ", " 102+ << GetPublicName(Inst) << ",\n" 103+ << "#ifndef CAPSTONE_DIET\n" 104+ << "\t{ "; 105+ for (Record *Use : Inst->TheDef->getValueAsListOfDefs("Uses")) { 106+ OS << GetRegisterName(Use) << ", "; 107+ } 108+ OS << "0 }, { "; 109+ for (Record *Def : Inst->TheDef->getValueAsListOfDefs("Defs")) { 110+ OS << GetRegisterName(Def) << ", "; 111+ } 112+ OS << "0 }, { "; 113+ ListInit *Predicates = Inst->TheDef->getValueAsListInit("Predicates"); 114+ for (unsigned i = 0; i < Predicates->size(); ++i) { 115+ OS << GetGroupName(Predicates->getElementAsRecord(i)) << ", "; 116+ } 117+ OS << "0 }, " 118+ << Inst->TheDef->getValueAsBit("isBranch") 119+ << ", " 120+ << Inst->TheDef->getValueAsBit("isIndirectBranch") 121+ << "\n" 122+ << "#endif\n" 123+ << "},\n"; 124+ } 125+} 126+#endif 127+ 128 } // end llvm namespace 129diff --git a/utils/TableGen/TableGen.cpp b/utils/TableGen/TableGen.cpp 130index cf1404d8769..bbb4e860536 100644 131--- a/utils/TableGen/TableGen.cpp 132+++ b/utils/TableGen/TableGen.cpp 133@@ -27,6 +27,7 @@ enum ActionType { 134 GenEmitter, 135 GenRegisterInfo, 136 GenInstrInfo, 137+ MappingInsn, 138 GenInstrDocs, 139 GenAsmWriter, 140 GenAsmMatcher, 141@@ -65,6 +66,8 @@ namespace { 142 "Generate registers and register classes info"), 143 clEnumValN(GenInstrInfo, "gen-instr-info", 144 "Generate instruction descriptions"), 145+ clEnumValN(MappingInsn, "mapping-insn", 146+ ""), 147 clEnumValN(GenInstrDocs, "gen-instr-docs", 148 "Generate instruction documentation"), 149 clEnumValN(GenCallingConv, "gen-callingconv", 150@@ -135,6 +138,9 @@ bool LLVMTableGenMain(raw_ostream &OS, RecordKeeper &Records) { 151 case GenInstrInfo: 152 EmitInstrInfo(Records, OS); 153 break; 154+ case MappingInsn: 155+ EmitMappingInsn(Records, OS); 156+ break; 157 case GenInstrDocs: 158 EmitInstrDocs(Records, OS); 159 break; 160diff --git a/utils/TableGen/TableGenBackends.h b/utils/TableGen/TableGenBackends.h 161index 1329a6d833f..a41e46b1db0 100644 162--- a/utils/TableGen/TableGenBackends.h 163+++ b/utils/TableGen/TableGenBackends.h 164@@ -75,6 +75,7 @@ void EmitDFAPacketizer(RecordKeeper &RK, raw_ostream &OS); 165 void EmitDisassembler(RecordKeeper &RK, raw_ostream &OS); 166 void EmitFastISel(RecordKeeper &RK, raw_ostream &OS); 167 void EmitInstrInfo(RecordKeeper &RK, raw_ostream &OS); 168+void EmitMappingInsn(RecordKeeper &RK, raw_ostream &OS); 169 void EmitInstrDocs(RecordKeeper &RK, raw_ostream &OS); 170 void EmitPseudoLowering(RecordKeeper &RK, raw_ostream &OS); 171 void EmitCompressInst(RecordKeeper &RK, raw_ostream &OS); 172-- 1732.19.1 174 175