1 // 2 // Copyright © 2022 Arm Ltd and Contributors. All rights reserved. 3 // SPDX-License-Identifier: MIT 4 // 5 6 #include <ResolveType.hpp> 7 8 #include <backendsCommon/MemSyncWorkload.hpp> 9 #include <armnn/backends/TensorHandle.hpp> 10 11 #include <cstring> 12 13 namespace armnn 14 { 15 SyncMemGenericWorkload(const MemSyncQueueDescriptor & descriptor,const WorkloadInfo & info)16SyncMemGenericWorkload::SyncMemGenericWorkload(const MemSyncQueueDescriptor& descriptor, 17 const WorkloadInfo& info) 18 : BaseWorkload<MemSyncQueueDescriptor>(descriptor, info) 19 { 20 m_TensorHandle = descriptor.m_Inputs[0]; 21 } 22 Execute() const23void SyncMemGenericWorkload::Execute() const 24 { 25 ARMNN_SCOPED_PROFILING_EVENT(Compute::Undefined, "SyncMemGeneric_Execute"); 26 m_TensorHandle->Map(true); 27 m_TensorHandle->Unmap(); 28 } 29 ExecuteAsync(ExecutionData & executionData)30void SyncMemGenericWorkload::ExecuteAsync(ExecutionData& executionData) 31 { 32 ARMNN_SCOPED_PROFILING_EVENT(Compute::Undefined, "SyncMemGeneric_Execute_WorkingMemDescriptor"); 33 34 WorkingMemDescriptor* workingMemDescriptor = static_cast<WorkingMemDescriptor*>(executionData.m_Data); 35 workingMemDescriptor->m_Inputs[0]->Map(true); 36 workingMemDescriptor->m_Inputs[0]->Unmap(); 37 } 38 39 } //namespace armnn 40