xref: /aosp_15_r20/external/arm-trusted-firmware/plat/rockchip/rk3399/platform.mk (revision 54fd6939e177f8ff529b10183254802c76df6d08)
1#
2# Copyright (c) 2016-2020, ARM Limited and Contributors. All rights reserved.
3#
4# SPDX-License-Identifier: BSD-3-Clause
5#
6
7RK_PLAT		:=	plat/rockchip
8RK_PLAT_SOC	:=	${RK_PLAT}/${PLAT}
9RK_PLAT_COMMON	:=	${RK_PLAT}/common
10
11DISABLE_BIN_GENERATION	:=	1
12
13PLAT_INCLUDES		:=	-I${RK_PLAT_COMMON}/			\
14				-I${RK_PLAT_COMMON}/include/		\
15				-I${RK_PLAT_COMMON}/aarch64/		\
16				-I${RK_PLAT_COMMON}/drivers/pmu/	\
17				-I${RK_PLAT_SOC}/			\
18				-I${RK_PLAT_SOC}/drivers/pmu/		\
19				-I${RK_PLAT_SOC}/drivers/pwm/		\
20				-I${RK_PLAT_SOC}/drivers/secure/	\
21				-I${RK_PLAT_SOC}/drivers/soc/		\
22				-I${RK_PLAT_SOC}/drivers/dram/		\
23				-I${RK_PLAT_SOC}/drivers/dp/		\
24				-I${RK_PLAT_SOC}/include/		\
25				-I${RK_PLAT_SOC}/include/shared/	\
26
27# Include GICv3 driver files
28include drivers/arm/gic/v3/gicv3.mk
29
30RK_GIC_SOURCES		:=	${GICV3_SOURCES}			\
31				plat/common/plat_gicv3.c		\
32				${RK_PLAT}/common/rockchip_gicv3.c
33
34PLAT_BL_COMMON_SOURCES	:=	lib/bl_aux_params/bl_aux_params.c		\
35				lib/xlat_tables/xlat_tables_common.c	\
36				lib/xlat_tables/aarch64/xlat_tables.c	\
37				plat/common/aarch64/crash_console_helpers.S \
38				plat/common/plat_psci_common.c
39
40ifneq (${ENABLE_STACK_PROTECTOR},0)
41PLAT_BL_COMMON_SOURCES	+=	${RK_PLAT_COMMON}/rockchip_stack_protector.c
42endif
43
44BL31_SOURCES	+=	${RK_GIC_SOURCES}				\
45			drivers/arm/cci/cci.c				\
46			drivers/ti/uart/aarch64/16550_console.S		\
47			drivers/delay_timer/delay_timer.c		\
48			drivers/delay_timer/generic_delay_timer.c	\
49			drivers/gpio/gpio.c				\
50			lib/cpus/aarch64/cortex_a53.S			\
51			lib/cpus/aarch64/cortex_a72.S			\
52			${RK_PLAT_COMMON}/aarch64/plat_helpers.S	\
53			${RK_PLAT_COMMON}/bl31_plat_setup.c		\
54			${RK_PLAT_COMMON}/params_setup.c		\
55			${RK_PLAT_COMMON}/aarch64/pmu_sram_cpus_on.S	\
56			${RK_PLAT_COMMON}/plat_pm.c			\
57			${RK_PLAT_COMMON}/plat_topology.c		\
58			${RK_PLAT_COMMON}/aarch64/platform_common.c	\
59			${RK_PLAT_COMMON}/rockchip_sip_svc.c		\
60			${RK_PLAT_SOC}/plat_sip_calls.c			\
61			${RK_PLAT_SOC}/drivers/gpio/rk3399_gpio.c	\
62			${RK_PLAT_SOC}/drivers/pmu/pmu.c		\
63			${RK_PLAT_SOC}/drivers/pmu/pmu_fw.c		\
64			${RK_PLAT_SOC}/drivers/pmu/m0_ctl.c		\
65			${RK_PLAT_SOC}/drivers/pwm/pwm.c		\
66			${RK_PLAT_SOC}/drivers/secure/secure.c		\
67			${RK_PLAT_SOC}/drivers/soc/soc.c		\
68			${RK_PLAT_SOC}/drivers/dram/dfs.c		\
69			${RK_PLAT_SOC}/drivers/dram/dram.c		\
70			${RK_PLAT_SOC}/drivers/dram/dram_spec_timing.c	\
71			${RK_PLAT_SOC}/drivers/dram/suspend.c
72
73include lib/coreboot/coreboot.mk
74include lib/libfdt/libfdt.mk
75
76$(eval $(call add_define,PLAT_EXTRA_LD_SCRIPT))
77
78# Enable workarounds for selected Cortex-A53 erratas.
79ERRATA_A53_855873	:=	1
80
81# M0 source build
82PLAT_M0                 :=      ${PLAT}m0
83BUILD_M0		:=	${BUILD_PLAT}/m0
84
85RK3399M0FW=${BUILD_M0}/${PLAT_M0}.bin
86$(eval $(call add_define_val,RK3399M0FW,\"$(RK3399M0FW)\"))
87
88RK3399M0PMUFW=${BUILD_M0}/${PLAT_M0}pmu.bin
89$(eval $(call add_define_val,RK3399M0PMUFW,\"$(RK3399M0PMUFW)\"))
90
91ifdef PLAT_RK_DP_HDCP
92BL31_SOURCES	+= ${RK_PLAT_SOC}/drivers/dp/cdn_dp.c
93
94HDCPFW=${RK_PLAT_SOC}/drivers/dp/hdcp.bin
95$(eval $(call add_define_val,HDCPFW,\"$(HDCPFW)\"))
96
97${BUILD_PLAT}/bl31/cdn_dp.o: CCACHE_EXTRAFILES=$(HDCPFW)
98${RK_PLAT_SOC}/drivers/dp/cdn_dp.c: $(HDCPFW)
99endif
100
101# CCACHE_EXTRAFILES is needed because ccache doesn't handle .incbin
102export CCACHE_EXTRAFILES
103${BUILD_PLAT}/bl31/pmu_fw.o: CCACHE_EXTRAFILES=$(RK3399M0FW):$(RK3399M0PMUFW)
104${RK_PLAT_SOC}/drivers/pmu/pmu_fw.c: $(RK3399M0FW)
105
106$(eval $(call MAKE_PREREQ_DIR,${BUILD_M0},${BUILD_PLAT}))
107.PHONY: $(RK3399M0FW)
108$(RK3399M0FW): | ${BUILD_M0}
109	$(MAKE) -C ${RK_PLAT_SOC}/drivers/m0 BUILD=$(abspath ${BUILD_PLAT}/m0)
110
111# Do not enable SVE
112ENABLE_SVE_FOR_NS	:=	0
113