xref: /aosp_15_r20/external/arm-trusted-firmware/plat/rockchip/rk3399/drivers/pmu/m0_ctl.h (revision 54fd6939e177f8ff529b10183254802c76df6d08)
1 /*
2  * Copyright (c) 2016, ARM Limited and Contributors. All rights reserved.
3  *
4  * SPDX-License-Identifier: BSD-3-Clause
5  */
6 
7 #ifndef M0_CTL_H
8 #define M0_CTL_H
9 
10 #include <m0_param.h>
11 
12 #define M0_BINCODE_BASE 	((uintptr_t)rk3399m0_bin)
13 #define M0_PARAM_ADDR		(M0_BINCODE_BASE + PARAM_ADDR)
14 #define M0PMU_BINCODE_BASE	((uintptr_t)rk3399m0pmu_bin)
15 
16 /* pmu_fw.c */
17 extern char rk3399m0_bin[];
18 extern char rk3399m0_bin_end[];
19 
20 extern char rk3399m0pmu_bin[];
21 extern char rk3399m0pmu_bin_end[];
22 
23 extern void m0_init(void);
24 extern void m0_start(void);
25 extern void m0_stop(void);
26 extern void m0_wait_done(void);
27 extern void m0_configure_execute_addr(uintptr_t addr);
28 
29 #endif /* M0_CTL_H */
30