1*54fd6939SJiyong Park# 2*54fd6939SJiyong Park# Copyright (c) 2017-2019, ARM Limited and Contributors. All rights reserved. 3*54fd6939SJiyong Park# 4*54fd6939SJiyong Park# SPDX-License-Identifier: BSD-3-Clause 5*54fd6939SJiyong Park# 6*54fd6939SJiyong Park 7*54fd6939SJiyong Parkinclude drivers/arm/gic/v2/gicv2.mk 8*54fd6939SJiyong Park 9*54fd6939SJiyong ParkRK_PLAT := plat/rockchip 10*54fd6939SJiyong ParkRK_PLAT_SOC := ${RK_PLAT}/${PLAT} 11*54fd6939SJiyong ParkRK_PLAT_COMMON := ${RK_PLAT}/common 12*54fd6939SJiyong Park 13*54fd6939SJiyong ParkDISABLE_BIN_GENERATION := 1 14*54fd6939SJiyong Park 15*54fd6939SJiyong ParkPLAT_INCLUDES := -Idrivers/arm/gic/common/ \ 16*54fd6939SJiyong Park -Idrivers/arm/gic/v2/ \ 17*54fd6939SJiyong Park -I${RK_PLAT_COMMON}/ \ 18*54fd6939SJiyong Park -I${RK_PLAT_COMMON}/include/ \ 19*54fd6939SJiyong Park -I${RK_PLAT_COMMON}/aarch64/ \ 20*54fd6939SJiyong Park -I${RK_PLAT_COMMON}/drivers/pmu/ \ 21*54fd6939SJiyong Park -I${RK_PLAT_COMMON}/drivers/parameter/ \ 22*54fd6939SJiyong Park -I${RK_PLAT_SOC}/ \ 23*54fd6939SJiyong Park -I${RK_PLAT_SOC}/drivers/pmu/ \ 24*54fd6939SJiyong Park -I${RK_PLAT_SOC}/drivers/soc/ \ 25*54fd6939SJiyong Park -I${RK_PLAT_SOC}/include/ 26*54fd6939SJiyong Park 27*54fd6939SJiyong ParkRK_GIC_SOURCES := ${GICV2_SOURCES} \ 28*54fd6939SJiyong Park plat/common/plat_gicv2.c \ 29*54fd6939SJiyong Park ${RK_PLAT}/common/rockchip_gicv2.c 30*54fd6939SJiyong Park 31*54fd6939SJiyong ParkPLAT_BL_COMMON_SOURCES := lib/bl_aux_params/bl_aux_params.c \ 32*54fd6939SJiyong Park lib/xlat_tables/aarch64/xlat_tables.c \ 33*54fd6939SJiyong Park lib/xlat_tables/xlat_tables_common.c \ 34*54fd6939SJiyong Park plat/common/aarch64/crash_console_helpers.S \ 35*54fd6939SJiyong Park plat/common/plat_psci_common.c 36*54fd6939SJiyong Park 37*54fd6939SJiyong Parkifneq (${ENABLE_STACK_PROTECTOR},0) 38*54fd6939SJiyong ParkPLAT_BL_COMMON_SOURCES += ${RK_PLAT_COMMON}/rockchip_stack_protector.c 39*54fd6939SJiyong Parkendif 40*54fd6939SJiyong Park 41*54fd6939SJiyong ParkBL31_SOURCES += ${RK_GIC_SOURCES} \ 42*54fd6939SJiyong Park drivers/arm/cci/cci.c \ 43*54fd6939SJiyong Park drivers/ti/uart/aarch64/16550_console.S \ 44*54fd6939SJiyong Park drivers/delay_timer/delay_timer.c \ 45*54fd6939SJiyong Park drivers/delay_timer/generic_delay_timer.c \ 46*54fd6939SJiyong Park lib/cpus/aarch64/aem_generic.S \ 47*54fd6939SJiyong Park lib/cpus/aarch64/cortex_a53.S \ 48*54fd6939SJiyong Park ${RK_PLAT_COMMON}/aarch64/plat_helpers.S \ 49*54fd6939SJiyong Park ${RK_PLAT_COMMON}/params_setup.c \ 50*54fd6939SJiyong Park ${RK_PLAT_COMMON}/bl31_plat_setup.c \ 51*54fd6939SJiyong Park ${RK_PLAT_COMMON}/aarch64/pmu_sram_cpus_on.S \ 52*54fd6939SJiyong Park ${RK_PLAT_COMMON}/plat_pm.c \ 53*54fd6939SJiyong Park ${RK_PLAT_COMMON}/plat_topology.c \ 54*54fd6939SJiyong Park ${RK_PLAT_COMMON}/aarch64/platform_common.c \ 55*54fd6939SJiyong Park ${RK_PLAT_SOC}/drivers/pmu/pmu.c \ 56*54fd6939SJiyong Park ${RK_PLAT_SOC}/drivers/soc/soc.c 57*54fd6939SJiyong Park 58*54fd6939SJiyong Parkifdef PLAT_RK_SECURE_DDR_MINILOADER 59*54fd6939SJiyong ParkBL31_SOURCES += ${RK_PLAT_COMMON}/drivers/parameter/ddr_parameter.c 60*54fd6939SJiyong Parkendif 61*54fd6939SJiyong Park 62*54fd6939SJiyong Parkinclude lib/coreboot/coreboot.mk 63*54fd6939SJiyong Parkinclude lib/libfdt/libfdt.mk 64*54fd6939SJiyong Park 65*54fd6939SJiyong Park# Enable workarounds for selected Cortex-A53 errata 66*54fd6939SJiyong ParkERRATA_A53_855873 := 1 67*54fd6939SJiyong Park 68*54fd6939SJiyong Park$(eval $(call add_define,PLAT_EXTRA_LD_SCRIPT)) 69*54fd6939SJiyong Park$(eval $(call add_define,PLAT_SKIP_OPTEE_S_EL1_INT_REGISTER)) 70*54fd6939SJiyong Park 71*54fd6939SJiyong Park# Do not enable SVE 72*54fd6939SJiyong ParkENABLE_SVE_FOR_NS := 0 73*54fd6939SJiyong Park 74*54fd6939SJiyong ParkWORKAROUND_CVE_2017_5715 := 0 75