1# 2# Copyright (c) 2017-2019, ARM Limited and Contributors. All rights reserved. 3# 4# SPDX-License-Identifier: BSD-3-Clause 5# 6 7include drivers/arm/gic/v2/gicv2.mk 8 9RK_PLAT := plat/rockchip 10RK_PLAT_SOC := ${RK_PLAT}/${PLAT} 11RK_PLAT_COMMON := ${RK_PLAT}/common 12 13DISABLE_BIN_GENERATION := 1 14 15PLAT_INCLUDES := -Idrivers/arm/gic/common/ \ 16 -Idrivers/arm/gic/v2/ \ 17 -I${RK_PLAT_COMMON}/ \ 18 -I${RK_PLAT_COMMON}/include/ \ 19 -I${RK_PLAT_COMMON}/aarch64/ \ 20 -I${RK_PLAT_COMMON}/drivers/pmu/ \ 21 -I${RK_PLAT_COMMON}/drivers/parameter/ \ 22 -I${RK_PLAT_SOC}/ \ 23 -I${RK_PLAT_SOC}/drivers/pmu/ \ 24 -I${RK_PLAT_SOC}/drivers/soc/ \ 25 -I${RK_PLAT_SOC}/include/ 26 27RK_GIC_SOURCES := ${GICV2_SOURCES} \ 28 plat/common/plat_gicv2.c \ 29 ${RK_PLAT}/common/rockchip_gicv2.c 30 31PLAT_BL_COMMON_SOURCES := lib/bl_aux_params/bl_aux_params.c \ 32 lib/xlat_tables/aarch64/xlat_tables.c \ 33 lib/xlat_tables/xlat_tables_common.c \ 34 plat/common/aarch64/crash_console_helpers.S \ 35 plat/common/plat_psci_common.c 36 37ifneq (${ENABLE_STACK_PROTECTOR},0) 38PLAT_BL_COMMON_SOURCES += ${RK_PLAT_COMMON}/rockchip_stack_protector.c 39endif 40 41BL31_SOURCES += ${RK_GIC_SOURCES} \ 42 drivers/arm/cci/cci.c \ 43 drivers/ti/uart/aarch64/16550_console.S \ 44 drivers/delay_timer/delay_timer.c \ 45 drivers/delay_timer/generic_delay_timer.c \ 46 lib/cpus/aarch64/aem_generic.S \ 47 lib/cpus/aarch64/cortex_a53.S \ 48 ${RK_PLAT_COMMON}/aarch64/plat_helpers.S \ 49 ${RK_PLAT_COMMON}/params_setup.c \ 50 ${RK_PLAT_COMMON}/bl31_plat_setup.c \ 51 ${RK_PLAT_COMMON}/aarch64/pmu_sram_cpus_on.S \ 52 ${RK_PLAT_COMMON}/plat_pm.c \ 53 ${RK_PLAT_COMMON}/plat_topology.c \ 54 ${RK_PLAT_COMMON}/aarch64/platform_common.c \ 55 ${RK_PLAT_SOC}/drivers/pmu/pmu.c \ 56 ${RK_PLAT_SOC}/drivers/soc/soc.c 57 58ifdef PLAT_RK_SECURE_DDR_MINILOADER 59BL31_SOURCES += ${RK_PLAT_COMMON}/drivers/parameter/ddr_parameter.c 60endif 61 62include lib/coreboot/coreboot.mk 63include lib/libfdt/libfdt.mk 64 65# Enable workarounds for selected Cortex-A53 errata 66ERRATA_A53_855873 := 1 67 68$(eval $(call add_define,PLAT_EXTRA_LD_SCRIPT)) 69$(eval $(call add_define,PLAT_SKIP_OPTEE_S_EL1_INT_REGISTER)) 70 71# Do not enable SVE 72ENABLE_SVE_FOR_NS := 0 73 74WORKAROUND_CVE_2017_5715 := 0 75