1 /*
2 * Double-precision vector log2 function.
3 *
4 * Copyright (c) 2022-2024, Arm Limited.
5 * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception
6 */
7
8 #include "v_math.h"
9 #include "pl_sig.h"
10 #include "pl_test.h"
11 #include "poly_advsimd_f64.h"
12
13 #define N (1 << V_LOG2_TABLE_BITS)
14
15 static const struct data
16 {
17 uint64x2_t min_norm;
18 uint32x4_t special_bound;
19 float64x2_t poly[5];
20 float64x2_t invln2;
21 uint64x2_t sign_exp_mask;
22 } data = {
23 /* Each coefficient was generated to approximate log(r) for |r| < 0x1.fp-9
24 and N = 128, then scaled by log2(e) in extended precision and rounded back
25 to double precision. */
26 .poly = { V2 (-0x1.71547652b83p-1), V2 (0x1.ec709dc340953p-2),
27 V2 (-0x1.71547651c8f35p-2), V2 (0x1.2777ebe12dda5p-2),
28 V2 (-0x1.ec738d616fe26p-3) },
29 .invln2 = V2 (0x1.71547652b82fep0),
30 .min_norm = V2 (0x0010000000000000), /* asuint64(0x1p-1022). */
31 .special_bound = V4 (0x7fe00000), /* asuint64(inf) - min_norm. */
32 .sign_exp_mask = V2 (0xfff0000000000000),
33 };
34
35 #define Off v_u64 (0x3fe6900900000000)
36 #define IndexMask (N - 1)
37
38 struct entry
39 {
40 float64x2_t invc;
41 float64x2_t log2c;
42 };
43
44 static inline struct entry
lookup(uint64x2_t i)45 lookup (uint64x2_t i)
46 {
47 struct entry e;
48 uint64_t i0
49 = (vgetq_lane_u64 (i, 0) >> (52 - V_LOG2_TABLE_BITS)) & IndexMask;
50 uint64_t i1
51 = (vgetq_lane_u64 (i, 1) >> (52 - V_LOG2_TABLE_BITS)) & IndexMask;
52 float64x2_t e0 = vld1q_f64 (&__v_log2_data.table[i0].invc);
53 float64x2_t e1 = vld1q_f64 (&__v_log2_data.table[i1].invc);
54 e.invc = vuzp1q_f64 (e0, e1);
55 e.log2c = vuzp2q_f64 (e0, e1);
56 return e;
57 }
58
59 static float64x2_t VPCS_ATTR NOINLINE
special_case(float64x2_t x,float64x2_t y,float64x2_t w,float64x2_t r2,uint32x2_t special)60 special_case (float64x2_t x, float64x2_t y, float64x2_t w, float64x2_t r2,
61 uint32x2_t special)
62 {
63 return v_call_f64 (log2, x, vfmaq_f64 (w, r2, y), vmovl_u32 (special));
64 }
65
66 /* Double-precision vector log2 routine. Implements the same algorithm as
67 vector log10, with coefficients and table entries scaled in extended
68 precision. The maximum observed error is 2.58 ULP:
69 _ZGVnN2v_log2(0x1.0b556b093869bp+0) got 0x1.fffb34198d9dap-5
70 want 0x1.fffb34198d9ddp-5. */
V_NAME_D1(log2)71 float64x2_t VPCS_ATTR V_NAME_D1 (log2) (float64x2_t x)
72 {
73 const struct data *d = ptr_barrier (&data);
74 uint64x2_t ix = vreinterpretq_u64_f64 (x);
75 uint32x2_t special = vcge_u32 (vsubhn_u64 (ix, d->min_norm),
76 vget_low_u32 (d->special_bound));
77
78 /* x = 2^k z; where z is in range [Off,2*Off) and exact.
79 The range is split into N subintervals.
80 The ith subinterval contains z and c is near its center. */
81 uint64x2_t tmp = vsubq_u64 (ix, Off);
82 int64x2_t k = vshrq_n_s64 (vreinterpretq_s64_u64 (tmp), 52);
83 uint64x2_t iz = vsubq_u64 (ix, vandq_u64 (tmp, d->sign_exp_mask));
84 float64x2_t z = vreinterpretq_f64_u64 (iz);
85
86 struct entry e = lookup (tmp);
87
88 /* log2(x) = log1p(z/c-1)/log(2) + log2(c) + k. */
89
90 float64x2_t r = vfmaq_f64 (v_f64 (-1.0), z, e.invc);
91 float64x2_t kd = vcvtq_f64_s64 (k);
92 float64x2_t w = vfmaq_f64 (e.log2c, r, d->invln2);
93
94 float64x2_t r2 = vmulq_f64 (r, r);
95 float64x2_t y = v_pw_horner_4_f64 (r, r2, d->poly);
96 w = vaddq_f64 (kd, w);
97
98 if (unlikely (v_any_u32h (special)))
99 return special_case (x, y, w, r2, special);
100 return vfmaq_f64 (w, r2, y);
101 }
102
103 PL_SIG (V, D, 1, log2, 0.01, 11.1)
104 PL_TEST_ULP (V_NAME_D1 (log2), 2.09)
105 PL_TEST_EXPECT_FENV_ALWAYS (V_NAME_D1 (log2))
106 PL_TEST_INTERVAL (V_NAME_D1 (log2), -0.0, -0x1p126, 100)
107 PL_TEST_INTERVAL (V_NAME_D1 (log2), 0x1p-149, 0x1p-126, 4000)
108 PL_TEST_INTERVAL (V_NAME_D1 (log2), 0x1p-126, 0x1p-23, 50000)
109 PL_TEST_INTERVAL (V_NAME_D1 (log2), 0x1p-23, 1.0, 50000)
110 PL_TEST_INTERVAL (V_NAME_D1 (log2), 1.0, 100, 50000)
111 PL_TEST_INTERVAL (V_NAME_D1 (log2), 100, inf, 50000)
112