xref: /aosp_15_r20/external/arm-optimized-routines/pl/math/v_log10_2u5.c (revision 412f47f9e737e10ed5cc46ec6a8d7fa2264f8a14)
1 /*
2  * Double-precision vector log10(x) function.
3  *
4  * Copyright (c) 2022-2024, Arm Limited.
5  * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception
6  */
7 
8 #include "v_math.h"
9 #include "pl_sig.h"
10 #include "pl_test.h"
11 #include "poly_advsimd_f64.h"
12 
13 #define N (1 << V_LOG10_TABLE_BITS)
14 
15 static const struct data
16 {
17   uint64x2_t min_norm;
18   uint32x4_t special_bound;
19   float64x2_t poly[5];
20   float64x2_t invln10, log10_2, ln2;
21   uint64x2_t sign_exp_mask;
22 } data = {
23   /* Computed from log coefficients divided by log(10) then rounded to double
24      precision.  */
25   .poly = { V2 (-0x1.bcb7b1526e506p-3), V2 (0x1.287a7636be1d1p-3),
26 	    V2 (-0x1.bcb7b158af938p-4), V2 (0x1.63c78734e6d07p-4),
27 	    V2 (-0x1.287461742fee4p-4) },
28   .ln2 = V2 (0x1.62e42fefa39efp-1),
29   .invln10 = V2 (0x1.bcb7b1526e50ep-2),
30   .log10_2 = V2 (0x1.34413509f79ffp-2),
31   .min_norm = V2 (0x0010000000000000), /* asuint64(0x1p-1022).  */
32   .special_bound = V4 (0x7fe00000),    /* asuint64(inf) - min_norm.  */
33   .sign_exp_mask = V2 (0xfff0000000000000),
34 };
35 
36 #define Off v_u64 (0x3fe6900900000000)
37 #define IndexMask (N - 1)
38 
39 #define T(s, i) __v_log10_data.s[i]
40 
41 struct entry
42 {
43   float64x2_t invc;
44   float64x2_t log10c;
45 };
46 
47 static inline struct entry
lookup(uint64x2_t i)48 lookup (uint64x2_t i)
49 {
50   struct entry e;
51   uint64_t i0
52       = (vgetq_lane_u64 (i, 0) >> (52 - V_LOG10_TABLE_BITS)) & IndexMask;
53   uint64_t i1
54       = (vgetq_lane_u64 (i, 1) >> (52 - V_LOG10_TABLE_BITS)) & IndexMask;
55   float64x2_t e0 = vld1q_f64 (&__v_log10_data.table[i0].invc);
56   float64x2_t e1 = vld1q_f64 (&__v_log10_data.table[i1].invc);
57   e.invc = vuzp1q_f64 (e0, e1);
58   e.log10c = vuzp2q_f64 (e0, e1);
59   return e;
60 }
61 
62 static float64x2_t VPCS_ATTR NOINLINE
special_case(float64x2_t x,float64x2_t y,float64x2_t hi,float64x2_t r2,uint32x2_t special)63 special_case (float64x2_t x, float64x2_t y, float64x2_t hi, float64x2_t r2,
64 	      uint32x2_t special)
65 {
66   return v_call_f64 (log10, x, vfmaq_f64 (hi, r2, y), vmovl_u32 (special));
67 }
68 
69 /* Fast implementation of double-precision vector log10
70    is a slight modification of double-precision vector log.
71    Max ULP error: < 2.5 ulp (nearest rounding.)
72    Maximum measured at 2.46 ulp for x in [0.96, 0.97]
73    _ZGVnN2v_log10(0x1.13192407fcb46p+0) got 0x1.fff6be3cae4bbp-6
74 				       want 0x1.fff6be3cae4b9p-6.  */
V_NAME_D1(log10)75 float64x2_t VPCS_ATTR V_NAME_D1 (log10) (float64x2_t x)
76 {
77   const struct data *d = ptr_barrier (&data);
78   uint64x2_t ix = vreinterpretq_u64_f64 (x);
79   uint32x2_t special = vcge_u32 (vsubhn_u64 (ix, d->min_norm),
80 				 vget_low_u32 (d->special_bound));
81 
82   /* x = 2^k z; where z is in range [OFF,2*OFF) and exact.
83      The range is split into N subintervals.
84      The ith subinterval contains z and c is near its center.  */
85   uint64x2_t tmp = vsubq_u64 (ix, Off);
86   int64x2_t k = vshrq_n_s64 (vreinterpretq_s64_u64 (tmp), 52);
87   uint64x2_t iz = vsubq_u64 (ix, vandq_u64 (tmp, d->sign_exp_mask));
88   float64x2_t z = vreinterpretq_f64_u64 (iz);
89 
90   struct entry e = lookup (tmp);
91 
92   /* log10(x) = log1p(z/c-1)/log(10) + log10(c) + k*log10(2).  */
93   float64x2_t r = vfmaq_f64 (v_f64 (-1.0), z, e.invc);
94   float64x2_t kd = vcvtq_f64_s64 (k);
95 
96   /* hi = r / log(10) + log10(c) + k*log10(2).
97      Constants in v_log10_data.c are computed (in extended precision) as
98      e.log10c := e.logc * ivln10.  */
99   float64x2_t w = vfmaq_f64 (e.log10c, r, d->invln10);
100 
101   /* y = log10(1+r) + n * log10(2).  */
102   float64x2_t hi = vfmaq_f64 (w, kd, d->log10_2);
103 
104   /* y = r2*(A0 + r*A1 + r2*(A2 + r*A3 + r2*A4)) + hi.  */
105   float64x2_t r2 = vmulq_f64 (r, r);
106   float64x2_t y = v_pw_horner_4_f64 (r, r2, d->poly);
107 
108   if (unlikely (v_any_u32h (special)))
109     return special_case (x, y, hi, r2, special);
110   return vfmaq_f64 (hi, r2, y);
111 }
112 
113 PL_SIG (V, D, 1, log10, 0.01, 11.1)
114 PL_TEST_ULP (V_NAME_D1 (log10), 1.97)
115 PL_TEST_EXPECT_FENV_ALWAYS (V_NAME_D1 (log10))
116 PL_TEST_INTERVAL (V_NAME_D1 (log10), -0.0, -inf, 1000)
117 PL_TEST_INTERVAL (V_NAME_D1 (log10), 0, 0x1p-149, 1000)
118 PL_TEST_INTERVAL (V_NAME_D1 (log10), 0x1p-149, 0x1p-126, 4000)
119 PL_TEST_INTERVAL (V_NAME_D1 (log10), 0x1p-126, 0x1p-23, 50000)
120 PL_TEST_INTERVAL (V_NAME_D1 (log10), 0x1p-23, 1.0, 50000)
121 PL_TEST_INTERVAL (V_NAME_D1 (log10), 1.0, 100, 50000)
122 PL_TEST_INTERVAL (V_NAME_D1 (log10), 100, inf, 50000)
123