1 /*
2 * Single-precision vector 10^x function.
3 *
4 * Copyright (c) 2023-2024, Arm Limited.
5 * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception
6 */
7
8 #include "mathlib.h"
9 #include "v_math.h"
10 #include "pl_sig.h"
11 #include "pl_test.h"
12 #include "poly_advsimd_f32.h"
13
14 #define ScaleBound 192.0f
15
16 static const struct data
17 {
18 float32x4_t poly[5];
19 float log10_2_and_inv[4];
20 float32x4_t shift;
21
22 #if !WANT_SIMD_EXCEPT
23 float32x4_t scale_thresh;
24 #endif
25 } data = {
26 /* Coefficients generated using Remez algorithm with minimisation of relative
27 error.
28 rel error: 0x1.89dafa3p-24
29 abs error: 0x1.167d55p-23 in [-log10(2)/2, log10(2)/2]
30 maxerr: 1.85943 +0.5 ulp. */
31 .poly = { V4 (0x1.26bb16p+1f), V4 (0x1.5350d2p+1f), V4 (0x1.04744ap+1f),
32 V4 (0x1.2d8176p+0f), V4 (0x1.12b41ap-1f) },
33 .shift = V4 (0x1.8p23f),
34
35 /* Stores constants 1/log10(2), log10(2)_high, log10(2)_low, 0. */
36 .log10_2_and_inv = { 0x1.a934fp+1, 0x1.344136p-2, -0x1.ec10cp-27, 0 },
37 #if !WANT_SIMD_EXCEPT
38 .scale_thresh = V4 (ScaleBound)
39 #endif
40 };
41
42 #define ExponentBias v_u32 (0x3f800000)
43
44 #if WANT_SIMD_EXCEPT
45
46 # define SpecialBound 38.0f /* rint(log10(2^127)). */
47 # define TinyBound v_u32 (0x20000000) /* asuint (0x1p-63). */
48 # define BigBound v_u32 (0x42180000) /* asuint (SpecialBound). */
49 # define Thres v_u32 (0x22180000) /* BigBound - TinyBound. */
50
51 static float32x4_t VPCS_ATTR NOINLINE
special_case(float32x4_t x,float32x4_t y,uint32x4_t cmp)52 special_case (float32x4_t x, float32x4_t y, uint32x4_t cmp)
53 {
54 /* If fenv exceptions are to be triggered correctly, fall back to the scalar
55 routine to special lanes. */
56 return v_call_f32 (exp10f, x, y, cmp);
57 }
58
59 #else
60
61 # define SpecialBound 126.0f /* rint (log2 (2^127 / (1 + sqrt (2)))). */
62 # define SpecialOffset v_u32 (0x82000000)
63 # define SpecialBias v_u32 (0x7f000000)
64
65 static float32x4_t VPCS_ATTR NOINLINE
special_case(float32x4_t poly,float32x4_t n,uint32x4_t e,uint32x4_t cmp1,float32x4_t scale,const struct data * d)66 special_case (float32x4_t poly, float32x4_t n, uint32x4_t e, uint32x4_t cmp1,
67 float32x4_t scale, const struct data *d)
68 {
69 /* 2^n may overflow, break it up into s1*s2. */
70 uint32x4_t b = vandq_u32 (vclezq_f32 (n), SpecialOffset);
71 float32x4_t s1 = vreinterpretq_f32_u32 (vaddq_u32 (b, SpecialBias));
72 float32x4_t s2 = vreinterpretq_f32_u32 (vsubq_u32 (e, b));
73 uint32x4_t cmp2 = vcagtq_f32 (n, d->scale_thresh);
74 float32x4_t r2 = vmulq_f32 (s1, s1);
75 float32x4_t r1 = vmulq_f32 (vfmaq_f32 (s2, poly, s2), s1);
76 /* Similar to r1 but avoids double rounding in the subnormal range. */
77 float32x4_t r0 = vfmaq_f32 (scale, poly, scale);
78 float32x4_t r = vbslq_f32 (cmp1, r1, r0);
79 return vbslq_f32 (cmp2, r2, r);
80 }
81
82 #endif
83
84 /* Fast vector implementation of single-precision exp10.
85 Algorithm is accurate to 2.36 ULP.
86 _ZGVnN4v_exp10f(0x1.be2b36p+1) got 0x1.7e79c4p+11
87 want 0x1.7e79cp+11. */
V_NAME_F1(exp10)88 float32x4_t VPCS_ATTR V_NAME_F1 (exp10) (float32x4_t x)
89 {
90 const struct data *d = ptr_barrier (&data);
91 #if WANT_SIMD_EXCEPT
92 /* asuint(x) - TinyBound >= BigBound - TinyBound. */
93 uint32x4_t cmp = vcgeq_u32 (
94 vsubq_u32 (vreinterpretq_u32_f32 (vabsq_f32 (x)), TinyBound), Thres);
95 float32x4_t xm = x;
96 /* If any lanes are special, mask them with 1 and retain a copy of x to allow
97 special case handler to fix special lanes later. This is only necessary if
98 fenv exceptions are to be triggered correctly. */
99 if (unlikely (v_any_u32 (cmp)))
100 x = v_zerofy_f32 (x, cmp);
101 #endif
102
103 /* exp10(x) = 2^n * 10^r = 2^n * (1 + poly (r)),
104 with poly(r) in [1/sqrt(2), sqrt(2)] and
105 x = r + n * log10 (2), with r in [-log10(2)/2, log10(2)/2]. */
106 float32x4_t log10_2_and_inv = vld1q_f32 (d->log10_2_and_inv);
107 float32x4_t z = vfmaq_laneq_f32 (d->shift, x, log10_2_and_inv, 0);
108 float32x4_t n = vsubq_f32 (z, d->shift);
109 float32x4_t r = vfmsq_laneq_f32 (x, n, log10_2_and_inv, 1);
110 r = vfmsq_laneq_f32 (r, n, log10_2_and_inv, 2);
111 uint32x4_t e = vshlq_n_u32 (vreinterpretq_u32_f32 (z), 23);
112
113 float32x4_t scale = vreinterpretq_f32_u32 (vaddq_u32 (e, ExponentBias));
114
115 #if !WANT_SIMD_EXCEPT
116 uint32x4_t cmp = vcagtq_f32 (n, v_f32 (SpecialBound));
117 #endif
118
119 float32x4_t r2 = vmulq_f32 (r, r);
120 float32x4_t poly
121 = vfmaq_f32 (vmulq_f32 (r, d->poly[0]),
122 v_pairwise_poly_3_f32 (r, r2, d->poly + 1), r2);
123
124 if (unlikely (v_any_u32 (cmp)))
125 #if WANT_SIMD_EXCEPT
126 return special_case (xm, vfmaq_f32 (scale, poly, scale), cmp);
127 #else
128 return special_case (poly, n, e, cmp, scale, d);
129 #endif
130
131 return vfmaq_f32 (scale, poly, scale);
132 }
133
134 PL_SIG (S, F, 1, exp10, -9.9, 9.9)
135 PL_SIG (V, F, 1, exp10, -9.9, 9.9)
136 PL_TEST_ULP (V_NAME_F1 (exp10), 1.86)
137 PL_TEST_EXPECT_FENV (V_NAME_F1 (exp10), WANT_SIMD_EXCEPT)
138 PL_TEST_SYM_INTERVAL (V_NAME_F1 (exp10), 0, SpecialBound, 5000)
139 PL_TEST_SYM_INTERVAL (V_NAME_F1 (exp10), SpecialBound, ScaleBound, 5000)
140 PL_TEST_SYM_INTERVAL (V_NAME_F1 (exp10), ScaleBound, inf, 10000)
141