xref: /aosp_15_r20/external/XNNPACK/src/qu8-igemm/gen/8x8c4-minmax-rndnu-neondot.c (revision 4bdc94577ba0e567308109d787f7fec7b531ce36) 
1 // Auto-generated file. Do not edit!
2 //   Template: src/qu8-igemm/c4-neondot.c.in
3 //   Generator: tools/xngen
4 //
5 // Copyright 2020 Google LLC
6 //
7 // This source code is licensed under the BSD-style license found in the
8 // LICENSE file in the root directory of this source tree.
9 
10 #include <assert.h>
11 
12 #include <arm_neon.h>
13 
14 #include <xnnpack/igemm.h>
15 #include <xnnpack/math.h>
16 
17 
xnn_qu8_igemm_minmax_rndnu_ukernel_8x8c4__neondot(size_t mr,size_t nc,size_t kc,size_t ks,const uint8_t ** restrict a,const void * restrict w,uint8_t * restrict c,size_t cm_stride,size_t cn_stride,size_t a_offset,const uint8_t * zero,const union xnn_qu8_conv_minmax_params params[restrict XNN_MIN_ELEMENTS (1)])18 void xnn_qu8_igemm_minmax_rndnu_ukernel_8x8c4__neondot(
19     size_t mr,
20     size_t nc,
21     size_t kc,
22     size_t ks,
23     const uint8_t** restrict a,
24     const void* restrict w,
25     uint8_t* restrict c,
26     size_t cm_stride,
27     size_t cn_stride,
28     size_t a_offset,
29     const uint8_t* zero,
30     const union xnn_qu8_conv_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_OOB_READS
31 {
32   assert(mr != 0);
33   assert(mr <= 8);
34   assert(nc != 0);
35   assert(kc != 0);
36   assert(ks != 0);
37   assert(ks % (8 * sizeof(void*)) == 0);
38   assert(a_offset % sizeof(uint8_t) == 0);
39   assert(a != NULL);
40   assert(w != NULL);
41   assert(c != NULL);
42 
43   kc = round_up_po2(kc, 4 * sizeof(uint8_t));
44   uint8_t* c0 = c;
45   uint8_t* c1 = (uint8_t*) ((uintptr_t) c0 + cm_stride);
46   if XNN_UNPREDICTABLE(mr < 2) {
47     c1 = c0;
48   }
49   uint8_t* c2 = (uint8_t*) ((uintptr_t) c1 + cm_stride);
50   if XNN_UNPREDICTABLE(mr <= 2) {
51     c2 = c1;
52   }
53   uint8_t* c3 = (uint8_t*) ((uintptr_t) c2 + cm_stride);
54   if XNN_UNPREDICTABLE(mr < 4) {
55     c3 = c2;
56   }
57   uint8_t* c4 = (uint8_t*) ((uintptr_t) c3 + cm_stride);
58   if XNN_UNPREDICTABLE(mr <= 4) {
59     c4 = c3;
60   }
61   uint8_t* c5 = (uint8_t*) ((uintptr_t) c4 + cm_stride);
62   if XNN_UNPREDICTABLE(mr < 6) {
63     c5 = c4;
64   }
65   uint8_t* c6 = (uint8_t*) ((uintptr_t) c5 + cm_stride);
66   if XNN_UNPREDICTABLE(mr <= 6) {
67     c6 = c5;
68   }
69   uint8_t* c7 = (uint8_t*) ((uintptr_t) c6 + cm_stride);
70   if XNN_UNPREDICTABLE(mr != 8) {
71     c7 = c6;
72   }
73 
74   const uint8x8_t va_zero_point = vld1_dup_u8(&params->rndnu_neon.kernel_zero_point[0]);
75 
76   do {
77     // Initialize accumulators with bias. 8 bias values are loaded from the
78     // weight matrix, at the start of the group of 8 columns.
79     uint32x4_t vpacc0x0123 = vld1q_u32(w); w = (const void*) ((const uint32_t*) w + 4);
80     uint32x4_t vpacc0x4567 = vld1q_u32(w); w = (const void*) ((const uint32_t*) w + 4);
81     uint32x4_t vpacc1x0123 = vpacc0x0123;
82     uint32x4_t vpacc1x4567 = vpacc0x4567;
83     uint32x4_t vpacc2x0123 = vpacc0x0123;
84     uint32x4_t vpacc2x4567 = vpacc0x4567;
85     uint32x4_t vpacc3x0123 = vpacc0x0123;
86     uint32x4_t vpacc3x4567 = vpacc0x4567;
87     uint32x4_t vpacc4x0123 = vpacc0x0123;
88     uint32x4_t vpacc4x4567 = vpacc0x4567;
89     uint32x4_t vpacc5x0123 = vpacc0x0123;
90     uint32x4_t vpacc5x4567 = vpacc0x4567;
91     uint32x4_t vpacc6x0123 = vpacc0x0123;
92     uint32x4_t vpacc6x4567 = vpacc0x4567;
93     uint32x4_t vpacc7x0123 = vpacc0x0123;
94     uint32x4_t vpacc7x4567 = vpacc0x4567;
95     uint32x2_t vnacc0 = vmov_n_u32(0);
96     uint32x2_t vnacc1 = vmov_n_u32(0);
97     uint32x2_t vnacc2 = vmov_n_u32(0);
98     uint32x2_t vnacc3 = vmov_n_u32(0);
99     uint32x2_t vnacc4 = vmov_n_u32(0);
100     uint32x2_t vnacc5 = vmov_n_u32(0);
101     uint32x2_t vnacc6 = vmov_n_u32(0);
102     uint32x2_t vnacc7 = vmov_n_u32(0);
103 
104     size_t p = ks;
105     do {
106       const uint8_t* restrict a0 = a[0];
107       if XNN_UNPREDICTABLE(a0 != zero) {
108         a0 = (const uint8_t*) ((uintptr_t) a0 + a_offset);
109       }
110       const uint8_t* restrict a1 = a[1];
111       if XNN_UNPREDICTABLE(a1 != zero) {
112         a1 = (const uint8_t*) ((uintptr_t) a1 + a_offset);
113       }
114       const uint8_t* restrict a2 = a[2];
115       if XNN_UNPREDICTABLE(a2 != zero) {
116         a2 = (const uint8_t*) ((uintptr_t) a2 + a_offset);
117       }
118       const uint8_t* restrict a3 = a[3];
119       if XNN_UNPREDICTABLE(a3 != zero) {
120         a3 = (const uint8_t*) ((uintptr_t) a3 + a_offset);
121       }
122       const uint8_t* restrict a4 = a[4];
123       if XNN_UNPREDICTABLE(a4 != zero) {
124         a4 = (const uint8_t*) ((uintptr_t) a4 + a_offset);
125       }
126       const uint8_t* restrict a5 = a[5];
127       if XNN_UNPREDICTABLE(a5 != zero) {
128         a5 = (const uint8_t*) ((uintptr_t) a5 + a_offset);
129       }
130       const uint8_t* restrict a6 = a[6];
131       if XNN_UNPREDICTABLE(a6 != zero) {
132         a6 = (const uint8_t*) ((uintptr_t) a6 + a_offset);
133       }
134       const uint8_t* restrict a7 = a[7];
135       if XNN_UNPREDICTABLE(a7 != zero) {
136         a7 = (const uint8_t*) ((uintptr_t) a7 + a_offset);
137       }
138       a += 8;
139 
140       // Inner accumulation loop along the 8 columns.
141       size_t k = kc;
142       // 2x partial unrolled loop to load 8 bytes at a time.
143       while (k >= 8 * sizeof(uint8_t)) {
144         // Load a 8x8 block of activations.
145         const uint8x8_t va0x01234567 = vld1_u8(a0); a0 += 8;
146         const uint8x8_t va1x01234567 = vld1_u8(a1); a1 += 8;
147         const uint8x8_t va2x01234567 = vld1_u8(a2); a2 += 8;
148         const uint8x8_t va3x01234567 = vld1_u8(a3); a3 += 8;
149         const uint8x8_t va4x01234567 = vld1_u8(a4); a4 += 8;
150         const uint8x8_t va5x01234567 = vld1_u8(a5); a5 += 8;
151         const uint8x8_t va6x01234567 = vld1_u8(a6); a6 += 8;
152         const uint8x8_t va7x01234567 = vld1_u8(a7); a7 += 8;
153 
154         // Load a 8x8 block of weights.
155         const uint8x16_t vb0123x0123 = vld1q_u8(w); w = (const void*) ((const uint8_t*) w + 16);
156         const uint8x16_t vb0123x4567 = vld1q_u8(w); w = (const void*) ((const uint8_t*) w + 16);
157         const uint8x16_t vb4567x0123 = vld1q_u8(w); w = (const void*) ((const uint8_t*) w + 16);
158         const uint8x16_t vb4567x4567 = vld1q_u8(w); w = (const void*) ((const uint8_t*) w + 16);
159 
160         // Multiply-accumulate: 8x8 * 8x8 --> 8x8.
161         vnacc0 = vdot_u32(vnacc0, va_zero_point, va0x01234567);
162         vpacc0x0123 = vdotq_lane_u32(vpacc0x0123, vb0123x0123, va0x01234567, 0);
163         vpacc0x4567 = vdotq_lane_u32(vpacc0x4567, vb0123x4567, va0x01234567, 0);
164         vpacc0x0123 = vdotq_lane_u32(vpacc0x0123, vb4567x0123, va0x01234567, 1);
165         vpacc0x4567 = vdotq_lane_u32(vpacc0x4567, vb4567x4567, va0x01234567, 1);
166         vnacc1 = vdot_u32(vnacc1, va_zero_point, va1x01234567);
167         vpacc1x0123 = vdotq_lane_u32(vpacc1x0123, vb0123x0123, va1x01234567, 0);
168         vpacc1x4567 = vdotq_lane_u32(vpacc1x4567, vb0123x4567, va1x01234567, 0);
169         vpacc1x0123 = vdotq_lane_u32(vpacc1x0123, vb4567x0123, va1x01234567, 1);
170         vpacc1x4567 = vdotq_lane_u32(vpacc1x4567, vb4567x4567, va1x01234567, 1);
171         vnacc2 = vdot_u32(vnacc2, va_zero_point, va2x01234567);
172         vpacc2x0123 = vdotq_lane_u32(vpacc2x0123, vb0123x0123, va2x01234567, 0);
173         vpacc2x4567 = vdotq_lane_u32(vpacc2x4567, vb0123x4567, va2x01234567, 0);
174         vpacc2x0123 = vdotq_lane_u32(vpacc2x0123, vb4567x0123, va2x01234567, 1);
175         vpacc2x4567 = vdotq_lane_u32(vpacc2x4567, vb4567x4567, va2x01234567, 1);
176         vnacc3 = vdot_u32(vnacc3, va_zero_point, va3x01234567);
177         vpacc3x0123 = vdotq_lane_u32(vpacc3x0123, vb0123x0123, va3x01234567, 0);
178         vpacc3x4567 = vdotq_lane_u32(vpacc3x4567, vb0123x4567, va3x01234567, 0);
179         vpacc3x0123 = vdotq_lane_u32(vpacc3x0123, vb4567x0123, va3x01234567, 1);
180         vpacc3x4567 = vdotq_lane_u32(vpacc3x4567, vb4567x4567, va3x01234567, 1);
181         vnacc4 = vdot_u32(vnacc4, va_zero_point, va4x01234567);
182         vpacc4x0123 = vdotq_lane_u32(vpacc4x0123, vb0123x0123, va4x01234567, 0);
183         vpacc4x4567 = vdotq_lane_u32(vpacc4x4567, vb0123x4567, va4x01234567, 0);
184         vpacc4x0123 = vdotq_lane_u32(vpacc4x0123, vb4567x0123, va4x01234567, 1);
185         vpacc4x4567 = vdotq_lane_u32(vpacc4x4567, vb4567x4567, va4x01234567, 1);
186         vnacc5 = vdot_u32(vnacc5, va_zero_point, va5x01234567);
187         vpacc5x0123 = vdotq_lane_u32(vpacc5x0123, vb0123x0123, va5x01234567, 0);
188         vpacc5x4567 = vdotq_lane_u32(vpacc5x4567, vb0123x4567, va5x01234567, 0);
189         vpacc5x0123 = vdotq_lane_u32(vpacc5x0123, vb4567x0123, va5x01234567, 1);
190         vpacc5x4567 = vdotq_lane_u32(vpacc5x4567, vb4567x4567, va5x01234567, 1);
191         vnacc6 = vdot_u32(vnacc6, va_zero_point, va6x01234567);
192         vpacc6x0123 = vdotq_lane_u32(vpacc6x0123, vb0123x0123, va6x01234567, 0);
193         vpacc6x4567 = vdotq_lane_u32(vpacc6x4567, vb0123x4567, va6x01234567, 0);
194         vpacc6x0123 = vdotq_lane_u32(vpacc6x0123, vb4567x0123, va6x01234567, 1);
195         vpacc6x4567 = vdotq_lane_u32(vpacc6x4567, vb4567x4567, va6x01234567, 1);
196         vnacc7 = vdot_u32(vnacc7, va_zero_point, va7x01234567);
197         vpacc7x0123 = vdotq_lane_u32(vpacc7x0123, vb0123x0123, va7x01234567, 0);
198         vpacc7x4567 = vdotq_lane_u32(vpacc7x4567, vb0123x4567, va7x01234567, 0);
199         vpacc7x0123 = vdotq_lane_u32(vpacc7x0123, vb4567x0123, va7x01234567, 1);
200         vpacc7x4567 = vdotq_lane_u32(vpacc7x4567, vb4567x4567, va7x01234567, 1);
201 
202         k -= 8 * sizeof(uint8_t);
203       }
204       // Handle up to 4 final positions of `k`
205       if XNN_UNLIKELY(k != 0) {
206         // Load a 8x4 block of activations.
207         const uint8x8_t va0x01234567 = vreinterpret_u8_u32(vld1_lane_u32((const void*) a0, vmov_n_u32(0), 0)); a0 += 4;
208         const uint8x8_t va1x01234567 = vreinterpret_u8_u32(vld1_lane_u32((const void*) a1, vmov_n_u32(0), 0)); a1 += 4;
209         const uint8x8_t va2x01234567 = vreinterpret_u8_u32(vld1_lane_u32((const void*) a2, vmov_n_u32(0), 0)); a2 += 4;
210         const uint8x8_t va3x01234567 = vreinterpret_u8_u32(vld1_lane_u32((const void*) a3, vmov_n_u32(0), 0)); a3 += 4;
211         const uint8x8_t va4x01234567 = vreinterpret_u8_u32(vld1_lane_u32((const void*) a4, vmov_n_u32(0), 0)); a4 += 4;
212         const uint8x8_t va5x01234567 = vreinterpret_u8_u32(vld1_lane_u32((const void*) a5, vmov_n_u32(0), 0)); a5 += 4;
213         const uint8x8_t va6x01234567 = vreinterpret_u8_u32(vld1_lane_u32((const void*) a6, vmov_n_u32(0), 0)); a6 += 4;
214         const uint8x8_t va7x01234567 = vreinterpret_u8_u32(vld1_lane_u32((const void*) a7, vmov_n_u32(0), 0)); a7 += 4;
215 
216         // Load a 4x8 block of weights.
217         const uint8x16_t vb0123x0123 = vld1q_u8(w); w = (const void*) ((const uint8_t*) w + 16);
218         const uint8x16_t vb0123x4567 = vld1q_u8(w); w = (const void*) ((const uint8_t*) w + 16);
219 
220         // Multiply-accumulate: 8x4 * 4x8 --> 8x8.
221         vnacc0 = vdot_u32(vnacc0, va_zero_point, va0x01234567);
222         vpacc0x0123 = vdotq_lane_u32(vpacc0x0123, vb0123x0123, va0x01234567, 0);
223         vpacc0x4567 = vdotq_lane_u32(vpacc0x4567, vb0123x4567, va0x01234567, 0);
224         vnacc1 = vdot_u32(vnacc1, va_zero_point, va1x01234567);
225         vpacc1x0123 = vdotq_lane_u32(vpacc1x0123, vb0123x0123, va1x01234567, 0);
226         vpacc1x4567 = vdotq_lane_u32(vpacc1x4567, vb0123x4567, va1x01234567, 0);
227         vnacc2 = vdot_u32(vnacc2, va_zero_point, va2x01234567);
228         vpacc2x0123 = vdotq_lane_u32(vpacc2x0123, vb0123x0123, va2x01234567, 0);
229         vpacc2x4567 = vdotq_lane_u32(vpacc2x4567, vb0123x4567, va2x01234567, 0);
230         vnacc3 = vdot_u32(vnacc3, va_zero_point, va3x01234567);
231         vpacc3x0123 = vdotq_lane_u32(vpacc3x0123, vb0123x0123, va3x01234567, 0);
232         vpacc3x4567 = vdotq_lane_u32(vpacc3x4567, vb0123x4567, va3x01234567, 0);
233         vnacc4 = vdot_u32(vnacc4, va_zero_point, va4x01234567);
234         vpacc4x0123 = vdotq_lane_u32(vpacc4x0123, vb0123x0123, va4x01234567, 0);
235         vpacc4x4567 = vdotq_lane_u32(vpacc4x4567, vb0123x4567, va4x01234567, 0);
236         vnacc5 = vdot_u32(vnacc5, va_zero_point, va5x01234567);
237         vpacc5x0123 = vdotq_lane_u32(vpacc5x0123, vb0123x0123, va5x01234567, 0);
238         vpacc5x4567 = vdotq_lane_u32(vpacc5x4567, vb0123x4567, va5x01234567, 0);
239         vnacc6 = vdot_u32(vnacc6, va_zero_point, va6x01234567);
240         vpacc6x0123 = vdotq_lane_u32(vpacc6x0123, vb0123x0123, va6x01234567, 0);
241         vpacc6x4567 = vdotq_lane_u32(vpacc6x4567, vb0123x4567, va6x01234567, 0);
242         vnacc7 = vdot_u32(vnacc7, va_zero_point, va7x01234567);
243         vpacc7x0123 = vdotq_lane_u32(vpacc7x0123, vb0123x0123, va7x01234567, 0);
244         vpacc7x4567 = vdotq_lane_u32(vpacc7x4567, vb0123x4567, va7x01234567, 0);
245       }
246       p -= 8 * sizeof(void*);
247     } while (p != 0);
248 
249     // Subtract zero point from accumulators.
250     vnacc0 = vpadd_u32(vnacc0, vnacc0);
251     const uint32x4_t vnacc0x0123 = vcombine_u32(vnacc0, vnacc0);
252     int32x4_t vacc0x0123 = vreinterpretq_s32_u32(vsubq_u32(vpacc0x0123, vnacc0x0123));
253     int32x4_t vacc0x4567 = vreinterpretq_s32_u32(vsubq_u32(vpacc0x4567, vnacc0x0123));
254     vnacc1 = vpadd_u32(vnacc1, vnacc1);
255     const uint32x4_t vnacc1x0123 = vcombine_u32(vnacc1, vnacc1);
256     int32x4_t vacc1x0123 = vreinterpretq_s32_u32(vsubq_u32(vpacc1x0123, vnacc1x0123));
257     int32x4_t vacc1x4567 = vreinterpretq_s32_u32(vsubq_u32(vpacc1x4567, vnacc1x0123));
258     vnacc2 = vpadd_u32(vnacc2, vnacc2);
259     const uint32x4_t vnacc2x0123 = vcombine_u32(vnacc2, vnacc2);
260     int32x4_t vacc2x0123 = vreinterpretq_s32_u32(vsubq_u32(vpacc2x0123, vnacc2x0123));
261     int32x4_t vacc2x4567 = vreinterpretq_s32_u32(vsubq_u32(vpacc2x4567, vnacc2x0123));
262     vnacc3 = vpadd_u32(vnacc3, vnacc3);
263     const uint32x4_t vnacc3x0123 = vcombine_u32(vnacc3, vnacc3);
264     int32x4_t vacc3x0123 = vreinterpretq_s32_u32(vsubq_u32(vpacc3x0123, vnacc3x0123));
265     int32x4_t vacc3x4567 = vreinterpretq_s32_u32(vsubq_u32(vpacc3x4567, vnacc3x0123));
266     vnacc4 = vpadd_u32(vnacc4, vnacc4);
267     const uint32x4_t vnacc4x0123 = vcombine_u32(vnacc4, vnacc4);
268     int32x4_t vacc4x0123 = vreinterpretq_s32_u32(vsubq_u32(vpacc4x0123, vnacc4x0123));
269     int32x4_t vacc4x4567 = vreinterpretq_s32_u32(vsubq_u32(vpacc4x4567, vnacc4x0123));
270     vnacc5 = vpadd_u32(vnacc5, vnacc5);
271     const uint32x4_t vnacc5x0123 = vcombine_u32(vnacc5, vnacc5);
272     int32x4_t vacc5x0123 = vreinterpretq_s32_u32(vsubq_u32(vpacc5x0123, vnacc5x0123));
273     int32x4_t vacc5x4567 = vreinterpretq_s32_u32(vsubq_u32(vpacc5x4567, vnacc5x0123));
274     vnacc6 = vpadd_u32(vnacc6, vnacc6);
275     const uint32x4_t vnacc6x0123 = vcombine_u32(vnacc6, vnacc6);
276     int32x4_t vacc6x0123 = vreinterpretq_s32_u32(vsubq_u32(vpacc6x0123, vnacc6x0123));
277     int32x4_t vacc6x4567 = vreinterpretq_s32_u32(vsubq_u32(vpacc6x4567, vnacc6x0123));
278     vnacc7 = vpadd_u32(vnacc7, vnacc7);
279     const uint32x4_t vnacc7x0123 = vcombine_u32(vnacc7, vnacc7);
280     int32x4_t vacc7x0123 = vreinterpretq_s32_u32(vsubq_u32(vpacc7x0123, vnacc7x0123));
281     int32x4_t vacc7x4567 = vreinterpretq_s32_u32(vsubq_u32(vpacc7x4567, vnacc7x0123));
282 
283     const int32x4_t vright_pre_shift = vld1q_dup_s32(&params->rndnu_neon.right_pre_shift);
284     const int32x4_t vmultiplier = vld1q_dup_s32(&params->rndnu_neon.multiplier);
285     const int32x4_t vright_post_shift = vld1q_dup_s32(&params->rndnu_neon.right_post_shift);
286 
287     vacc0x0123 = vshlq_s32(vacc0x0123, vright_pre_shift);
288     vacc0x4567 = vshlq_s32(vacc0x4567, vright_pre_shift);
289     vacc1x0123 = vshlq_s32(vacc1x0123, vright_pre_shift);
290     vacc1x4567 = vshlq_s32(vacc1x4567, vright_pre_shift);
291     vacc2x0123 = vshlq_s32(vacc2x0123, vright_pre_shift);
292     vacc2x4567 = vshlq_s32(vacc2x4567, vright_pre_shift);
293     vacc3x0123 = vshlq_s32(vacc3x0123, vright_pre_shift);
294     vacc3x4567 = vshlq_s32(vacc3x4567, vright_pre_shift);
295     vacc4x0123 = vshlq_s32(vacc4x0123, vright_pre_shift);
296     vacc4x4567 = vshlq_s32(vacc4x4567, vright_pre_shift);
297     vacc5x0123 = vshlq_s32(vacc5x0123, vright_pre_shift);
298     vacc5x4567 = vshlq_s32(vacc5x4567, vright_pre_shift);
299     vacc6x0123 = vshlq_s32(vacc6x0123, vright_pre_shift);
300     vacc6x4567 = vshlq_s32(vacc6x4567, vright_pre_shift);
301     vacc7x0123 = vshlq_s32(vacc7x0123, vright_pre_shift);
302     vacc7x4567 = vshlq_s32(vacc7x4567, vright_pre_shift);
303 
304     vacc0x0123 = vqdmulhq_s32(vacc0x0123, vmultiplier);
305     vacc0x4567 = vqdmulhq_s32(vacc0x4567, vmultiplier);
306     vacc1x0123 = vqdmulhq_s32(vacc1x0123, vmultiplier);
307     vacc1x4567 = vqdmulhq_s32(vacc1x4567, vmultiplier);
308     vacc2x0123 = vqdmulhq_s32(vacc2x0123, vmultiplier);
309     vacc2x4567 = vqdmulhq_s32(vacc2x4567, vmultiplier);
310     vacc3x0123 = vqdmulhq_s32(vacc3x0123, vmultiplier);
311     vacc3x4567 = vqdmulhq_s32(vacc3x4567, vmultiplier);
312     vacc4x0123 = vqdmulhq_s32(vacc4x0123, vmultiplier);
313     vacc4x4567 = vqdmulhq_s32(vacc4x4567, vmultiplier);
314     vacc5x0123 = vqdmulhq_s32(vacc5x0123, vmultiplier);
315     vacc5x4567 = vqdmulhq_s32(vacc5x4567, vmultiplier);
316     vacc6x0123 = vqdmulhq_s32(vacc6x0123, vmultiplier);
317     vacc6x4567 = vqdmulhq_s32(vacc6x4567, vmultiplier);
318     vacc7x0123 = vqdmulhq_s32(vacc7x0123, vmultiplier);
319     vacc7x4567 = vqdmulhq_s32(vacc7x4567, vmultiplier);
320 
321     vacc0x0123 = vrshlq_s32(vacc0x0123, vright_post_shift);
322     vacc0x4567 = vrshlq_s32(vacc0x4567, vright_post_shift);
323     vacc1x0123 = vrshlq_s32(vacc1x0123, vright_post_shift);
324     vacc1x4567 = vrshlq_s32(vacc1x4567, vright_post_shift);
325     vacc2x0123 = vrshlq_s32(vacc2x0123, vright_post_shift);
326     vacc2x4567 = vrshlq_s32(vacc2x4567, vright_post_shift);
327     vacc3x0123 = vrshlq_s32(vacc3x0123, vright_post_shift);
328     vacc3x4567 = vrshlq_s32(vacc3x4567, vright_post_shift);
329     vacc4x0123 = vrshlq_s32(vacc4x0123, vright_post_shift);
330     vacc4x4567 = vrshlq_s32(vacc4x4567, vright_post_shift);
331     vacc5x0123 = vrshlq_s32(vacc5x0123, vright_post_shift);
332     vacc5x4567 = vrshlq_s32(vacc5x4567, vright_post_shift);
333     vacc6x0123 = vrshlq_s32(vacc6x0123, vright_post_shift);
334     vacc6x4567 = vrshlq_s32(vacc6x4567, vright_post_shift);
335     vacc7x0123 = vrshlq_s32(vacc7x0123, vright_post_shift);
336     vacc7x4567 = vrshlq_s32(vacc7x4567, vright_post_shift);
337 
338     const int16x8_t voutput_zero_point = vld1q_dup_s16(&params->rndnu_neon.output_zero_point);
339 #if XNN_ARCH_ARM64
340     const int16x8_t vacc0x01234567 = vqaddq_s16(vqmovn_high_s32(vqmovn_s32(vacc0x0123), vacc0x4567), voutput_zero_point);
341     const int16x8_t vacc1x01234567 = vqaddq_s16(vqmovn_high_s32(vqmovn_s32(vacc1x0123), vacc1x4567), voutput_zero_point);
342     const int16x8_t vacc2x01234567 = vqaddq_s16(vqmovn_high_s32(vqmovn_s32(vacc2x0123), vacc2x4567), voutput_zero_point);
343     const int16x8_t vacc3x01234567 = vqaddq_s16(vqmovn_high_s32(vqmovn_s32(vacc3x0123), vacc3x4567), voutput_zero_point);
344     const int16x8_t vacc4x01234567 = vqaddq_s16(vqmovn_high_s32(vqmovn_s32(vacc4x0123), vacc4x4567), voutput_zero_point);
345     const int16x8_t vacc5x01234567 = vqaddq_s16(vqmovn_high_s32(vqmovn_s32(vacc5x0123), vacc5x4567), voutput_zero_point);
346     const int16x8_t vacc6x01234567 = vqaddq_s16(vqmovn_high_s32(vqmovn_s32(vacc6x0123), vacc6x4567), voutput_zero_point);
347     const int16x8_t vacc7x01234567 = vqaddq_s16(vqmovn_high_s32(vqmovn_s32(vacc7x0123), vacc7x4567), voutput_zero_point);
348 
349     uint8x16_t vout0x01234567_1x01234567 = vqmovun_high_s16(vqmovun_s16(vacc0x01234567), vacc1x01234567);
350     uint8x16_t vout2x01234567_3x01234567 = vqmovun_high_s16(vqmovun_s16(vacc2x01234567), vacc3x01234567);
351     uint8x16_t vout4x01234567_5x01234567 = vqmovun_high_s16(vqmovun_s16(vacc4x01234567), vacc5x01234567);
352     uint8x16_t vout6x01234567_7x01234567 = vqmovun_high_s16(vqmovun_s16(vacc6x01234567), vacc7x01234567);
353 #else
354     const int16x8_t vacc0x01234567 = vqaddq_s16(vcombine_s16(vqmovn_s32(vacc0x0123), vqmovn_s32(vacc0x4567)), voutput_zero_point);
355     const int16x8_t vacc1x01234567 = vqaddq_s16(vcombine_s16(vqmovn_s32(vacc1x0123), vqmovn_s32(vacc1x4567)), voutput_zero_point);
356     const int16x8_t vacc2x01234567 = vqaddq_s16(vcombine_s16(vqmovn_s32(vacc2x0123), vqmovn_s32(vacc2x4567)), voutput_zero_point);
357     const int16x8_t vacc3x01234567 = vqaddq_s16(vcombine_s16(vqmovn_s32(vacc3x0123), vqmovn_s32(vacc3x4567)), voutput_zero_point);
358     const int16x8_t vacc4x01234567 = vqaddq_s16(vcombine_s16(vqmovn_s32(vacc4x0123), vqmovn_s32(vacc4x4567)), voutput_zero_point);
359     const int16x8_t vacc5x01234567 = vqaddq_s16(vcombine_s16(vqmovn_s32(vacc5x0123), vqmovn_s32(vacc5x4567)), voutput_zero_point);
360     const int16x8_t vacc6x01234567 = vqaddq_s16(vcombine_s16(vqmovn_s32(vacc6x0123), vqmovn_s32(vacc6x4567)), voutput_zero_point);
361     const int16x8_t vacc7x01234567 = vqaddq_s16(vcombine_s16(vqmovn_s32(vacc7x0123), vqmovn_s32(vacc7x4567)), voutput_zero_point);
362 
363     uint8x16_t vout0x01234567_1x01234567 = vcombine_u8(vqmovun_s16(vacc0x01234567), vqmovun_s16(vacc1x01234567));
364     uint8x16_t vout2x01234567_3x01234567 = vcombine_u8(vqmovun_s16(vacc2x01234567), vqmovun_s16(vacc3x01234567));
365     uint8x16_t vout4x01234567_5x01234567 = vcombine_u8(vqmovun_s16(vacc4x01234567), vqmovun_s16(vacc5x01234567));
366     uint8x16_t vout6x01234567_7x01234567 = vcombine_u8(vqmovun_s16(vacc6x01234567), vqmovun_s16(vacc7x01234567));
367 #endif
368     const uint8x16_t voutput_min = vld1q_dup_u8(&params->rndnu_neon.output_min);
369     const uint8x16_t voutput_max = vld1q_dup_u8(&params->rndnu_neon.output_max);
370 
371     vout0x01234567_1x01234567 = vmaxq_u8(vout0x01234567_1x01234567, voutput_min);
372     vout2x01234567_3x01234567 = vmaxq_u8(vout2x01234567_3x01234567, voutput_min);
373     vout4x01234567_5x01234567 = vmaxq_u8(vout4x01234567_5x01234567, voutput_min);
374     vout6x01234567_7x01234567 = vmaxq_u8(vout6x01234567_7x01234567, voutput_min);
375 
376     vout0x01234567_1x01234567 = vminq_u8(vout0x01234567_1x01234567, voutput_max);
377     vout2x01234567_3x01234567 = vminq_u8(vout2x01234567_3x01234567, voutput_max);
378     vout4x01234567_5x01234567 = vminq_u8(vout4x01234567_5x01234567, voutput_max);
379     vout6x01234567_7x01234567 = vminq_u8(vout6x01234567_7x01234567, voutput_max);
380 
381     if (nc >= 8) {
382       vst1_u8(c7 + 0, vget_high_u8(vout6x01234567_7x01234567));
383       vst1_u8(c6 + 0, vget_low_u8(vout6x01234567_7x01234567));
384       vst1_u8(c5 + 0, vget_high_u8(vout4x01234567_5x01234567));
385       vst1_u8(c4 + 0, vget_low_u8(vout4x01234567_5x01234567));
386       vst1_u8(c3 + 0, vget_high_u8(vout2x01234567_3x01234567));
387       vst1_u8(c2 + 0, vget_low_u8(vout2x01234567_3x01234567));
388       vst1_u8(c1 + 0, vget_high_u8(vout0x01234567_1x01234567));
389       vst1_u8(c0 + 0, vget_low_u8(vout0x01234567_1x01234567));
390 
391       c7 = (uint8_t*) ((uintptr_t) c7 + cn_stride);
392       c6 = (uint8_t*) ((uintptr_t) c6 + cn_stride);
393       c5 = (uint8_t*) ((uintptr_t) c5 + cn_stride);
394       c4 = (uint8_t*) ((uintptr_t) c4 + cn_stride);
395       c3 = (uint8_t*) ((uintptr_t) c3 + cn_stride);
396       c2 = (uint8_t*) ((uintptr_t) c2 + cn_stride);
397       c1 = (uint8_t*) ((uintptr_t) c1 + cn_stride);
398       c0 = (uint8_t*) ((uintptr_t) c0 + cn_stride);
399 
400       a = (const uint8_t**restrict) ((uintptr_t) a - ks);
401 
402       nc -= 8;
403     } else {
404       if (nc & 4) {
405         vst1q_lane_u32((void*) c7, vreinterpretq_u32_u8(vout6x01234567_7x01234567), 2); c7 += 4;
406         vst1q_lane_u32((void*) c6, vreinterpretq_u32_u8(vout6x01234567_7x01234567), 0); c6 += 4;
407         vst1q_lane_u32((void*) c5, vreinterpretq_u32_u8(vout4x01234567_5x01234567), 2); c5 += 4;
408         vst1q_lane_u32((void*) c4, vreinterpretq_u32_u8(vout4x01234567_5x01234567), 0); c4 += 4;
409         vst1q_lane_u32((void*) c3, vreinterpretq_u32_u8(vout2x01234567_3x01234567), 2); c3 += 4;
410         vst1q_lane_u32((void*) c2, vreinterpretq_u32_u8(vout2x01234567_3x01234567), 0); c2 += 4;
411         vst1q_lane_u32((void*) c1, vreinterpretq_u32_u8(vout0x01234567_1x01234567), 2); c1 += 4;
412         vst1q_lane_u32((void*) c0, vreinterpretq_u32_u8(vout0x01234567_1x01234567), 0); c0 += 4;
413         vout6x01234567_7x01234567 = vextq_u8(vout6x01234567_7x01234567, vout6x01234567_7x01234567, 4);
414         vout4x01234567_5x01234567 = vextq_u8(vout4x01234567_5x01234567, vout4x01234567_5x01234567, 4);
415         vout2x01234567_3x01234567 = vextq_u8(vout2x01234567_3x01234567, vout2x01234567_3x01234567, 4);
416         vout0x01234567_1x01234567 = vextq_u8(vout0x01234567_1x01234567, vout0x01234567_1x01234567, 4);
417       }
418       if (nc & 2) {
419         vst1q_lane_u16((void*) c7, vreinterpretq_u16_u8(vout6x01234567_7x01234567), 4); c7 += 2;
420         vst1q_lane_u16((void*) c6, vreinterpretq_u16_u8(vout6x01234567_7x01234567), 0); c6 += 2;
421         vst1q_lane_u16((void*) c5, vreinterpretq_u16_u8(vout4x01234567_5x01234567), 4); c5 += 2;
422         vst1q_lane_u16((void*) c4, vreinterpretq_u16_u8(vout4x01234567_5x01234567), 0); c4 += 2;
423         vst1q_lane_u16((void*) c3, vreinterpretq_u16_u8(vout2x01234567_3x01234567), 4); c3 += 2;
424         vst1q_lane_u16((void*) c2, vreinterpretq_u16_u8(vout2x01234567_3x01234567), 0); c2 += 2;
425         vst1q_lane_u16((void*) c1, vreinterpretq_u16_u8(vout0x01234567_1x01234567), 4); c1 += 2;
426         vst1q_lane_u16((void*) c0, vreinterpretq_u16_u8(vout0x01234567_1x01234567), 0); c0 += 2;
427         vout6x01234567_7x01234567 = vextq_u8(vout6x01234567_7x01234567, vout6x01234567_7x01234567, 2);
428         vout4x01234567_5x01234567 = vextq_u8(vout4x01234567_5x01234567, vout4x01234567_5x01234567, 2);
429         vout2x01234567_3x01234567 = vextq_u8(vout2x01234567_3x01234567, vout2x01234567_3x01234567, 2);
430         vout0x01234567_1x01234567 = vextq_u8(vout0x01234567_1x01234567, vout0x01234567_1x01234567, 2);
431       }
432       if (nc & 1) {
433         vst1q_lane_u8(c7, vout6x01234567_7x01234567, 8);
434         vst1q_lane_u8(c6, vout6x01234567_7x01234567, 0);
435         vst1q_lane_u8(c5, vout4x01234567_5x01234567, 8);
436         vst1q_lane_u8(c4, vout4x01234567_5x01234567, 0);
437         vst1q_lane_u8(c3, vout2x01234567_3x01234567, 8);
438         vst1q_lane_u8(c2, vout2x01234567_3x01234567, 0);
439         vst1q_lane_u8(c1, vout0x01234567_1x01234567, 8);
440         vst1q_lane_u8(c0, vout0x01234567_1x01234567, 0);
441       }
442 
443       nc = 0;
444     }
445   } while (nc != 0);
446 }
447