xref: /aosp_15_r20/external/XNNPACK/src/qu8-igemm/gen/4x8c4-minmax-rndnu-neondot.c (revision 4bdc94577ba0e567308109d787f7fec7b531ce36)
1 // Auto-generated file. Do not edit!
2 //   Template: src/qu8-igemm/c4-neondot.c.in
3 //   Generator: tools/xngen
4 //
5 // Copyright 2020 Google LLC
6 //
7 // This source code is licensed under the BSD-style license found in the
8 // LICENSE file in the root directory of this source tree.
9 
10 #include <assert.h>
11 
12 #include <arm_neon.h>
13 
14 #include <xnnpack/igemm.h>
15 #include <xnnpack/math.h>
16 
17 
xnn_qu8_igemm_minmax_rndnu_ukernel_4x8c4__neondot(size_t mr,size_t nc,size_t kc,size_t ks,const uint8_t ** restrict a,const void * restrict w,uint8_t * restrict c,size_t cm_stride,size_t cn_stride,size_t a_offset,const uint8_t * zero,const union xnn_qu8_conv_minmax_params params[restrict XNN_MIN_ELEMENTS (1)])18 void xnn_qu8_igemm_minmax_rndnu_ukernel_4x8c4__neondot(
19     size_t mr,
20     size_t nc,
21     size_t kc,
22     size_t ks,
23     const uint8_t** restrict a,
24     const void* restrict w,
25     uint8_t* restrict c,
26     size_t cm_stride,
27     size_t cn_stride,
28     size_t a_offset,
29     const uint8_t* zero,
30     const union xnn_qu8_conv_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_OOB_READS
31 {
32   assert(mr != 0);
33   assert(mr <= 4);
34   assert(nc != 0);
35   assert(kc != 0);
36   assert(ks != 0);
37   assert(ks % (4 * sizeof(void*)) == 0);
38   assert(a_offset % sizeof(uint8_t) == 0);
39   assert(a != NULL);
40   assert(w != NULL);
41   assert(c != NULL);
42 
43   kc = round_up_po2(kc, 4 * sizeof(uint8_t));
44   uint8_t* c0 = c;
45   uint8_t* c1 = (uint8_t*) ((uintptr_t) c0 + cm_stride);
46   if XNN_UNPREDICTABLE(mr < 2) {
47     c1 = c0;
48   }
49   uint8_t* c2 = (uint8_t*) ((uintptr_t) c1 + cm_stride);
50   if XNN_UNPREDICTABLE(mr <= 2) {
51     c2 = c1;
52   }
53   uint8_t* c3 = (uint8_t*) ((uintptr_t) c2 + cm_stride);
54   if XNN_UNPREDICTABLE(mr != 4) {
55     c3 = c2;
56   }
57 
58   const uint8x8_t va_zero_point = vld1_dup_u8(&params->rndnu_neon.kernel_zero_point[0]);
59 
60   do {
61     // Initialize accumulators with bias. 8 bias values are loaded from the
62     // weight matrix, at the start of the group of 8 columns.
63     uint32x4_t vpacc0x0123 = vld1q_u32(w); w = (const void*) ((const uint32_t*) w + 4);
64     uint32x4_t vpacc0x4567 = vld1q_u32(w); w = (const void*) ((const uint32_t*) w + 4);
65     uint32x4_t vpacc1x0123 = vpacc0x0123;
66     uint32x4_t vpacc1x4567 = vpacc0x4567;
67     uint32x4_t vpacc2x0123 = vpacc0x0123;
68     uint32x4_t vpacc2x4567 = vpacc0x4567;
69     uint32x4_t vpacc3x0123 = vpacc0x0123;
70     uint32x4_t vpacc3x4567 = vpacc0x4567;
71     uint32x2_t vnacc0 = vmov_n_u32(0);
72     uint32x2_t vnacc1 = vmov_n_u32(0);
73     uint32x2_t vnacc2 = vmov_n_u32(0);
74     uint32x2_t vnacc3 = vmov_n_u32(0);
75 
76     size_t p = ks;
77     do {
78       const uint8_t* restrict a0 = a[0];
79       if XNN_UNPREDICTABLE(a0 != zero) {
80         a0 = (const uint8_t*) ((uintptr_t) a0 + a_offset);
81       }
82       const uint8_t* restrict a1 = a[1];
83       if XNN_UNPREDICTABLE(a1 != zero) {
84         a1 = (const uint8_t*) ((uintptr_t) a1 + a_offset);
85       }
86       const uint8_t* restrict a2 = a[2];
87       if XNN_UNPREDICTABLE(a2 != zero) {
88         a2 = (const uint8_t*) ((uintptr_t) a2 + a_offset);
89       }
90       const uint8_t* restrict a3 = a[3];
91       if XNN_UNPREDICTABLE(a3 != zero) {
92         a3 = (const uint8_t*) ((uintptr_t) a3 + a_offset);
93       }
94       a += 4;
95 
96       // Inner accumulation loop along the 8 columns.
97       size_t k = kc;
98       // 2x partial unrolled loop to load 8 bytes at a time.
99       while (k >= 8 * sizeof(uint8_t)) {
100         // Load a 4x8 block of activations.
101         const uint8x8_t va0x01234567 = vld1_u8(a0); a0 += 8;
102         const uint8x8_t va1x01234567 = vld1_u8(a1); a1 += 8;
103         const uint8x8_t va2x01234567 = vld1_u8(a2); a2 += 8;
104         const uint8x8_t va3x01234567 = vld1_u8(a3); a3 += 8;
105 
106         // Load a 8x8 block of weights.
107         const uint8x16_t vb0123x0123 = vld1q_u8(w); w = (const void*) ((const uint8_t*) w + 16);
108         const uint8x16_t vb0123x4567 = vld1q_u8(w); w = (const void*) ((const uint8_t*) w + 16);
109         const uint8x16_t vb4567x0123 = vld1q_u8(w); w = (const void*) ((const uint8_t*) w + 16);
110         const uint8x16_t vb4567x4567 = vld1q_u8(w); w = (const void*) ((const uint8_t*) w + 16);
111 
112         // Multiply-accumulate: 4x8 * 8x8 --> 4x8.
113         vnacc0 = vdot_u32(vnacc0, va_zero_point, va0x01234567);
114         vpacc0x0123 = vdotq_lane_u32(vpacc0x0123, vb0123x0123, va0x01234567, 0);
115         vpacc0x4567 = vdotq_lane_u32(vpacc0x4567, vb0123x4567, va0x01234567, 0);
116         vpacc0x0123 = vdotq_lane_u32(vpacc0x0123, vb4567x0123, va0x01234567, 1);
117         vpacc0x4567 = vdotq_lane_u32(vpacc0x4567, vb4567x4567, va0x01234567, 1);
118         vnacc1 = vdot_u32(vnacc1, va_zero_point, va1x01234567);
119         vpacc1x0123 = vdotq_lane_u32(vpacc1x0123, vb0123x0123, va1x01234567, 0);
120         vpacc1x4567 = vdotq_lane_u32(vpacc1x4567, vb0123x4567, va1x01234567, 0);
121         vpacc1x0123 = vdotq_lane_u32(vpacc1x0123, vb4567x0123, va1x01234567, 1);
122         vpacc1x4567 = vdotq_lane_u32(vpacc1x4567, vb4567x4567, va1x01234567, 1);
123         vnacc2 = vdot_u32(vnacc2, va_zero_point, va2x01234567);
124         vpacc2x0123 = vdotq_lane_u32(vpacc2x0123, vb0123x0123, va2x01234567, 0);
125         vpacc2x4567 = vdotq_lane_u32(vpacc2x4567, vb0123x4567, va2x01234567, 0);
126         vpacc2x0123 = vdotq_lane_u32(vpacc2x0123, vb4567x0123, va2x01234567, 1);
127         vpacc2x4567 = vdotq_lane_u32(vpacc2x4567, vb4567x4567, va2x01234567, 1);
128         vnacc3 = vdot_u32(vnacc3, va_zero_point, va3x01234567);
129         vpacc3x0123 = vdotq_lane_u32(vpacc3x0123, vb0123x0123, va3x01234567, 0);
130         vpacc3x4567 = vdotq_lane_u32(vpacc3x4567, vb0123x4567, va3x01234567, 0);
131         vpacc3x0123 = vdotq_lane_u32(vpacc3x0123, vb4567x0123, va3x01234567, 1);
132         vpacc3x4567 = vdotq_lane_u32(vpacc3x4567, vb4567x4567, va3x01234567, 1);
133 
134         k -= 8 * sizeof(uint8_t);
135       }
136       // Handle up to 4 final positions of `k`
137       if XNN_UNLIKELY(k != 0) {
138         // Load a 4x4 block of activations.
139         const uint8x8_t va0x01234567 = vreinterpret_u8_u32(vld1_lane_u32((const void*) a0, vmov_n_u32(0), 0)); a0 += 4;
140         const uint8x8_t va1x01234567 = vreinterpret_u8_u32(vld1_lane_u32((const void*) a1, vmov_n_u32(0), 0)); a1 += 4;
141         const uint8x8_t va2x01234567 = vreinterpret_u8_u32(vld1_lane_u32((const void*) a2, vmov_n_u32(0), 0)); a2 += 4;
142         const uint8x8_t va3x01234567 = vreinterpret_u8_u32(vld1_lane_u32((const void*) a3, vmov_n_u32(0), 0)); a3 += 4;
143 
144         // Load a 4x8 block of weights.
145         const uint8x16_t vb0123x0123 = vld1q_u8(w); w = (const void*) ((const uint8_t*) w + 16);
146         const uint8x16_t vb0123x4567 = vld1q_u8(w); w = (const void*) ((const uint8_t*) w + 16);
147 
148         // Multiply-accumulate: 4x4 * 4x8 --> 4x8.
149         vnacc0 = vdot_u32(vnacc0, va_zero_point, va0x01234567);
150         vpacc0x0123 = vdotq_lane_u32(vpacc0x0123, vb0123x0123, va0x01234567, 0);
151         vpacc0x4567 = vdotq_lane_u32(vpacc0x4567, vb0123x4567, va0x01234567, 0);
152         vnacc1 = vdot_u32(vnacc1, va_zero_point, va1x01234567);
153         vpacc1x0123 = vdotq_lane_u32(vpacc1x0123, vb0123x0123, va1x01234567, 0);
154         vpacc1x4567 = vdotq_lane_u32(vpacc1x4567, vb0123x4567, va1x01234567, 0);
155         vnacc2 = vdot_u32(vnacc2, va_zero_point, va2x01234567);
156         vpacc2x0123 = vdotq_lane_u32(vpacc2x0123, vb0123x0123, va2x01234567, 0);
157         vpacc2x4567 = vdotq_lane_u32(vpacc2x4567, vb0123x4567, va2x01234567, 0);
158         vnacc3 = vdot_u32(vnacc3, va_zero_point, va3x01234567);
159         vpacc3x0123 = vdotq_lane_u32(vpacc3x0123, vb0123x0123, va3x01234567, 0);
160         vpacc3x4567 = vdotq_lane_u32(vpacc3x4567, vb0123x4567, va3x01234567, 0);
161       }
162       p -= 4 * sizeof(void*);
163     } while (p != 0);
164 
165     // Subtract zero point from accumulators.
166     vnacc0 = vpadd_u32(vnacc0, vnacc0);
167     const uint32x4_t vnacc0x0123 = vcombine_u32(vnacc0, vnacc0);
168     int32x4_t vacc0x0123 = vreinterpretq_s32_u32(vsubq_u32(vpacc0x0123, vnacc0x0123));
169     int32x4_t vacc0x4567 = vreinterpretq_s32_u32(vsubq_u32(vpacc0x4567, vnacc0x0123));
170     vnacc1 = vpadd_u32(vnacc1, vnacc1);
171     const uint32x4_t vnacc1x0123 = vcombine_u32(vnacc1, vnacc1);
172     int32x4_t vacc1x0123 = vreinterpretq_s32_u32(vsubq_u32(vpacc1x0123, vnacc1x0123));
173     int32x4_t vacc1x4567 = vreinterpretq_s32_u32(vsubq_u32(vpacc1x4567, vnacc1x0123));
174     vnacc2 = vpadd_u32(vnacc2, vnacc2);
175     const uint32x4_t vnacc2x0123 = vcombine_u32(vnacc2, vnacc2);
176     int32x4_t vacc2x0123 = vreinterpretq_s32_u32(vsubq_u32(vpacc2x0123, vnacc2x0123));
177     int32x4_t vacc2x4567 = vreinterpretq_s32_u32(vsubq_u32(vpacc2x4567, vnacc2x0123));
178     vnacc3 = vpadd_u32(vnacc3, vnacc3);
179     const uint32x4_t vnacc3x0123 = vcombine_u32(vnacc3, vnacc3);
180     int32x4_t vacc3x0123 = vreinterpretq_s32_u32(vsubq_u32(vpacc3x0123, vnacc3x0123));
181     int32x4_t vacc3x4567 = vreinterpretq_s32_u32(vsubq_u32(vpacc3x4567, vnacc3x0123));
182 
183     const int32x4_t vright_pre_shift = vld1q_dup_s32(&params->rndnu_neon.right_pre_shift);
184     const int32x4_t vmultiplier = vld1q_dup_s32(&params->rndnu_neon.multiplier);
185     const int32x4_t vright_post_shift = vld1q_dup_s32(&params->rndnu_neon.right_post_shift);
186 
187     vacc0x0123 = vshlq_s32(vacc0x0123, vright_pre_shift);
188     vacc0x4567 = vshlq_s32(vacc0x4567, vright_pre_shift);
189     vacc1x0123 = vshlq_s32(vacc1x0123, vright_pre_shift);
190     vacc1x4567 = vshlq_s32(vacc1x4567, vright_pre_shift);
191     vacc2x0123 = vshlq_s32(vacc2x0123, vright_pre_shift);
192     vacc2x4567 = vshlq_s32(vacc2x4567, vright_pre_shift);
193     vacc3x0123 = vshlq_s32(vacc3x0123, vright_pre_shift);
194     vacc3x4567 = vshlq_s32(vacc3x4567, vright_pre_shift);
195 
196     vacc0x0123 = vqdmulhq_s32(vacc0x0123, vmultiplier);
197     vacc0x4567 = vqdmulhq_s32(vacc0x4567, vmultiplier);
198     vacc1x0123 = vqdmulhq_s32(vacc1x0123, vmultiplier);
199     vacc1x4567 = vqdmulhq_s32(vacc1x4567, vmultiplier);
200     vacc2x0123 = vqdmulhq_s32(vacc2x0123, vmultiplier);
201     vacc2x4567 = vqdmulhq_s32(vacc2x4567, vmultiplier);
202     vacc3x0123 = vqdmulhq_s32(vacc3x0123, vmultiplier);
203     vacc3x4567 = vqdmulhq_s32(vacc3x4567, vmultiplier);
204 
205     vacc0x0123 = vrshlq_s32(vacc0x0123, vright_post_shift);
206     vacc0x4567 = vrshlq_s32(vacc0x4567, vright_post_shift);
207     vacc1x0123 = vrshlq_s32(vacc1x0123, vright_post_shift);
208     vacc1x4567 = vrshlq_s32(vacc1x4567, vright_post_shift);
209     vacc2x0123 = vrshlq_s32(vacc2x0123, vright_post_shift);
210     vacc2x4567 = vrshlq_s32(vacc2x4567, vright_post_shift);
211     vacc3x0123 = vrshlq_s32(vacc3x0123, vright_post_shift);
212     vacc3x4567 = vrshlq_s32(vacc3x4567, vright_post_shift);
213 
214     const int16x8_t voutput_zero_point = vld1q_dup_s16(&params->rndnu_neon.output_zero_point);
215 #if XNN_ARCH_ARM64
216     const int16x8_t vacc0x01234567 = vqaddq_s16(vqmovn_high_s32(vqmovn_s32(vacc0x0123), vacc0x4567), voutput_zero_point);
217     const int16x8_t vacc1x01234567 = vqaddq_s16(vqmovn_high_s32(vqmovn_s32(vacc1x0123), vacc1x4567), voutput_zero_point);
218     const int16x8_t vacc2x01234567 = vqaddq_s16(vqmovn_high_s32(vqmovn_s32(vacc2x0123), vacc2x4567), voutput_zero_point);
219     const int16x8_t vacc3x01234567 = vqaddq_s16(vqmovn_high_s32(vqmovn_s32(vacc3x0123), vacc3x4567), voutput_zero_point);
220 
221     uint8x16_t vout0x01234567_1x01234567 = vqmovun_high_s16(vqmovun_s16(vacc0x01234567), vacc1x01234567);
222     uint8x16_t vout2x01234567_3x01234567 = vqmovun_high_s16(vqmovun_s16(vacc2x01234567), vacc3x01234567);
223 #else
224     const int16x8_t vacc0x01234567 = vqaddq_s16(vcombine_s16(vqmovn_s32(vacc0x0123), vqmovn_s32(vacc0x4567)), voutput_zero_point);
225     const int16x8_t vacc1x01234567 = vqaddq_s16(vcombine_s16(vqmovn_s32(vacc1x0123), vqmovn_s32(vacc1x4567)), voutput_zero_point);
226     const int16x8_t vacc2x01234567 = vqaddq_s16(vcombine_s16(vqmovn_s32(vacc2x0123), vqmovn_s32(vacc2x4567)), voutput_zero_point);
227     const int16x8_t vacc3x01234567 = vqaddq_s16(vcombine_s16(vqmovn_s32(vacc3x0123), vqmovn_s32(vacc3x4567)), voutput_zero_point);
228 
229     uint8x16_t vout0x01234567_1x01234567 = vcombine_u8(vqmovun_s16(vacc0x01234567), vqmovun_s16(vacc1x01234567));
230     uint8x16_t vout2x01234567_3x01234567 = vcombine_u8(vqmovun_s16(vacc2x01234567), vqmovun_s16(vacc3x01234567));
231 #endif
232     const uint8x16_t voutput_min = vld1q_dup_u8(&params->rndnu_neon.output_min);
233     const uint8x16_t voutput_max = vld1q_dup_u8(&params->rndnu_neon.output_max);
234 
235     vout0x01234567_1x01234567 = vmaxq_u8(vout0x01234567_1x01234567, voutput_min);
236     vout2x01234567_3x01234567 = vmaxq_u8(vout2x01234567_3x01234567, voutput_min);
237 
238     vout0x01234567_1x01234567 = vminq_u8(vout0x01234567_1x01234567, voutput_max);
239     vout2x01234567_3x01234567 = vminq_u8(vout2x01234567_3x01234567, voutput_max);
240 
241     if (nc >= 8) {
242       vst1_u8(c3 + 0, vget_high_u8(vout2x01234567_3x01234567));
243       vst1_u8(c2 + 0, vget_low_u8(vout2x01234567_3x01234567));
244       vst1_u8(c1 + 0, vget_high_u8(vout0x01234567_1x01234567));
245       vst1_u8(c0 + 0, vget_low_u8(vout0x01234567_1x01234567));
246 
247       c3 = (uint8_t*) ((uintptr_t) c3 + cn_stride);
248       c2 = (uint8_t*) ((uintptr_t) c2 + cn_stride);
249       c1 = (uint8_t*) ((uintptr_t) c1 + cn_stride);
250       c0 = (uint8_t*) ((uintptr_t) c0 + cn_stride);
251 
252       a = (const uint8_t**restrict) ((uintptr_t) a - ks);
253 
254       nc -= 8;
255     } else {
256       if (nc & 4) {
257         vst1q_lane_u32((void*) c3, vreinterpretq_u32_u8(vout2x01234567_3x01234567), 2); c3 += 4;
258         vst1q_lane_u32((void*) c2, vreinterpretq_u32_u8(vout2x01234567_3x01234567), 0); c2 += 4;
259         vst1q_lane_u32((void*) c1, vreinterpretq_u32_u8(vout0x01234567_1x01234567), 2); c1 += 4;
260         vst1q_lane_u32((void*) c0, vreinterpretq_u32_u8(vout0x01234567_1x01234567), 0); c0 += 4;
261         vout2x01234567_3x01234567 = vextq_u8(vout2x01234567_3x01234567, vout2x01234567_3x01234567, 4);
262         vout0x01234567_1x01234567 = vextq_u8(vout0x01234567_1x01234567, vout0x01234567_1x01234567, 4);
263       }
264       if (nc & 2) {
265         vst1q_lane_u16((void*) c3, vreinterpretq_u16_u8(vout2x01234567_3x01234567), 4); c3 += 2;
266         vst1q_lane_u16((void*) c2, vreinterpretq_u16_u8(vout2x01234567_3x01234567), 0); c2 += 2;
267         vst1q_lane_u16((void*) c1, vreinterpretq_u16_u8(vout0x01234567_1x01234567), 4); c1 += 2;
268         vst1q_lane_u16((void*) c0, vreinterpretq_u16_u8(vout0x01234567_1x01234567), 0); c0 += 2;
269         vout2x01234567_3x01234567 = vextq_u8(vout2x01234567_3x01234567, vout2x01234567_3x01234567, 2);
270         vout0x01234567_1x01234567 = vextq_u8(vout0x01234567_1x01234567, vout0x01234567_1x01234567, 2);
271       }
272       if (nc & 1) {
273         vst1q_lane_u8(c3, vout2x01234567_3x01234567, 8);
274         vst1q_lane_u8(c2, vout2x01234567_3x01234567, 0);
275         vst1q_lane_u8(c1, vout0x01234567_1x01234567, 8);
276         vst1q_lane_u8(c0, vout0x01234567_1x01234567, 0);
277       }
278 
279       nc = 0;
280     }
281   } while (nc != 0);
282 }
283