xref: /aosp_15_r20/external/XNNPACK/src/qu8-igemm/gen/4x4c2s4-minmax-fp32-sse41-ld64.c (revision 4bdc94577ba0e567308109d787f7fec7b531ce36)
1 // Auto-generated file. Do not edit!
2 //   Template: src/qs8-igemm/MRx4c2s4-sse.c.in
3 //   Generator: tools/xngen
4 //
5 // Copyright 2022 Google LLC
6 //
7 // This source code is licensed under the BSD-style license found in the
8 // LICENSE file in the root directory of this source tree.
9 
10 #include <assert.h>
11 
12 #include <smmintrin.h>
13 
14 #include <xnnpack/igemm.h>
15 #include <xnnpack/math.h>
16 #include <xnnpack/unaligned.h>
17 
18 
xnn_qu8_igemm_minmax_fp32_ukernel_4x4c2s4__sse41_ld64(size_t mr,size_t nc,size_t kc,size_t ks,const uint8_t ** restrict a,const void * restrict w,uint8_t * restrict c,size_t cm_stride,size_t cn_stride,size_t a_offset,const uint8_t * zero,const union xnn_qu8_conv_minmax_params params[restrict XNN_MIN_ELEMENTS (1)])19 void xnn_qu8_igemm_minmax_fp32_ukernel_4x4c2s4__sse41_ld64(
20     size_t mr,
21     size_t nc,
22     size_t kc,
23     size_t ks,
24     const uint8_t** restrict a,
25     const void* restrict w,
26     uint8_t* restrict c,
27     size_t cm_stride,
28     size_t cn_stride,
29     size_t a_offset,
30     const uint8_t* zero,
31     const union xnn_qu8_conv_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_OOB_READS
32 {
33   assert(mr != 0);
34   assert(mr <= 4);
35   assert(nc != 0);
36   assert(kc != 0);
37   assert(ks != 0);
38   assert(ks % (4 * sizeof(void*)) == 0);
39   assert(a_offset % sizeof(uint8_t) == 0);
40   assert(a != NULL);
41   assert(w != NULL);
42   assert(c != NULL);
43 
44   kc = round_up_po2(kc, 8 * sizeof(uint8_t));
45   uint8_t* c0 = c;
46   uint8_t* c1 = (uint8_t*) ((uintptr_t) c0 + cm_stride);
47   if XNN_UNPREDICTABLE(mr < 2) {
48     c1 = c0;
49   }
50   uint8_t* c2 = (uint8_t*) ((uintptr_t) c1 + cm_stride);
51   if XNN_UNPREDICTABLE(mr <= 2) {
52     c2 = c1;
53   }
54   uint8_t* c3 = (uint8_t*) ((uintptr_t) c2 + cm_stride);
55   if XNN_UNPREDICTABLE(mr != 4) {
56     c3 = c2;
57   }
58 
59   do {
60     __m128i vacc0x0123 = _mm_loadu_si128((const __m128i*) w);
61     __m128i vacc1x0123 = vacc0x0123;
62     __m128i vacc2x0123 = vacc0x0123;
63     __m128i vacc3x0123 = vacc0x0123;
64     w = (const void*) ((const int32_t*) w + 4);
65 
66     size_t p = ks;
67     do {
68       const uint8_t* restrict a0 = a[0];
69       if XNN_UNPREDICTABLE(a0 != zero) {
70         a0 = (const uint8_t*) ((uintptr_t) a0 + a_offset);
71       }
72       const uint8_t* restrict a1 = a[1];
73       if XNN_UNPREDICTABLE(a1 != zero) {
74         a1 = (const uint8_t*) ((uintptr_t) a1 + a_offset);
75       }
76       const uint8_t* restrict a2 = a[2];
77       if XNN_UNPREDICTABLE(a2 != zero) {
78         a2 = (const uint8_t*) ((uintptr_t) a2 + a_offset);
79       }
80       const uint8_t* restrict a3 = a[3];
81       if XNN_UNPREDICTABLE(a3 != zero) {
82         a3 = (const uint8_t*) ((uintptr_t) a3 + a_offset);
83       }
84       a += 4;
85 
86       size_t k = kc;
87       const __m128i vb_zero_point = _mm_load_si128((const __m128i*) params->fp32_sse2.kernel_zero_point);
88       do {
89         const __m128i va0 = _mm_loadl_epi64((const __m128i*) a0);
90         __m128i vxa0 = _mm_cvtepu8_epi16(va0);
91         a0 += 8;
92         const __m128i va1 = _mm_loadl_epi64((const __m128i*) a1);
93         __m128i vxa1 = _mm_cvtepu8_epi16(va1);
94         a1 += 8;
95         const __m128i va2 = _mm_loadl_epi64((const __m128i*) a2);
96         __m128i vxa2 = _mm_cvtepu8_epi16(va2);
97         a2 += 8;
98         const __m128i va3 = _mm_loadl_epi64((const __m128i*) a3);
99         __m128i vxa3 = _mm_cvtepu8_epi16(va3);
100         a3 += 8;
101 
102         const __m128i vb0 = _mm_loadl_epi64((const __m128i*) w);
103         const __m128i vxb0 = _mm_sub_epi16(_mm_cvtepu8_epi16(vb0), vb_zero_point);
104 
105         vacc0x0123 = _mm_add_epi32(vacc0x0123, _mm_madd_epi16(vxa0, vxb0));
106         vxa0 = _mm_shuffle_epi32(vxa0, _MM_SHUFFLE(0, 3, 2, 1));
107         vacc1x0123 = _mm_add_epi32(vacc1x0123, _mm_madd_epi16(vxa1, vxb0));
108         vxa1 = _mm_shuffle_epi32(vxa1, _MM_SHUFFLE(0, 3, 2, 1));
109         vacc2x0123 = _mm_add_epi32(vacc2x0123, _mm_madd_epi16(vxa2, vxb0));
110         vxa2 = _mm_shuffle_epi32(vxa2, _MM_SHUFFLE(0, 3, 2, 1));
111         vacc3x0123 = _mm_add_epi32(vacc3x0123, _mm_madd_epi16(vxa3, vxb0));
112         vxa3 = _mm_shuffle_epi32(vxa3, _MM_SHUFFLE(0, 3, 2, 1));
113         const __m128i vb1 = _mm_loadl_epi64((const __m128i*) ((const uint8_t*) w + 8));
114         const __m128i vxb1 = _mm_sub_epi16(_mm_cvtepu8_epi16(vb1), vb_zero_point);
115 
116         vacc0x0123 = _mm_add_epi32(vacc0x0123, _mm_madd_epi16(vxa0, vxb1));
117         vxa0 = _mm_shuffle_epi32(vxa0, _MM_SHUFFLE(0, 3, 2, 1));
118         vacc1x0123 = _mm_add_epi32(vacc1x0123, _mm_madd_epi16(vxa1, vxb1));
119         vxa1 = _mm_shuffle_epi32(vxa1, _MM_SHUFFLE(0, 3, 2, 1));
120         vacc2x0123 = _mm_add_epi32(vacc2x0123, _mm_madd_epi16(vxa2, vxb1));
121         vxa2 = _mm_shuffle_epi32(vxa2, _MM_SHUFFLE(0, 3, 2, 1));
122         vacc3x0123 = _mm_add_epi32(vacc3x0123, _mm_madd_epi16(vxa3, vxb1));
123         vxa3 = _mm_shuffle_epi32(vxa3, _MM_SHUFFLE(0, 3, 2, 1));
124         const __m128i vb2 = _mm_loadl_epi64((const __m128i*) ((const uint8_t*) w + 16));
125         const __m128i vxb2 = _mm_sub_epi16(_mm_cvtepu8_epi16(vb2), vb_zero_point);
126 
127         vacc0x0123 = _mm_add_epi32(vacc0x0123, _mm_madd_epi16(vxa0, vxb2));
128         vxa0 = _mm_shuffle_epi32(vxa0, _MM_SHUFFLE(0, 3, 2, 1));
129         vacc1x0123 = _mm_add_epi32(vacc1x0123, _mm_madd_epi16(vxa1, vxb2));
130         vxa1 = _mm_shuffle_epi32(vxa1, _MM_SHUFFLE(0, 3, 2, 1));
131         vacc2x0123 = _mm_add_epi32(vacc2x0123, _mm_madd_epi16(vxa2, vxb2));
132         vxa2 = _mm_shuffle_epi32(vxa2, _MM_SHUFFLE(0, 3, 2, 1));
133         vacc3x0123 = _mm_add_epi32(vacc3x0123, _mm_madd_epi16(vxa3, vxb2));
134         vxa3 = _mm_shuffle_epi32(vxa3, _MM_SHUFFLE(0, 3, 2, 1));
135         const __m128i vb3 = _mm_loadl_epi64((const __m128i*) ((const uint8_t*) w + 24));
136         const __m128i vxb3 = _mm_sub_epi16(_mm_cvtepu8_epi16(vb3), vb_zero_point);
137 
138         vacc0x0123 = _mm_add_epi32(vacc0x0123, _mm_madd_epi16(vxa0, vxb3));
139         vacc1x0123 = _mm_add_epi32(vacc1x0123, _mm_madd_epi16(vxa1, vxb3));
140         vacc2x0123 = _mm_add_epi32(vacc2x0123, _mm_madd_epi16(vxa2, vxb3));
141         vacc3x0123 = _mm_add_epi32(vacc3x0123, _mm_madd_epi16(vxa3, vxb3));
142 
143         w = (const void*) ((const uint8_t*) w + 32);
144         k -= 8 * sizeof(uint8_t);
145       } while (k != 0);
146       p -= 4 * sizeof(void*);
147     } while (p != 0);
148 
149     __m128 vscaled0x0123 = _mm_cvtepi32_ps(vacc0x0123);
150     __m128 vscaled1x0123 = _mm_cvtepi32_ps(vacc1x0123);
151     __m128 vscaled2x0123 = _mm_cvtepi32_ps(vacc2x0123);
152     __m128 vscaled3x0123 = _mm_cvtepi32_ps(vacc3x0123);
153 
154     const __m128 vscale = _mm_load_ps(params->fp32_sse2.scale);
155     vscaled0x0123 = _mm_mul_ps(vscaled0x0123, vscale);
156     vscaled1x0123 = _mm_mul_ps(vscaled1x0123, vscale);
157     vscaled2x0123 = _mm_mul_ps(vscaled2x0123, vscale);
158     vscaled3x0123 = _mm_mul_ps(vscaled3x0123, vscale);
159 
160     const __m128 voutput_max_less_zero_point = _mm_load_ps(params->fp32_sse2.output_max_less_zero_point);
161     vscaled0x0123 = _mm_min_ps(vscaled0x0123, voutput_max_less_zero_point);
162     vscaled1x0123 = _mm_min_ps(vscaled1x0123, voutput_max_less_zero_point);
163     vscaled2x0123 = _mm_min_ps(vscaled2x0123, voutput_max_less_zero_point);
164     vscaled3x0123 = _mm_min_ps(vscaled3x0123, voutput_max_less_zero_point);
165 
166     vacc0x0123 = _mm_cvtps_epi32(vscaled0x0123);
167     vacc1x0123 = _mm_cvtps_epi32(vscaled1x0123);
168     vacc2x0123 = _mm_cvtps_epi32(vscaled2x0123);
169     vacc3x0123 = _mm_cvtps_epi32(vscaled3x0123);
170 
171     const __m128i voutput_zero_point = _mm_load_si128((const __m128i*) params->fp32_sse2.output_zero_point);
172     __m128i vacc01x0123 = _mm_adds_epi16(_mm_packs_epi32(vacc0x0123, vacc1x0123), voutput_zero_point);
173     __m128i vacc23x0123 = _mm_adds_epi16(_mm_packs_epi32(vacc2x0123, vacc3x0123), voutput_zero_point);
174 
175     __m128i vout = _mm_packus_epi16(vacc01x0123, vacc23x0123);
176 
177     vout = _mm_max_epu8(vout, _mm_load_si128((const __m128i*) params->fp32_sse2.output_min));
178 
179     if (nc >= 4) {
180       unaligned_store_u32(c3, (uint32_t) _mm_extract_epi32(vout, 3));
181       c3 = (uint8_t*) ((uintptr_t) c3 + cn_stride);
182       unaligned_store_u32(c2, (uint32_t) _mm_extract_epi32(vout, 2));
183       c2 = (uint8_t*) ((uintptr_t) c2 + cn_stride);
184       unaligned_store_u32(c1, (uint32_t) _mm_extract_epi32(vout, 1));
185       c1 = (uint8_t*) ((uintptr_t) c1 + cn_stride);
186       unaligned_store_u32(c0, (uint32_t) _mm_cvtsi128_si32(vout));
187       c0 = (uint8_t*) ((uintptr_t) c0 + cn_stride);
188 
189       a = (const uint8_t**restrict) ((uintptr_t) a - ks);
190 
191       nc -= 4;
192     } else {
193       if (nc & 2) {
194         unaligned_store_u16(c3, (uint16_t) _mm_extract_epi16(vout, 6));
195         c3 += 2;
196         unaligned_store_u16(c2, (uint16_t) _mm_extract_epi16(vout, 4));
197         c2 += 2;
198         unaligned_store_u16(c1, (uint16_t) _mm_extract_epi16(vout, 2));
199         c1 += 2;
200         unaligned_store_u16(c0, (uint16_t) _mm_extract_epi16(vout, 0));
201         c0 += 2;
202         vout = _mm_srli_epi32(vout, 16);
203       }
204       if (nc & 1) {
205         *c3 = (uint8_t) _mm_extract_epi8(vout, 12);
206         *c2 = (uint8_t) _mm_extract_epi8(vout, 8);
207         *c1 = (uint8_t) _mm_extract_epi8(vout, 4);
208         *c0 = (uint8_t) _mm_extract_epi8(vout, 0);
209       }
210 
211       nc = 0;
212     }
213   } while (nc != 0);
214 }
215