xref: /aosp_15_r20/external/XNNPACK/src/qu8-igemm/gen/4x4c2s4-minmax-fp32-sse2-ld64.c (revision 4bdc94577ba0e567308109d787f7fec7b531ce36)
1 // Auto-generated file. Do not edit!
2 //   Template: src/qs8-igemm/MRx4c2s4-sse.c.in
3 //   Generator: tools/xngen
4 //
5 // Copyright 2022 Google LLC
6 //
7 // This source code is licensed under the BSD-style license found in the
8 // LICENSE file in the root directory of this source tree.
9 
10 #include <assert.h>
11 
12 #include <emmintrin.h>
13 
14 #include <xnnpack/igemm.h>
15 #include <xnnpack/math.h>
16 #include <xnnpack/unaligned.h>
17 
18 
xnn_qu8_igemm_minmax_fp32_ukernel_4x4c2s4__sse2_ld64(size_t mr,size_t nc,size_t kc,size_t ks,const uint8_t ** restrict a,const void * restrict w,uint8_t * restrict c,size_t cm_stride,size_t cn_stride,size_t a_offset,const uint8_t * zero,const union xnn_qu8_conv_minmax_params params[restrict XNN_MIN_ELEMENTS (1)])19 void xnn_qu8_igemm_minmax_fp32_ukernel_4x4c2s4__sse2_ld64(
20     size_t mr,
21     size_t nc,
22     size_t kc,
23     size_t ks,
24     const uint8_t** restrict a,
25     const void* restrict w,
26     uint8_t* restrict c,
27     size_t cm_stride,
28     size_t cn_stride,
29     size_t a_offset,
30     const uint8_t* zero,
31     const union xnn_qu8_conv_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_OOB_READS
32 {
33   assert(mr != 0);
34   assert(mr <= 4);
35   assert(nc != 0);
36   assert(kc != 0);
37   assert(ks != 0);
38   assert(ks % (4 * sizeof(void*)) == 0);
39   assert(a_offset % sizeof(uint8_t) == 0);
40   assert(a != NULL);
41   assert(w != NULL);
42   assert(c != NULL);
43 
44   kc = round_up_po2(kc, 8 * sizeof(uint8_t));
45   uint8_t* c0 = c;
46   uint8_t* c1 = (uint8_t*) ((uintptr_t) c0 + cm_stride);
47   if XNN_UNPREDICTABLE(mr < 2) {
48     c1 = c0;
49   }
50   uint8_t* c2 = (uint8_t*) ((uintptr_t) c1 + cm_stride);
51   if XNN_UNPREDICTABLE(mr <= 2) {
52     c2 = c1;
53   }
54   uint8_t* c3 = (uint8_t*) ((uintptr_t) c2 + cm_stride);
55   if XNN_UNPREDICTABLE(mr != 4) {
56     c3 = c2;
57   }
58 
59   do {
60     __m128i vacc0x0123 = _mm_loadu_si128((const __m128i*) w);
61     __m128i vacc1x0123 = vacc0x0123;
62     __m128i vacc2x0123 = vacc0x0123;
63     __m128i vacc3x0123 = vacc0x0123;
64     w = (const void*) ((const int32_t*) w + 4);
65 
66     size_t p = ks;
67     do {
68       const uint8_t* restrict a0 = a[0];
69       if XNN_UNPREDICTABLE(a0 != zero) {
70         a0 = (const uint8_t*) ((uintptr_t) a0 + a_offset);
71       }
72       const uint8_t* restrict a1 = a[1];
73       if XNN_UNPREDICTABLE(a1 != zero) {
74         a1 = (const uint8_t*) ((uintptr_t) a1 + a_offset);
75       }
76       const uint8_t* restrict a2 = a[2];
77       if XNN_UNPREDICTABLE(a2 != zero) {
78         a2 = (const uint8_t*) ((uintptr_t) a2 + a_offset);
79       }
80       const uint8_t* restrict a3 = a[3];
81       if XNN_UNPREDICTABLE(a3 != zero) {
82         a3 = (const uint8_t*) ((uintptr_t) a3 + a_offset);
83       }
84       a += 4;
85 
86       size_t k = kc;
87       const __m128i vb_zero_point = _mm_load_si128((const __m128i*) params->fp32_sse2.kernel_zero_point);
88       const __m128i vzero = _mm_setzero_si128();
89       do {
90         const __m128i va0 = _mm_loadl_epi64((const __m128i*) a0);
91         __m128i vxa0 = _mm_unpacklo_epi8(va0, vzero);
92         a0 += 8;
93         const __m128i va1 = _mm_loadl_epi64((const __m128i*) a1);
94         __m128i vxa1 = _mm_unpacklo_epi8(va1, vzero);
95         a1 += 8;
96         const __m128i va2 = _mm_loadl_epi64((const __m128i*) a2);
97         __m128i vxa2 = _mm_unpacklo_epi8(va2, vzero);
98         a2 += 8;
99         const __m128i va3 = _mm_loadl_epi64((const __m128i*) a3);
100         __m128i vxa3 = _mm_unpacklo_epi8(va3, vzero);
101         a3 += 8;
102 
103         const __m128i vb0 = _mm_loadl_epi64((const __m128i*) w);
104         const __m128i vxb0 = _mm_sub_epi16(_mm_unpacklo_epi8(vb0, vzero), vb_zero_point);
105 
106         vacc0x0123 = _mm_add_epi32(vacc0x0123, _mm_madd_epi16(vxa0, vxb0));
107         vxa0 = _mm_shuffle_epi32(vxa0, _MM_SHUFFLE(0, 3, 2, 1));
108         vacc1x0123 = _mm_add_epi32(vacc1x0123, _mm_madd_epi16(vxa1, vxb0));
109         vxa1 = _mm_shuffle_epi32(vxa1, _MM_SHUFFLE(0, 3, 2, 1));
110         vacc2x0123 = _mm_add_epi32(vacc2x0123, _mm_madd_epi16(vxa2, vxb0));
111         vxa2 = _mm_shuffle_epi32(vxa2, _MM_SHUFFLE(0, 3, 2, 1));
112         vacc3x0123 = _mm_add_epi32(vacc3x0123, _mm_madd_epi16(vxa3, vxb0));
113         vxa3 = _mm_shuffle_epi32(vxa3, _MM_SHUFFLE(0, 3, 2, 1));
114         const __m128i vb1 = _mm_loadl_epi64((const __m128i*) ((const uint8_t*) w + 8));
115         const __m128i vxb1 = _mm_sub_epi16(_mm_unpacklo_epi8(vb1, vzero), vb_zero_point);
116 
117         vacc0x0123 = _mm_add_epi32(vacc0x0123, _mm_madd_epi16(vxa0, vxb1));
118         vxa0 = _mm_shuffle_epi32(vxa0, _MM_SHUFFLE(0, 3, 2, 1));
119         vacc1x0123 = _mm_add_epi32(vacc1x0123, _mm_madd_epi16(vxa1, vxb1));
120         vxa1 = _mm_shuffle_epi32(vxa1, _MM_SHUFFLE(0, 3, 2, 1));
121         vacc2x0123 = _mm_add_epi32(vacc2x0123, _mm_madd_epi16(vxa2, vxb1));
122         vxa2 = _mm_shuffle_epi32(vxa2, _MM_SHUFFLE(0, 3, 2, 1));
123         vacc3x0123 = _mm_add_epi32(vacc3x0123, _mm_madd_epi16(vxa3, vxb1));
124         vxa3 = _mm_shuffle_epi32(vxa3, _MM_SHUFFLE(0, 3, 2, 1));
125         const __m128i vb2 = _mm_loadl_epi64((const __m128i*) ((const uint8_t*) w + 16));
126         const __m128i vxb2 = _mm_sub_epi16(_mm_unpacklo_epi8(vb2, vzero), vb_zero_point);
127 
128         vacc0x0123 = _mm_add_epi32(vacc0x0123, _mm_madd_epi16(vxa0, vxb2));
129         vxa0 = _mm_shuffle_epi32(vxa0, _MM_SHUFFLE(0, 3, 2, 1));
130         vacc1x0123 = _mm_add_epi32(vacc1x0123, _mm_madd_epi16(vxa1, vxb2));
131         vxa1 = _mm_shuffle_epi32(vxa1, _MM_SHUFFLE(0, 3, 2, 1));
132         vacc2x0123 = _mm_add_epi32(vacc2x0123, _mm_madd_epi16(vxa2, vxb2));
133         vxa2 = _mm_shuffle_epi32(vxa2, _MM_SHUFFLE(0, 3, 2, 1));
134         vacc3x0123 = _mm_add_epi32(vacc3x0123, _mm_madd_epi16(vxa3, vxb2));
135         vxa3 = _mm_shuffle_epi32(vxa3, _MM_SHUFFLE(0, 3, 2, 1));
136         const __m128i vb3 = _mm_loadl_epi64((const __m128i*) ((const uint8_t*) w + 24));
137         const __m128i vxb3 = _mm_sub_epi16(_mm_unpacklo_epi8(vb3, vzero), vb_zero_point);
138 
139         vacc0x0123 = _mm_add_epi32(vacc0x0123, _mm_madd_epi16(vxa0, vxb3));
140         vacc1x0123 = _mm_add_epi32(vacc1x0123, _mm_madd_epi16(vxa1, vxb3));
141         vacc2x0123 = _mm_add_epi32(vacc2x0123, _mm_madd_epi16(vxa2, vxb3));
142         vacc3x0123 = _mm_add_epi32(vacc3x0123, _mm_madd_epi16(vxa3, vxb3));
143 
144         w = (const void*) ((const uint8_t*) w + 32);
145         k -= 8 * sizeof(uint8_t);
146       } while (k != 0);
147       p -= 4 * sizeof(void*);
148     } while (p != 0);
149 
150     __m128 vscaled0x0123 = _mm_cvtepi32_ps(vacc0x0123);
151     __m128 vscaled1x0123 = _mm_cvtepi32_ps(vacc1x0123);
152     __m128 vscaled2x0123 = _mm_cvtepi32_ps(vacc2x0123);
153     __m128 vscaled3x0123 = _mm_cvtepi32_ps(vacc3x0123);
154 
155     const __m128 vscale = _mm_load_ps(params->fp32_sse2.scale);
156     vscaled0x0123 = _mm_mul_ps(vscaled0x0123, vscale);
157     vscaled1x0123 = _mm_mul_ps(vscaled1x0123, vscale);
158     vscaled2x0123 = _mm_mul_ps(vscaled2x0123, vscale);
159     vscaled3x0123 = _mm_mul_ps(vscaled3x0123, vscale);
160 
161     const __m128 voutput_max_less_zero_point = _mm_load_ps(params->fp32_sse2.output_max_less_zero_point);
162     vscaled0x0123 = _mm_min_ps(vscaled0x0123, voutput_max_less_zero_point);
163     vscaled1x0123 = _mm_min_ps(vscaled1x0123, voutput_max_less_zero_point);
164     vscaled2x0123 = _mm_min_ps(vscaled2x0123, voutput_max_less_zero_point);
165     vscaled3x0123 = _mm_min_ps(vscaled3x0123, voutput_max_less_zero_point);
166 
167     vacc0x0123 = _mm_cvtps_epi32(vscaled0x0123);
168     vacc1x0123 = _mm_cvtps_epi32(vscaled1x0123);
169     vacc2x0123 = _mm_cvtps_epi32(vscaled2x0123);
170     vacc3x0123 = _mm_cvtps_epi32(vscaled3x0123);
171 
172     const __m128i voutput_zero_point = _mm_load_si128((const __m128i*) params->fp32_sse2.output_zero_point);
173     __m128i vacc01x0123 = _mm_adds_epi16(_mm_packs_epi32(vacc0x0123, vacc1x0123), voutput_zero_point);
174     __m128i vacc23x0123 = _mm_adds_epi16(_mm_packs_epi32(vacc2x0123, vacc3x0123), voutput_zero_point);
175 
176     __m128i vout = _mm_packus_epi16(vacc01x0123, vacc23x0123);
177 
178     vout = _mm_max_epu8(vout, _mm_load_si128((const __m128i*) params->fp32_sse2.output_min));
179 
180     if (nc >= 4) {
181       unaligned_store_u32(c3, (uint32_t) _mm_cvtsi128_si32(_mm_shuffle_epi32(vout, _MM_SHUFFLE(3, 3, 3, 3))));
182       c3 = (uint8_t*) ((uintptr_t) c3 + cn_stride);
183       unaligned_store_u32(c2, (uint32_t) _mm_cvtsi128_si32(_mm_shuffle_epi32(vout, _MM_SHUFFLE(2, 2, 2, 2))));
184       c2 = (uint8_t*) ((uintptr_t) c2 + cn_stride);
185       unaligned_store_u32(c1, (uint32_t) _mm_cvtsi128_si32(_mm_shuffle_epi32(vout, _MM_SHUFFLE(1, 1, 1, 1))));
186       c1 = (uint8_t*) ((uintptr_t) c1 + cn_stride);
187       unaligned_store_u32(c0, (uint32_t) _mm_cvtsi128_si32(vout));
188       c0 = (uint8_t*) ((uintptr_t) c0 + cn_stride);
189 
190       a = (const uint8_t**restrict) ((uintptr_t) a - ks);
191 
192       nc -= 4;
193     } else {
194       if (nc & 2) {
195         unaligned_store_u16(c3, (uint16_t) _mm_extract_epi16(vout, 6));
196         c3 += 2;
197         unaligned_store_u16(c2, (uint16_t) _mm_extract_epi16(vout, 4));
198         c2 += 2;
199         unaligned_store_u16(c1, (uint16_t) _mm_extract_epi16(vout, 2));
200         c1 += 2;
201         unaligned_store_u16(c0, (uint16_t) _mm_extract_epi16(vout, 0));
202         c0 += 2;
203         vout = _mm_srli_epi32(vout, 16);
204       }
205       if (nc & 1) {
206         *c3 = (uint8_t) _mm_extract_epi16(vout, 6);
207         *c2 = (uint8_t) _mm_extract_epi16(vout, 4);
208         *c1 = (uint8_t) _mm_extract_epi16(vout, 2);
209         *c0 = (uint8_t) _mm_cvtsi128_si32(vout);
210       }
211 
212       nc = 0;
213     }
214   } while (nc != 0);
215 }
216