xref: /aosp_15_r20/external/XNNPACK/src/qu8-igemm/gen/3x8c8-minmax-fp32-avx2.c (revision 4bdc94577ba0e567308109d787f7fec7b531ce36)
1 // Auto-generated file. Do not edit!
2 //   Template: src/qs8-igemm/MRx8c8-avx2.c.in
3 //   Generator: tools/xngen
4 //
5 // Copyright 2020 Google LLC
6 //
7 // This source code is licensed under the BSD-style license found in the
8 // LICENSE file in the root directory of this source tree.
9 
10 #include <assert.h>
11 
12 #include <immintrin.h>
13 
14 #include <xnnpack/igemm.h>
15 #include <xnnpack/intrinsics-polyfill.h>
16 #include <xnnpack/math.h>
17 #include <xnnpack/unaligned.h>
18 
19 
xnn_qu8_igemm_minmax_fp32_ukernel_3x8c8__avx2(size_t mr,size_t nc,size_t kc,size_t ks,const uint8_t ** restrict a,const void * restrict w,uint8_t * restrict c,size_t cm_stride,size_t cn_stride,size_t a_offset,const uint8_t * zero,const union xnn_qu8_conv_minmax_params params[restrict XNN_MIN_ELEMENTS (1)])20 void xnn_qu8_igemm_minmax_fp32_ukernel_3x8c8__avx2(
21     size_t mr,
22     size_t nc,
23     size_t kc,
24     size_t ks,
25     const uint8_t** restrict a,
26     const void* restrict w,
27     uint8_t* restrict c,
28     size_t cm_stride,
29     size_t cn_stride,
30     size_t a_offset,
31     const uint8_t* zero,
32     const union xnn_qu8_conv_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_OOB_READS
33 {
34   assert(mr != 0);
35   assert(mr <= 3);
36   assert(nc != 0);
37   assert(kc != 0);
38   assert(ks != 0);
39   assert(ks % (3 * sizeof(void*)) == 0);
40   assert(a_offset % sizeof(uint8_t) == 0);
41   assert(a != NULL);
42   assert(w != NULL);
43   assert(c != NULL);
44 
45   kc = round_up_po2(kc, 8);
46   uint8_t* c0 = c;
47   uint8_t* c1 = (uint8_t*) ((uintptr_t) c0 + cm_stride);
48   if XNN_UNPREDICTABLE(mr < 2) {
49     c1 = c0;
50   }
51   uint8_t* c2 = (uint8_t*) ((uintptr_t) c1 + cm_stride);
52   if XNN_UNPREDICTABLE(mr <= 2) {
53     c2 = c1;
54   }
55 
56   do {
57     const __m128i vbias0x0 = _mm_cvtsi32_si128(((const int*) w)[0]);
58     const __m128i vbias0x1 = _mm_cvtsi32_si128(((const int*) w)[1]);
59     __m256i vacc0x01 = _mm256_inserti128_si256(_mm256_castsi128_si256(vbias0x0), vbias0x1, 1);
60     const __m128i vbias0x2 = _mm_cvtsi32_si128(((const int*) w)[2]);
61     const __m128i vbias0x3 = _mm_cvtsi32_si128(((const int*) w)[3]);
62     __m256i vacc0x23 = _mm256_inserti128_si256(_mm256_castsi128_si256(vbias0x2), vbias0x3, 1);
63     const __m128i vbias0x4 = _mm_cvtsi32_si128(((const int*) w)[4]);
64     const __m128i vbias0x5 = _mm_cvtsi32_si128(((const int*) w)[5]);
65     __m256i vacc0x45 = _mm256_inserti128_si256(_mm256_castsi128_si256(vbias0x4), vbias0x5, 1);
66     const __m128i vbias0x6 = _mm_cvtsi32_si128(((const int*) w)[6]);
67     const __m128i vbias0x7 = _mm_cvtsi32_si128(((const int*) w)[7]);
68     __m256i vacc0x67 = _mm256_inserti128_si256(_mm256_castsi128_si256(vbias0x6), vbias0x7, 1);
69     __m256i vacc1x01 = vacc0x01;
70     __m256i vacc1x23 = vacc0x23;
71     __m256i vacc1x45 = vacc0x45;
72     __m256i vacc1x67 = vacc0x67;
73     __m256i vacc2x01 = vacc0x01;
74     __m256i vacc2x23 = vacc0x23;
75     __m256i vacc2x45 = vacc0x45;
76     __m256i vacc2x67 = vacc0x67;
77     w = (const int32_t*) w + 8;
78 
79     size_t p = ks;
80     const __m256i vb_zero_point = _mm256_load_si256((const __m256i*) params->fp32_avx2.kernel_zero_point);
81     do {
82       const uint8_t* restrict a0 = a[0];
83       if XNN_UNPREDICTABLE(a0 != zero) {
84         a0 = (const uint8_t*) ((uintptr_t) a0 + a_offset);
85       }
86       const uint8_t* restrict a1 = a[1];
87       if XNN_UNPREDICTABLE(a1 != zero) {
88         a1 = (const uint8_t*) ((uintptr_t) a1 + a_offset);
89       }
90       const uint8_t* restrict a2 = a[2];
91       if XNN_UNPREDICTABLE(a2 != zero) {
92         a2 = (const uint8_t*) ((uintptr_t) a2 + a_offset);
93       }
94       a += 3;
95 
96       size_t k = 0;
97       while (k < kc) {
98         const __m128i va0 = _mm_broadcastq_epi64(_mm_loadl_epi64((const __m128i*) a0));
99         const __m256i vxa0 = _mm256_cvtepu8_epi16(va0);
100         a0 += 8;
101         const __m128i va1 = _mm_broadcastq_epi64(_mm_loadl_epi64((const __m128i*) a1));
102         const __m256i vxa1 = _mm256_cvtepu8_epi16(va1);
103         a1 += 8;
104         const __m128i va2 = _mm_broadcastq_epi64(_mm_loadl_epi64((const __m128i*) a2));
105         const __m256i vxa2 = _mm256_cvtepu8_epi16(va2);
106         a2 += 8;
107 
108         const __m128i vb01 = _mm_load_si128((const __m128i*) w);
109         const __m256i vxb01 = _mm256_sub_epi16(_mm256_cvtepu8_epi16(vb01), vb_zero_point);
110 
111         vacc0x01 = _mm256_add_epi32(vacc0x01, _mm256_madd_epi16(vxa0, vxb01));
112         vacc1x01 = _mm256_add_epi32(vacc1x01, _mm256_madd_epi16(vxa1, vxb01));
113         vacc2x01 = _mm256_add_epi32(vacc2x01, _mm256_madd_epi16(vxa2, vxb01));
114         const __m128i vb23 = _mm_load_si128((const __m128i*) ((const uint8_t*) w + 16));
115         const __m256i vxb23 = _mm256_sub_epi16(_mm256_cvtepu8_epi16(vb23), vb_zero_point);
116 
117         vacc0x23 = _mm256_add_epi32(vacc0x23, _mm256_madd_epi16(vxa0, vxb23));
118         vacc1x23 = _mm256_add_epi32(vacc1x23, _mm256_madd_epi16(vxa1, vxb23));
119         vacc2x23 = _mm256_add_epi32(vacc2x23, _mm256_madd_epi16(vxa2, vxb23));
120         const __m128i vb45 = _mm_load_si128((const __m128i*) ((const uint8_t*) w + 32));
121         const __m256i vxb45 = _mm256_sub_epi16(_mm256_cvtepu8_epi16(vb45), vb_zero_point);
122 
123         vacc0x45 = _mm256_add_epi32(vacc0x45, _mm256_madd_epi16(vxa0, vxb45));
124         vacc1x45 = _mm256_add_epi32(vacc1x45, _mm256_madd_epi16(vxa1, vxb45));
125         vacc2x45 = _mm256_add_epi32(vacc2x45, _mm256_madd_epi16(vxa2, vxb45));
126         const __m128i vb67 = _mm_load_si128((const __m128i*) ((const uint8_t*) w + 48));
127         const __m256i vxb67 = _mm256_sub_epi16(_mm256_cvtepu8_epi16(vb67), vb_zero_point);
128 
129         vacc0x67 = _mm256_add_epi32(vacc0x67, _mm256_madd_epi16(vxa0, vxb67));
130         vacc1x67 = _mm256_add_epi32(vacc1x67, _mm256_madd_epi16(vxa1, vxb67));
131         vacc2x67 = _mm256_add_epi32(vacc2x67, _mm256_madd_epi16(vxa2, vxb67));
132 
133         w = (const void*) ((const uint8_t*) w + 64);
134         k += 8 * sizeof(uint8_t);
135       }
136       p -= 3 * sizeof(void*);
137     } while (p != 0);
138 
139     const __m256i vacc0x0213 = _mm256_hadd_epi32(vacc0x01, vacc0x23);
140     const __m256i vacc0x4657 = _mm256_hadd_epi32(vacc0x45, vacc0x67);
141     const __m256i vacc1x0213 = _mm256_hadd_epi32(vacc1x01, vacc1x23);
142     const __m256i vacc1x4657 = _mm256_hadd_epi32(vacc1x45, vacc1x67);
143     const __m256i vacc2x0213 = _mm256_hadd_epi32(vacc2x01, vacc2x23);
144     const __m256i vacc2x4657 = _mm256_hadd_epi32(vacc2x45, vacc2x67);
145 
146     const __m256i vacc0x02461357 = _mm256_hadd_epi32(vacc0x0213, vacc0x4657);
147     const __m256i vacc1x02461357 = _mm256_hadd_epi32(vacc1x0213, vacc1x4657);
148     const __m256i vacc2x02461357 = _mm256_hadd_epi32(vacc2x0213, vacc2x4657);
149 
150     const __m256i vpermute_mask = _mm256_set_epi32(7, 3, 6, 2, 5, 1, 4, 0);
151     __m256i vacc0x01234567 = _mm256_permutevar8x32_epi32(vacc0x02461357, vpermute_mask);
152     __m256i vacc1x01234567 = _mm256_permutevar8x32_epi32(vacc1x02461357, vpermute_mask);
153     __m256i vacc2x01234567 = _mm256_permutevar8x32_epi32(vacc2x02461357, vpermute_mask);
154 
155     __m256 vscaled0x01234567 = _mm256_cvtepi32_ps(vacc0x01234567);
156     __m256 vscaled1x01234567 = _mm256_cvtepi32_ps(vacc1x01234567);
157     __m256 vscaled2x01234567 = _mm256_cvtepi32_ps(vacc2x01234567);
158 
159     const __m256 vscale = _mm256_load_ps(params->fp32_avx2.scale);
160     vscaled0x01234567 = _mm256_mul_ps(vscaled0x01234567, vscale);
161     vscaled1x01234567 = _mm256_mul_ps(vscaled1x01234567, vscale);
162     vscaled2x01234567 = _mm256_mul_ps(vscaled2x01234567, vscale);
163 
164     const __m256 voutput_max_less_zero_point = _mm256_load_ps(params->fp32_avx2.output_max_less_zero_point);
165     vscaled0x01234567 = _mm256_min_ps(vscaled0x01234567, voutput_max_less_zero_point);
166     vscaled1x01234567 = _mm256_min_ps(vscaled1x01234567, voutput_max_less_zero_point);
167     vscaled2x01234567 = _mm256_min_ps(vscaled2x01234567, voutput_max_less_zero_point);
168 
169     vacc0x01234567 = _mm256_cvtps_epi32(vscaled0x01234567);
170     vacc1x01234567 = _mm256_cvtps_epi32(vscaled1x01234567);
171     vacc2x01234567 = _mm256_cvtps_epi32(vscaled2x01234567);
172 
173     const __m256i voutput_zero_point = _mm256_load_si256((const __m256i*) params->fp32_avx2.output_zero_point);
174     __m256i vacc01x01234567 = _mm256_adds_epi16(_mm256_packs_epi32(vacc0x01234567, vacc1x01234567), voutput_zero_point);
175     __m256i vacc22x01234567 = _mm256_adds_epi16(_mm256_packs_epi32(vacc2x01234567, vacc2x01234567), voutput_zero_point);
176 
177     vacc01x01234567 = _mm256_permute4x64_epi64(vacc01x01234567, _MM_SHUFFLE(3, 1, 2, 0));
178     vacc22x01234567 = _mm256_permute4x64_epi64(vacc22x01234567, _MM_SHUFFLE(3, 1, 2, 0));
179 
180     __m256i vout = _mm256_packus_epi16(vacc01x01234567, vacc22x01234567);
181 
182     vout = _mm256_max_epu8(vout, _mm256_load_si256((const __m256i*) params->fp32_avx2.output_min));
183 
184     __m128i vout_lo = _mm256_castsi256_si128(vout);
185     __m128i vout_hi = _mm256_extracti128_si256(vout, 1);
186 
187     if (nc >= 8) {
188       _mm_storeh_pi((__m64*) c2, _mm_castsi128_ps(vout_lo));
189       _mm_storel_epi64((__m128i*) c1, vout_hi);
190       _mm_storel_epi64((__m128i*) c0, vout_lo);
191 
192       c2 = (uint8_t*) ((uintptr_t) c2 + cn_stride);
193       c1 = (uint8_t*) ((uintptr_t) c1 + cn_stride);
194       c0 = (uint8_t*) ((uintptr_t) c0 + cn_stride);
195 
196       a = (const uint8_t**restrict) ((uintptr_t) a - ks);
197 
198       nc -= 8;
199     } else {
200       if (nc & 4) {
201         unaligned_store_u32(c2, (uint32_t) _mm_extract_epi32(vout_lo, 2));
202         _mm_storeu_si32(c1, vout_hi);
203         _mm_storeu_si32(c0, vout_lo);
204 
205         c2 += 4;
206         c1 += 4;
207         c0 += 4;
208 
209         vout_lo = _mm_srli_epi64(vout_lo, 32);
210         vout_hi = _mm_srli_epi64(vout_hi, 32);
211       }
212       if (nc & 2) {
213         unaligned_store_u16(c2, (uint16_t) _mm_extract_epi16(vout_lo, 4));
214         unaligned_store_u16(c1, (uint16_t) _mm_extract_epi16(vout_hi, 0));
215         unaligned_store_u16(c0, (uint16_t) _mm_extract_epi16(vout_lo, 0));
216 
217         c2 += 2;
218         c1 += 2;
219         c0 += 2;
220 
221         vout_lo = _mm_srli_epi32(vout_lo, 16);
222         vout_hi = _mm_srli_epi32(vout_hi, 16);
223       }
224       if (nc & 1) {
225         *c2 = (uint8_t) _mm_extract_epi8(vout_lo, 8);
226         *c1 = (uint8_t) _mm_extract_epi8(vout_hi, 0);
227         *c0 = (uint8_t) _mm_extract_epi8(vout_lo, 0);
228       }
229 
230       nc = 0;
231     }
232   } while (nc != 0);
233 }
234