xref: /aosp_15_r20/external/XNNPACK/src/qu8-igemm/gen/3x8c4-minmax-rndnu-neondot.c (revision 4bdc94577ba0e567308109d787f7fec7b531ce36)
1 // Auto-generated file. Do not edit!
2 //   Template: src/qu8-igemm/c4-neondot.c.in
3 //   Generator: tools/xngen
4 //
5 // Copyright 2020 Google LLC
6 //
7 // This source code is licensed under the BSD-style license found in the
8 // LICENSE file in the root directory of this source tree.
9 
10 #include <assert.h>
11 
12 #include <arm_neon.h>
13 
14 #include <xnnpack/igemm.h>
15 #include <xnnpack/math.h>
16 
17 
xnn_qu8_igemm_minmax_rndnu_ukernel_3x8c4__neondot(size_t mr,size_t nc,size_t kc,size_t ks,const uint8_t ** restrict a,const void * restrict w,uint8_t * restrict c,size_t cm_stride,size_t cn_stride,size_t a_offset,const uint8_t * zero,const union xnn_qu8_conv_minmax_params params[restrict XNN_MIN_ELEMENTS (1)])18 void xnn_qu8_igemm_minmax_rndnu_ukernel_3x8c4__neondot(
19     size_t mr,
20     size_t nc,
21     size_t kc,
22     size_t ks,
23     const uint8_t** restrict a,
24     const void* restrict w,
25     uint8_t* restrict c,
26     size_t cm_stride,
27     size_t cn_stride,
28     size_t a_offset,
29     const uint8_t* zero,
30     const union xnn_qu8_conv_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_OOB_READS
31 {
32   assert(mr != 0);
33   assert(mr <= 3);
34   assert(nc != 0);
35   assert(kc != 0);
36   assert(ks != 0);
37   assert(ks % (3 * sizeof(void*)) == 0);
38   assert(a_offset % sizeof(uint8_t) == 0);
39   assert(a != NULL);
40   assert(w != NULL);
41   assert(c != NULL);
42 
43   kc = round_up_po2(kc, 4 * sizeof(uint8_t));
44   uint8_t* c0 = c;
45   uint8_t* c1 = (uint8_t*) ((uintptr_t) c0 + cm_stride);
46   if XNN_UNPREDICTABLE(mr < 2) {
47     c1 = c0;
48   }
49   uint8_t* c2 = (uint8_t*) ((uintptr_t) c1 + cm_stride);
50   if XNN_UNPREDICTABLE(mr <= 2) {
51     c2 = c1;
52   }
53 
54   const uint8x8_t va_zero_point = vld1_dup_u8(&params->rndnu_neon.kernel_zero_point[0]);
55 
56   do {
57     // Initialize accumulators with bias. 8 bias values are loaded from the
58     // weight matrix, at the start of the group of 8 columns.
59     uint32x4_t vpacc0x0123 = vld1q_u32(w); w = (const void*) ((const uint32_t*) w + 4);
60     uint32x4_t vpacc0x4567 = vld1q_u32(w); w = (const void*) ((const uint32_t*) w + 4);
61     uint32x4_t vpacc1x0123 = vpacc0x0123;
62     uint32x4_t vpacc1x4567 = vpacc0x4567;
63     uint32x4_t vpacc2x0123 = vpacc0x0123;
64     uint32x4_t vpacc2x4567 = vpacc0x4567;
65     uint32x2_t vnacc0 = vmov_n_u32(0);
66     uint32x2_t vnacc1 = vmov_n_u32(0);
67     uint32x2_t vnacc2 = vmov_n_u32(0);
68 
69     size_t p = ks;
70     do {
71       const uint8_t* restrict a0 = a[0];
72       if XNN_UNPREDICTABLE(a0 != zero) {
73         a0 = (const uint8_t*) ((uintptr_t) a0 + a_offset);
74       }
75       const uint8_t* restrict a1 = a[1];
76       if XNN_UNPREDICTABLE(a1 != zero) {
77         a1 = (const uint8_t*) ((uintptr_t) a1 + a_offset);
78       }
79       const uint8_t* restrict a2 = a[2];
80       if XNN_UNPREDICTABLE(a2 != zero) {
81         a2 = (const uint8_t*) ((uintptr_t) a2 + a_offset);
82       }
83       a += 3;
84 
85       // Inner accumulation loop along the 8 columns.
86       size_t k = kc;
87       // 2x partial unrolled loop to load 8 bytes at a time.
88       while (k >= 8 * sizeof(uint8_t)) {
89         // Load a 3x8 block of activations.
90         const uint8x8_t va0x01234567 = vld1_u8(a0); a0 += 8;
91         const uint8x8_t va1x01234567 = vld1_u8(a1); a1 += 8;
92         const uint8x8_t va2x01234567 = vld1_u8(a2); a2 += 8;
93 
94         // Load a 8x8 block of weights.
95         const uint8x16_t vb0123x0123 = vld1q_u8(w); w = (const void*) ((const uint8_t*) w + 16);
96         const uint8x16_t vb0123x4567 = vld1q_u8(w); w = (const void*) ((const uint8_t*) w + 16);
97         const uint8x16_t vb4567x0123 = vld1q_u8(w); w = (const void*) ((const uint8_t*) w + 16);
98         const uint8x16_t vb4567x4567 = vld1q_u8(w); w = (const void*) ((const uint8_t*) w + 16);
99 
100         // Multiply-accumulate: 3x8 * 8x8 --> 3x8.
101         vnacc0 = vdot_u32(vnacc0, va_zero_point, va0x01234567);
102         vpacc0x0123 = vdotq_lane_u32(vpacc0x0123, vb0123x0123, va0x01234567, 0);
103         vpacc0x4567 = vdotq_lane_u32(vpacc0x4567, vb0123x4567, va0x01234567, 0);
104         vpacc0x0123 = vdotq_lane_u32(vpacc0x0123, vb4567x0123, va0x01234567, 1);
105         vpacc0x4567 = vdotq_lane_u32(vpacc0x4567, vb4567x4567, va0x01234567, 1);
106         vnacc1 = vdot_u32(vnacc1, va_zero_point, va1x01234567);
107         vpacc1x0123 = vdotq_lane_u32(vpacc1x0123, vb0123x0123, va1x01234567, 0);
108         vpacc1x4567 = vdotq_lane_u32(vpacc1x4567, vb0123x4567, va1x01234567, 0);
109         vpacc1x0123 = vdotq_lane_u32(vpacc1x0123, vb4567x0123, va1x01234567, 1);
110         vpacc1x4567 = vdotq_lane_u32(vpacc1x4567, vb4567x4567, va1x01234567, 1);
111         vnacc2 = vdot_u32(vnacc2, va_zero_point, va2x01234567);
112         vpacc2x0123 = vdotq_lane_u32(vpacc2x0123, vb0123x0123, va2x01234567, 0);
113         vpacc2x4567 = vdotq_lane_u32(vpacc2x4567, vb0123x4567, va2x01234567, 0);
114         vpacc2x0123 = vdotq_lane_u32(vpacc2x0123, vb4567x0123, va2x01234567, 1);
115         vpacc2x4567 = vdotq_lane_u32(vpacc2x4567, vb4567x4567, va2x01234567, 1);
116 
117         k -= 8 * sizeof(uint8_t);
118       }
119       // Handle up to 4 final positions of `k`
120       if XNN_UNLIKELY(k != 0) {
121         // Load a 3x4 block of activations.
122         const uint8x8_t va0x01234567 = vreinterpret_u8_u32(vld1_lane_u32((const void*) a0, vmov_n_u32(0), 0)); a0 += 4;
123         const uint8x8_t va1x01234567 = vreinterpret_u8_u32(vld1_lane_u32((const void*) a1, vmov_n_u32(0), 0)); a1 += 4;
124         const uint8x8_t va2x01234567 = vreinterpret_u8_u32(vld1_lane_u32((const void*) a2, vmov_n_u32(0), 0)); a2 += 4;
125 
126         // Load a 4x8 block of weights.
127         const uint8x16_t vb0123x0123 = vld1q_u8(w); w = (const void*) ((const uint8_t*) w + 16);
128         const uint8x16_t vb0123x4567 = vld1q_u8(w); w = (const void*) ((const uint8_t*) w + 16);
129 
130         // Multiply-accumulate: 3x4 * 4x8 --> 3x8.
131         vnacc0 = vdot_u32(vnacc0, va_zero_point, va0x01234567);
132         vpacc0x0123 = vdotq_lane_u32(vpacc0x0123, vb0123x0123, va0x01234567, 0);
133         vpacc0x4567 = vdotq_lane_u32(vpacc0x4567, vb0123x4567, va0x01234567, 0);
134         vnacc1 = vdot_u32(vnacc1, va_zero_point, va1x01234567);
135         vpacc1x0123 = vdotq_lane_u32(vpacc1x0123, vb0123x0123, va1x01234567, 0);
136         vpacc1x4567 = vdotq_lane_u32(vpacc1x4567, vb0123x4567, va1x01234567, 0);
137         vnacc2 = vdot_u32(vnacc2, va_zero_point, va2x01234567);
138         vpacc2x0123 = vdotq_lane_u32(vpacc2x0123, vb0123x0123, va2x01234567, 0);
139         vpacc2x4567 = vdotq_lane_u32(vpacc2x4567, vb0123x4567, va2x01234567, 0);
140       }
141       p -= 3 * sizeof(void*);
142     } while (p != 0);
143 
144     // Subtract zero point from accumulators.
145     vnacc0 = vpadd_u32(vnacc0, vnacc0);
146     const uint32x4_t vnacc0x0123 = vcombine_u32(vnacc0, vnacc0);
147     int32x4_t vacc0x0123 = vreinterpretq_s32_u32(vsubq_u32(vpacc0x0123, vnacc0x0123));
148     int32x4_t vacc0x4567 = vreinterpretq_s32_u32(vsubq_u32(vpacc0x4567, vnacc0x0123));
149     vnacc1 = vpadd_u32(vnacc1, vnacc1);
150     const uint32x4_t vnacc1x0123 = vcombine_u32(vnacc1, vnacc1);
151     int32x4_t vacc1x0123 = vreinterpretq_s32_u32(vsubq_u32(vpacc1x0123, vnacc1x0123));
152     int32x4_t vacc1x4567 = vreinterpretq_s32_u32(vsubq_u32(vpacc1x4567, vnacc1x0123));
153     vnacc2 = vpadd_u32(vnacc2, vnacc2);
154     const uint32x4_t vnacc2x0123 = vcombine_u32(vnacc2, vnacc2);
155     int32x4_t vacc2x0123 = vreinterpretq_s32_u32(vsubq_u32(vpacc2x0123, vnacc2x0123));
156     int32x4_t vacc2x4567 = vreinterpretq_s32_u32(vsubq_u32(vpacc2x4567, vnacc2x0123));
157 
158     const int32x4_t vright_pre_shift = vld1q_dup_s32(&params->rndnu_neon.right_pre_shift);
159     const int32x4_t vmultiplier = vld1q_dup_s32(&params->rndnu_neon.multiplier);
160     const int32x4_t vright_post_shift = vld1q_dup_s32(&params->rndnu_neon.right_post_shift);
161 
162     vacc0x0123 = vshlq_s32(vacc0x0123, vright_pre_shift);
163     vacc0x4567 = vshlq_s32(vacc0x4567, vright_pre_shift);
164     vacc1x0123 = vshlq_s32(vacc1x0123, vright_pre_shift);
165     vacc1x4567 = vshlq_s32(vacc1x4567, vright_pre_shift);
166     vacc2x0123 = vshlq_s32(vacc2x0123, vright_pre_shift);
167     vacc2x4567 = vshlq_s32(vacc2x4567, vright_pre_shift);
168 
169     vacc0x0123 = vqdmulhq_s32(vacc0x0123, vmultiplier);
170     vacc0x4567 = vqdmulhq_s32(vacc0x4567, vmultiplier);
171     vacc1x0123 = vqdmulhq_s32(vacc1x0123, vmultiplier);
172     vacc1x4567 = vqdmulhq_s32(vacc1x4567, vmultiplier);
173     vacc2x0123 = vqdmulhq_s32(vacc2x0123, vmultiplier);
174     vacc2x4567 = vqdmulhq_s32(vacc2x4567, vmultiplier);
175 
176     vacc0x0123 = vrshlq_s32(vacc0x0123, vright_post_shift);
177     vacc0x4567 = vrshlq_s32(vacc0x4567, vright_post_shift);
178     vacc1x0123 = vrshlq_s32(vacc1x0123, vright_post_shift);
179     vacc1x4567 = vrshlq_s32(vacc1x4567, vright_post_shift);
180     vacc2x0123 = vrshlq_s32(vacc2x0123, vright_post_shift);
181     vacc2x4567 = vrshlq_s32(vacc2x4567, vright_post_shift);
182 
183     const int16x8_t voutput_zero_point = vld1q_dup_s16(&params->rndnu_neon.output_zero_point);
184 #if XNN_ARCH_ARM64
185     const int16x8_t vacc0x01234567 = vqaddq_s16(vqmovn_high_s32(vqmovn_s32(vacc0x0123), vacc0x4567), voutput_zero_point);
186     const int16x8_t vacc1x01234567 = vqaddq_s16(vqmovn_high_s32(vqmovn_s32(vacc1x0123), vacc1x4567), voutput_zero_point);
187     const int16x8_t vacc2x01234567 = vqaddq_s16(vqmovn_high_s32(vqmovn_s32(vacc2x0123), vacc2x4567), voutput_zero_point);
188 
189     uint8x16_t vout0x01234567_1x01234567 = vqmovun_high_s16(vqmovun_s16(vacc0x01234567), vacc1x01234567);
190     uint8x8_t vout2x01234567 = vqmovun_s16(vacc2x01234567);
191 #else
192     const int16x8_t vacc0x01234567 = vqaddq_s16(vcombine_s16(vqmovn_s32(vacc0x0123), vqmovn_s32(vacc0x4567)), voutput_zero_point);
193     const int16x8_t vacc1x01234567 = vqaddq_s16(vcombine_s16(vqmovn_s32(vacc1x0123), vqmovn_s32(vacc1x4567)), voutput_zero_point);
194     const int16x8_t vacc2x01234567 = vqaddq_s16(vcombine_s16(vqmovn_s32(vacc2x0123), vqmovn_s32(vacc2x4567)), voutput_zero_point);
195 
196     uint8x16_t vout0x01234567_1x01234567 = vcombine_u8(vqmovun_s16(vacc0x01234567), vqmovun_s16(vacc1x01234567));
197     uint8x8_t vout2x01234567 = vqmovun_s16(vacc2x01234567);
198 #endif
199     const uint8x16_t voutput_min = vld1q_dup_u8(&params->rndnu_neon.output_min);
200     const uint8x16_t voutput_max = vld1q_dup_u8(&params->rndnu_neon.output_max);
201 
202     vout0x01234567_1x01234567 = vmaxq_u8(vout0x01234567_1x01234567, voutput_min);
203     vout2x01234567 = vmax_u8(vout2x01234567, vget_low_u8(voutput_min));
204 
205     vout0x01234567_1x01234567 = vminq_u8(vout0x01234567_1x01234567, voutput_max);
206     vout2x01234567 = vmin_u8(vout2x01234567, vget_low_u8(voutput_max));
207 
208     if (nc >= 8) {
209       vst1_u8(c2 + 0, vout2x01234567);
210       vst1_u8(c1 + 0, vget_high_u8(vout0x01234567_1x01234567));
211       vst1_u8(c0 + 0, vget_low_u8(vout0x01234567_1x01234567));
212 
213       c2 = (uint8_t*) ((uintptr_t) c2 + cn_stride);
214       c1 = (uint8_t*) ((uintptr_t) c1 + cn_stride);
215       c0 = (uint8_t*) ((uintptr_t) c0 + cn_stride);
216 
217       a = (const uint8_t**restrict) ((uintptr_t) a - ks);
218 
219       nc -= 8;
220     } else {
221       if (nc & 4) {
222         vst1_lane_u32((void*) c2, vreinterpret_u32_u8(vout2x01234567), 0); c2 += 4;
223         vst1q_lane_u32((void*) c1, vreinterpretq_u32_u8(vout0x01234567_1x01234567), 2); c1 += 4;
224         vst1q_lane_u32((void*) c0, vreinterpretq_u32_u8(vout0x01234567_1x01234567), 0); c0 += 4;
225         vout2x01234567 = vext_u8(vout2x01234567, vout2x01234567, 4);
226         vout0x01234567_1x01234567 = vextq_u8(vout0x01234567_1x01234567, vout0x01234567_1x01234567, 4);
227       }
228       if (nc & 2) {
229         vst1_lane_u16((void*) c2, vreinterpret_u16_u8(vout2x01234567), 0); c2 += 2;
230         vst1q_lane_u16((void*) c1, vreinterpretq_u16_u8(vout0x01234567_1x01234567), 4); c1 += 2;
231         vst1q_lane_u16((void*) c0, vreinterpretq_u16_u8(vout0x01234567_1x01234567), 0); c0 += 2;
232         vout2x01234567 = vext_u8(vout2x01234567, vout2x01234567, 2);
233         vout0x01234567_1x01234567 = vextq_u8(vout0x01234567_1x01234567, vout0x01234567_1x01234567, 2);
234       }
235       if (nc & 1) {
236         vst1_lane_u8(c2, vout2x01234567, 0);
237         vst1q_lane_u8(c1, vout0x01234567_1x01234567, 8);
238         vst1q_lane_u8(c0, vout0x01234567_1x01234567, 0);
239       }
240 
241       nc = 0;
242     }
243   } while (nc != 0);
244 }
245