xref: /aosp_15_r20/external/XNNPACK/src/qu8-igemm/gen/2x8c4-minmax-rndnu-neondot.c (revision 4bdc94577ba0e567308109d787f7fec7b531ce36)
1 // Auto-generated file. Do not edit!
2 //   Template: src/qu8-igemm/c4-neondot.c.in
3 //   Generator: tools/xngen
4 //
5 // Copyright 2020 Google LLC
6 //
7 // This source code is licensed under the BSD-style license found in the
8 // LICENSE file in the root directory of this source tree.
9 
10 #include <assert.h>
11 
12 #include <arm_neon.h>
13 
14 #include <xnnpack/igemm.h>
15 #include <xnnpack/math.h>
16 
17 
xnn_qu8_igemm_minmax_rndnu_ukernel_2x8c4__neondot(size_t mr,size_t nc,size_t kc,size_t ks,const uint8_t ** restrict a,const void * restrict w,uint8_t * restrict c,size_t cm_stride,size_t cn_stride,size_t a_offset,const uint8_t * zero,const union xnn_qu8_conv_minmax_params params[restrict XNN_MIN_ELEMENTS (1)])18 void xnn_qu8_igemm_minmax_rndnu_ukernel_2x8c4__neondot(
19     size_t mr,
20     size_t nc,
21     size_t kc,
22     size_t ks,
23     const uint8_t** restrict a,
24     const void* restrict w,
25     uint8_t* restrict c,
26     size_t cm_stride,
27     size_t cn_stride,
28     size_t a_offset,
29     const uint8_t* zero,
30     const union xnn_qu8_conv_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_OOB_READS
31 {
32   assert(mr != 0);
33   assert(mr <= 2);
34   assert(nc != 0);
35   assert(kc != 0);
36   assert(ks != 0);
37   assert(ks % (2 * sizeof(void*)) == 0);
38   assert(a_offset % sizeof(uint8_t) == 0);
39   assert(a != NULL);
40   assert(w != NULL);
41   assert(c != NULL);
42 
43   kc = round_up_po2(kc, 4 * sizeof(uint8_t));
44   uint8_t* c0 = c;
45   uint8_t* c1 = (uint8_t*) ((uintptr_t) c0 + cm_stride);
46   if XNN_UNPREDICTABLE(mr != 2) {
47     c1 = c0;
48   }
49 
50   const uint8x8_t va_zero_point = vld1_dup_u8(&params->rndnu_neon.kernel_zero_point[0]);
51 
52   do {
53     // Initialize accumulators with bias. 8 bias values are loaded from the
54     // weight matrix, at the start of the group of 8 columns.
55     uint32x4_t vpacc0x0123 = vld1q_u32(w); w = (const void*) ((const uint32_t*) w + 4);
56     uint32x4_t vpacc0x4567 = vld1q_u32(w); w = (const void*) ((const uint32_t*) w + 4);
57     uint32x4_t vpacc1x0123 = vpacc0x0123;
58     uint32x4_t vpacc1x4567 = vpacc0x4567;
59     uint32x2_t vnacc0 = vmov_n_u32(0);
60     uint32x2_t vnacc1 = vmov_n_u32(0);
61 
62     size_t p = ks;
63     do {
64       const uint8_t* restrict a0 = a[0];
65       if XNN_UNPREDICTABLE(a0 != zero) {
66         a0 = (const uint8_t*) ((uintptr_t) a0 + a_offset);
67       }
68       const uint8_t* restrict a1 = a[1];
69       if XNN_UNPREDICTABLE(a1 != zero) {
70         a1 = (const uint8_t*) ((uintptr_t) a1 + a_offset);
71       }
72       a += 2;
73 
74       // Inner accumulation loop along the 8 columns.
75       size_t k = kc;
76       // 2x partial unrolled loop to load 8 bytes at a time.
77       while (k >= 8 * sizeof(uint8_t)) {
78         // Load a 2x8 block of activations.
79         const uint8x8_t va0x01234567 = vld1_u8(a0); a0 += 8;
80         const uint8x8_t va1x01234567 = vld1_u8(a1); a1 += 8;
81 
82         // Load a 8x8 block of weights.
83         const uint8x16_t vb0123x0123 = vld1q_u8(w); w = (const void*) ((const uint8_t*) w + 16);
84         const uint8x16_t vb0123x4567 = vld1q_u8(w); w = (const void*) ((const uint8_t*) w + 16);
85         const uint8x16_t vb4567x0123 = vld1q_u8(w); w = (const void*) ((const uint8_t*) w + 16);
86         const uint8x16_t vb4567x4567 = vld1q_u8(w); w = (const void*) ((const uint8_t*) w + 16);
87 
88         // Multiply-accumulate: 2x8 * 8x8 --> 2x8.
89         vnacc0 = vdot_u32(vnacc0, va_zero_point, va0x01234567);
90         vpacc0x0123 = vdotq_lane_u32(vpacc0x0123, vb0123x0123, va0x01234567, 0);
91         vpacc0x4567 = vdotq_lane_u32(vpacc0x4567, vb0123x4567, va0x01234567, 0);
92         vpacc0x0123 = vdotq_lane_u32(vpacc0x0123, vb4567x0123, va0x01234567, 1);
93         vpacc0x4567 = vdotq_lane_u32(vpacc0x4567, vb4567x4567, va0x01234567, 1);
94         vnacc1 = vdot_u32(vnacc1, va_zero_point, va1x01234567);
95         vpacc1x0123 = vdotq_lane_u32(vpacc1x0123, vb0123x0123, va1x01234567, 0);
96         vpacc1x4567 = vdotq_lane_u32(vpacc1x4567, vb0123x4567, va1x01234567, 0);
97         vpacc1x0123 = vdotq_lane_u32(vpacc1x0123, vb4567x0123, va1x01234567, 1);
98         vpacc1x4567 = vdotq_lane_u32(vpacc1x4567, vb4567x4567, va1x01234567, 1);
99 
100         k -= 8 * sizeof(uint8_t);
101       }
102       // Handle up to 4 final positions of `k`
103       if XNN_UNLIKELY(k != 0) {
104         // Load a 2x4 block of activations.
105         const uint8x8_t va0x01234567 = vreinterpret_u8_u32(vld1_lane_u32((const void*) a0, vmov_n_u32(0), 0)); a0 += 4;
106         const uint8x8_t va1x01234567 = vreinterpret_u8_u32(vld1_lane_u32((const void*) a1, vmov_n_u32(0), 0)); a1 += 4;
107 
108         // Load a 4x8 block of weights.
109         const uint8x16_t vb0123x0123 = vld1q_u8(w); w = (const void*) ((const uint8_t*) w + 16);
110         const uint8x16_t vb0123x4567 = vld1q_u8(w); w = (const void*) ((const uint8_t*) w + 16);
111 
112         // Multiply-accumulate: 2x4 * 4x8 --> 2x8.
113         vnacc0 = vdot_u32(vnacc0, va_zero_point, va0x01234567);
114         vpacc0x0123 = vdotq_lane_u32(vpacc0x0123, vb0123x0123, va0x01234567, 0);
115         vpacc0x4567 = vdotq_lane_u32(vpacc0x4567, vb0123x4567, va0x01234567, 0);
116         vnacc1 = vdot_u32(vnacc1, va_zero_point, va1x01234567);
117         vpacc1x0123 = vdotq_lane_u32(vpacc1x0123, vb0123x0123, va1x01234567, 0);
118         vpacc1x4567 = vdotq_lane_u32(vpacc1x4567, vb0123x4567, va1x01234567, 0);
119       }
120       p -= 2 * sizeof(void*);
121     } while (p != 0);
122 
123     // Subtract zero point from accumulators.
124     vnacc0 = vpadd_u32(vnacc0, vnacc0);
125     const uint32x4_t vnacc0x0123 = vcombine_u32(vnacc0, vnacc0);
126     int32x4_t vacc0x0123 = vreinterpretq_s32_u32(vsubq_u32(vpacc0x0123, vnacc0x0123));
127     int32x4_t vacc0x4567 = vreinterpretq_s32_u32(vsubq_u32(vpacc0x4567, vnacc0x0123));
128     vnacc1 = vpadd_u32(vnacc1, vnacc1);
129     const uint32x4_t vnacc1x0123 = vcombine_u32(vnacc1, vnacc1);
130     int32x4_t vacc1x0123 = vreinterpretq_s32_u32(vsubq_u32(vpacc1x0123, vnacc1x0123));
131     int32x4_t vacc1x4567 = vreinterpretq_s32_u32(vsubq_u32(vpacc1x4567, vnacc1x0123));
132 
133     const int32x4_t vright_pre_shift = vld1q_dup_s32(&params->rndnu_neon.right_pre_shift);
134     const int32x4_t vmultiplier = vld1q_dup_s32(&params->rndnu_neon.multiplier);
135     const int32x4_t vright_post_shift = vld1q_dup_s32(&params->rndnu_neon.right_post_shift);
136 
137     vacc0x0123 = vshlq_s32(vacc0x0123, vright_pre_shift);
138     vacc0x4567 = vshlq_s32(vacc0x4567, vright_pre_shift);
139     vacc1x0123 = vshlq_s32(vacc1x0123, vright_pre_shift);
140     vacc1x4567 = vshlq_s32(vacc1x4567, vright_pre_shift);
141 
142     vacc0x0123 = vqdmulhq_s32(vacc0x0123, vmultiplier);
143     vacc0x4567 = vqdmulhq_s32(vacc0x4567, vmultiplier);
144     vacc1x0123 = vqdmulhq_s32(vacc1x0123, vmultiplier);
145     vacc1x4567 = vqdmulhq_s32(vacc1x4567, vmultiplier);
146 
147     vacc0x0123 = vrshlq_s32(vacc0x0123, vright_post_shift);
148     vacc0x4567 = vrshlq_s32(vacc0x4567, vright_post_shift);
149     vacc1x0123 = vrshlq_s32(vacc1x0123, vright_post_shift);
150     vacc1x4567 = vrshlq_s32(vacc1x4567, vright_post_shift);
151 
152     const int16x8_t voutput_zero_point = vld1q_dup_s16(&params->rndnu_neon.output_zero_point);
153 #if XNN_ARCH_ARM64
154     const int16x8_t vacc0x01234567 = vqaddq_s16(vqmovn_high_s32(vqmovn_s32(vacc0x0123), vacc0x4567), voutput_zero_point);
155     const int16x8_t vacc1x01234567 = vqaddq_s16(vqmovn_high_s32(vqmovn_s32(vacc1x0123), vacc1x4567), voutput_zero_point);
156 
157     uint8x16_t vout0x01234567_1x01234567 = vqmovun_high_s16(vqmovun_s16(vacc0x01234567), vacc1x01234567);
158 #else
159     const int16x8_t vacc0x01234567 = vqaddq_s16(vcombine_s16(vqmovn_s32(vacc0x0123), vqmovn_s32(vacc0x4567)), voutput_zero_point);
160     const int16x8_t vacc1x01234567 = vqaddq_s16(vcombine_s16(vqmovn_s32(vacc1x0123), vqmovn_s32(vacc1x4567)), voutput_zero_point);
161 
162     uint8x16_t vout0x01234567_1x01234567 = vcombine_u8(vqmovun_s16(vacc0x01234567), vqmovun_s16(vacc1x01234567));
163 #endif
164     const uint8x16_t voutput_min = vld1q_dup_u8(&params->rndnu_neon.output_min);
165     const uint8x16_t voutput_max = vld1q_dup_u8(&params->rndnu_neon.output_max);
166 
167     vout0x01234567_1x01234567 = vmaxq_u8(vout0x01234567_1x01234567, voutput_min);
168 
169     vout0x01234567_1x01234567 = vminq_u8(vout0x01234567_1x01234567, voutput_max);
170 
171     if (nc >= 8) {
172       vst1_u8(c1 + 0, vget_high_u8(vout0x01234567_1x01234567));
173       vst1_u8(c0 + 0, vget_low_u8(vout0x01234567_1x01234567));
174 
175       c1 = (uint8_t*) ((uintptr_t) c1 + cn_stride);
176       c0 = (uint8_t*) ((uintptr_t) c0 + cn_stride);
177 
178       a = (const uint8_t**restrict) ((uintptr_t) a - ks);
179 
180       nc -= 8;
181     } else {
182       if (nc & 4) {
183         vst1q_lane_u32((void*) c1, vreinterpretq_u32_u8(vout0x01234567_1x01234567), 2); c1 += 4;
184         vst1q_lane_u32((void*) c0, vreinterpretq_u32_u8(vout0x01234567_1x01234567), 0); c0 += 4;
185         vout0x01234567_1x01234567 = vextq_u8(vout0x01234567_1x01234567, vout0x01234567_1x01234567, 4);
186       }
187       if (nc & 2) {
188         vst1q_lane_u16((void*) c1, vreinterpretq_u16_u8(vout0x01234567_1x01234567), 4); c1 += 2;
189         vst1q_lane_u16((void*) c0, vreinterpretq_u16_u8(vout0x01234567_1x01234567), 0); c0 += 2;
190         vout0x01234567_1x01234567 = vextq_u8(vout0x01234567_1x01234567, vout0x01234567_1x01234567, 2);
191       }
192       if (nc & 1) {
193         vst1q_lane_u8(c1, vout0x01234567_1x01234567, 8);
194         vst1q_lane_u8(c0, vout0x01234567_1x01234567, 0);
195       }
196 
197       nc = 0;
198     }
199   } while (nc != 0);
200 }
201