xref: /aosp_15_r20/external/XNNPACK/src/qu8-igemm/gen/2x16c4-minmax-rndnu-neondot.c (revision 4bdc94577ba0e567308109d787f7fec7b531ce36)
1 // Auto-generated file. Do not edit!
2 //   Template: src/qu8-igemm/c4-neondot.c.in
3 //   Generator: tools/xngen
4 //
5 // Copyright 2020 Google LLC
6 //
7 // This source code is licensed under the BSD-style license found in the
8 // LICENSE file in the root directory of this source tree.
9 
10 #include <assert.h>
11 
12 #include <arm_neon.h>
13 
14 #include <xnnpack/igemm.h>
15 #include <xnnpack/math.h>
16 
17 
xnn_qu8_igemm_minmax_rndnu_ukernel_2x16c4__neondot(size_t mr,size_t nc,size_t kc,size_t ks,const uint8_t ** restrict a,const void * restrict w,uint8_t * restrict c,size_t cm_stride,size_t cn_stride,size_t a_offset,const uint8_t * zero,const union xnn_qu8_conv_minmax_params params[restrict XNN_MIN_ELEMENTS (1)])18 void xnn_qu8_igemm_minmax_rndnu_ukernel_2x16c4__neondot(
19     size_t mr,
20     size_t nc,
21     size_t kc,
22     size_t ks,
23     const uint8_t** restrict a,
24     const void* restrict w,
25     uint8_t* restrict c,
26     size_t cm_stride,
27     size_t cn_stride,
28     size_t a_offset,
29     const uint8_t* zero,
30     const union xnn_qu8_conv_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_OOB_READS
31 {
32   assert(mr != 0);
33   assert(mr <= 2);
34   assert(nc != 0);
35   assert(kc != 0);
36   assert(ks != 0);
37   assert(ks % (2 * sizeof(void*)) == 0);
38   assert(a_offset % sizeof(uint8_t) == 0);
39   assert(a != NULL);
40   assert(w != NULL);
41   assert(c != NULL);
42 
43   kc = round_up_po2(kc, 4 * sizeof(uint8_t));
44   uint8_t* c0 = c;
45   uint8_t* c1 = (uint8_t*) ((uintptr_t) c0 + cm_stride);
46   if XNN_UNPREDICTABLE(mr != 2) {
47     c1 = c0;
48   }
49 
50   const uint8x8_t va_zero_point = vld1_dup_u8(&params->rndnu_neon.kernel_zero_point[0]);
51 
52   do {
53     // Initialize accumulators with bias. 16 bias values are loaded from the
54     // weight matrix, at the start of the group of 16 columns.
55     uint32x4_t vpacc0x0123 = vld1q_u32(w); w = (const void*) ((const uint32_t*) w + 4);
56     uint32x4_t vpacc0x4567 = vld1q_u32(w); w = (const void*) ((const uint32_t*) w + 4);
57     uint32x4_t vpacc0x89AB = vld1q_u32(w); w = (const void*) ((const uint32_t*) w + 4);
58     uint32x4_t vpacc0xCDEF = vld1q_u32(w); w = (const void*) ((const uint32_t*) w + 4);
59     uint32x4_t vpacc1x0123 = vpacc0x0123;
60     uint32x4_t vpacc1x4567 = vpacc0x4567;
61     uint32x4_t vpacc1x89AB = vpacc0x89AB;
62     uint32x4_t vpacc1xCDEF = vpacc0xCDEF;
63     uint32x2_t vnacc0 = vmov_n_u32(0);
64     uint32x2_t vnacc1 = vmov_n_u32(0);
65 
66     size_t p = ks;
67     do {
68       const uint8_t* restrict a0 = a[0];
69       if XNN_UNPREDICTABLE(a0 != zero) {
70         a0 = (const uint8_t*) ((uintptr_t) a0 + a_offset);
71       }
72       const uint8_t* restrict a1 = a[1];
73       if XNN_UNPREDICTABLE(a1 != zero) {
74         a1 = (const uint8_t*) ((uintptr_t) a1 + a_offset);
75       }
76       a += 2;
77 
78       // Inner accumulation loop along the 16 columns.
79       size_t k = kc;
80       // 2x partial unrolled loop to load 8 bytes at a time.
81       while (k >= 8 * sizeof(uint8_t)) {
82         // Load a 2x8 block of activations.
83         const uint8x8_t va0x01234567 = vld1_u8(a0); a0 += 8;
84         const uint8x8_t va1x01234567 = vld1_u8(a1); a1 += 8;
85 
86         // Load a 8x16 block of weights.
87         const uint8x16_t vb0123x0123 = vld1q_u8(w); w = (const void*) ((const uint8_t*) w + 16);
88         const uint8x16_t vb0123x4567 = vld1q_u8(w); w = (const void*) ((const uint8_t*) w + 16);
89         const uint8x16_t vb0123x89AB = vld1q_u8(w); w = (const void*) ((const uint8_t*) w + 16);
90         const uint8x16_t vb0123xCDEF = vld1q_u8(w); w = (const void*) ((const uint8_t*) w + 16);
91         const uint8x16_t vb4567x0123 = vld1q_u8(w); w = (const void*) ((const uint8_t*) w + 16);
92         const uint8x16_t vb4567x4567 = vld1q_u8(w); w = (const void*) ((const uint8_t*) w + 16);
93         const uint8x16_t vb4567x89AB = vld1q_u8(w); w = (const void*) ((const uint8_t*) w + 16);
94         const uint8x16_t vb4567xCDEF = vld1q_u8(w); w = (const void*) ((const uint8_t*) w + 16);
95 
96         // Multiply-accumulate: 2x8 * 8x16 --> 2x16.
97         vnacc0 = vdot_u32(vnacc0, va_zero_point, va0x01234567);
98         vpacc0x0123 = vdotq_lane_u32(vpacc0x0123, vb0123x0123, va0x01234567, 0);
99         vpacc0x4567 = vdotq_lane_u32(vpacc0x4567, vb0123x4567, va0x01234567, 0);
100         vpacc0x89AB = vdotq_lane_u32(vpacc0x89AB, vb0123x89AB, va0x01234567, 0);
101         vpacc0xCDEF = vdotq_lane_u32(vpacc0xCDEF, vb0123xCDEF, va0x01234567, 0);
102         vpacc0x0123 = vdotq_lane_u32(vpacc0x0123, vb4567x0123, va0x01234567, 1);
103         vpacc0x4567 = vdotq_lane_u32(vpacc0x4567, vb4567x4567, va0x01234567, 1);
104         vpacc0x89AB = vdotq_lane_u32(vpacc0x89AB, vb4567x89AB, va0x01234567, 1);
105         vpacc0xCDEF = vdotq_lane_u32(vpacc0xCDEF, vb4567xCDEF, va0x01234567, 1);
106         vnacc1 = vdot_u32(vnacc1, va_zero_point, va1x01234567);
107         vpacc1x0123 = vdotq_lane_u32(vpacc1x0123, vb0123x0123, va1x01234567, 0);
108         vpacc1x4567 = vdotq_lane_u32(vpacc1x4567, vb0123x4567, va1x01234567, 0);
109         vpacc1x89AB = vdotq_lane_u32(vpacc1x89AB, vb0123x89AB, va1x01234567, 0);
110         vpacc1xCDEF = vdotq_lane_u32(vpacc1xCDEF, vb0123xCDEF, va1x01234567, 0);
111         vpacc1x0123 = vdotq_lane_u32(vpacc1x0123, vb4567x0123, va1x01234567, 1);
112         vpacc1x4567 = vdotq_lane_u32(vpacc1x4567, vb4567x4567, va1x01234567, 1);
113         vpacc1x89AB = vdotq_lane_u32(vpacc1x89AB, vb4567x89AB, va1x01234567, 1);
114         vpacc1xCDEF = vdotq_lane_u32(vpacc1xCDEF, vb4567xCDEF, va1x01234567, 1);
115 
116         k -= 8 * sizeof(uint8_t);
117       }
118       // Handle up to 4 final positions of `k`
119       if XNN_UNLIKELY(k != 0) {
120         // Load a 2x4 block of activations.
121         const uint8x8_t va0x01234567 = vreinterpret_u8_u32(vld1_lane_u32((const void*) a0, vmov_n_u32(0), 0)); a0 += 4;
122         const uint8x8_t va1x01234567 = vreinterpret_u8_u32(vld1_lane_u32((const void*) a1, vmov_n_u32(0), 0)); a1 += 4;
123 
124         // Load a 4x16 block of weights.
125         const uint8x16_t vb0123x0123 = vld1q_u8(w); w = (const void*) ((const uint8_t*) w + 16);
126         const uint8x16_t vb0123x4567 = vld1q_u8(w); w = (const void*) ((const uint8_t*) w + 16);
127         const uint8x16_t vb0123x89AB = vld1q_u8(w); w = (const void*) ((const uint8_t*) w + 16);
128         const uint8x16_t vb0123xCDEF = vld1q_u8(w); w = (const void*) ((const uint8_t*) w + 16);
129 
130         // Multiply-accumulate: 2x4 * 4x16 --> 2x16.
131         vnacc0 = vdot_u32(vnacc0, va_zero_point, va0x01234567);
132         vpacc0x0123 = vdotq_lane_u32(vpacc0x0123, vb0123x0123, va0x01234567, 0);
133         vpacc0x4567 = vdotq_lane_u32(vpacc0x4567, vb0123x4567, va0x01234567, 0);
134         vpacc0x89AB = vdotq_lane_u32(vpacc0x89AB, vb0123x89AB, va0x01234567, 0);
135         vpacc0xCDEF = vdotq_lane_u32(vpacc0xCDEF, vb0123xCDEF, va0x01234567, 0);
136         vnacc1 = vdot_u32(vnacc1, va_zero_point, va1x01234567);
137         vpacc1x0123 = vdotq_lane_u32(vpacc1x0123, vb0123x0123, va1x01234567, 0);
138         vpacc1x4567 = vdotq_lane_u32(vpacc1x4567, vb0123x4567, va1x01234567, 0);
139         vpacc1x89AB = vdotq_lane_u32(vpacc1x89AB, vb0123x89AB, va1x01234567, 0);
140         vpacc1xCDEF = vdotq_lane_u32(vpacc1xCDEF, vb0123xCDEF, va1x01234567, 0);
141       }
142       p -= 2 * sizeof(void*);
143     } while (p != 0);
144 
145     // Subtract zero point from accumulators.
146     vnacc0 = vpadd_u32(vnacc0, vnacc0);
147     const uint32x4_t vnacc0x0123 = vcombine_u32(vnacc0, vnacc0);
148     int32x4_t vacc0x0123 = vreinterpretq_s32_u32(vsubq_u32(vpacc0x0123, vnacc0x0123));
149     int32x4_t vacc0x4567 = vreinterpretq_s32_u32(vsubq_u32(vpacc0x4567, vnacc0x0123));
150     int32x4_t vacc0x89AB = vreinterpretq_s32_u32(vsubq_u32(vpacc0x89AB, vnacc0x0123));
151     int32x4_t vacc0xCDEF = vreinterpretq_s32_u32(vsubq_u32(vpacc0xCDEF, vnacc0x0123));
152     vnacc1 = vpadd_u32(vnacc1, vnacc1);
153     const uint32x4_t vnacc1x0123 = vcombine_u32(vnacc1, vnacc1);
154     int32x4_t vacc1x0123 = vreinterpretq_s32_u32(vsubq_u32(vpacc1x0123, vnacc1x0123));
155     int32x4_t vacc1x4567 = vreinterpretq_s32_u32(vsubq_u32(vpacc1x4567, vnacc1x0123));
156     int32x4_t vacc1x89AB = vreinterpretq_s32_u32(vsubq_u32(vpacc1x89AB, vnacc1x0123));
157     int32x4_t vacc1xCDEF = vreinterpretq_s32_u32(vsubq_u32(vpacc1xCDEF, vnacc1x0123));
158 
159     const int32x4_t vright_pre_shift = vld1q_dup_s32(&params->rndnu_neon.right_pre_shift);
160     const int32x4_t vmultiplier = vld1q_dup_s32(&params->rndnu_neon.multiplier);
161     const int32x4_t vright_post_shift = vld1q_dup_s32(&params->rndnu_neon.right_post_shift);
162 
163     vacc0x0123 = vshlq_s32(vacc0x0123, vright_pre_shift);
164     vacc0x4567 = vshlq_s32(vacc0x4567, vright_pre_shift);
165     vacc0x89AB = vshlq_s32(vacc0x89AB, vright_pre_shift);
166     vacc0xCDEF = vshlq_s32(vacc0xCDEF, vright_pre_shift);
167     vacc1x0123 = vshlq_s32(vacc1x0123, vright_pre_shift);
168     vacc1x4567 = vshlq_s32(vacc1x4567, vright_pre_shift);
169     vacc1x89AB = vshlq_s32(vacc1x89AB, vright_pre_shift);
170     vacc1xCDEF = vshlq_s32(vacc1xCDEF, vright_pre_shift);
171 
172     vacc0x0123 = vqdmulhq_s32(vacc0x0123, vmultiplier);
173     vacc0x4567 = vqdmulhq_s32(vacc0x4567, vmultiplier);
174     vacc0x89AB = vqdmulhq_s32(vacc0x89AB, vmultiplier);
175     vacc0xCDEF = vqdmulhq_s32(vacc0xCDEF, vmultiplier);
176     vacc1x0123 = vqdmulhq_s32(vacc1x0123, vmultiplier);
177     vacc1x4567 = vqdmulhq_s32(vacc1x4567, vmultiplier);
178     vacc1x89AB = vqdmulhq_s32(vacc1x89AB, vmultiplier);
179     vacc1xCDEF = vqdmulhq_s32(vacc1xCDEF, vmultiplier);
180 
181     vacc0x0123 = vrshlq_s32(vacc0x0123, vright_post_shift);
182     vacc0x4567 = vrshlq_s32(vacc0x4567, vright_post_shift);
183     vacc0x89AB = vrshlq_s32(vacc0x89AB, vright_post_shift);
184     vacc0xCDEF = vrshlq_s32(vacc0xCDEF, vright_post_shift);
185     vacc1x0123 = vrshlq_s32(vacc1x0123, vright_post_shift);
186     vacc1x4567 = vrshlq_s32(vacc1x4567, vright_post_shift);
187     vacc1x89AB = vrshlq_s32(vacc1x89AB, vright_post_shift);
188     vacc1xCDEF = vrshlq_s32(vacc1xCDEF, vright_post_shift);
189 
190     const int16x8_t voutput_zero_point = vld1q_dup_s16(&params->rndnu_neon.output_zero_point);
191 #if XNN_ARCH_ARM64
192     const int16x8_t vacc0x01234567 = vqaddq_s16(vqmovn_high_s32(vqmovn_s32(vacc0x0123), vacc0x4567), voutput_zero_point);
193     const int16x8_t vacc0x89ABCDEF = vqaddq_s16(vqmovn_high_s32(vqmovn_s32(vacc0x89AB), vacc0xCDEF), voutput_zero_point);
194     const int16x8_t vacc1x01234567 = vqaddq_s16(vqmovn_high_s32(vqmovn_s32(vacc1x0123), vacc1x4567), voutput_zero_point);
195     const int16x8_t vacc1x89ABCDEF = vqaddq_s16(vqmovn_high_s32(vqmovn_s32(vacc1x89AB), vacc1xCDEF), voutput_zero_point);
196 
197     uint8x16_t vout0x0123456789ABCDEF = vqmovun_high_s16(vqmovun_s16(vacc0x01234567), vacc0x89ABCDEF);
198     uint8x16_t vout1x0123456789ABCDEF = vqmovun_high_s16(vqmovun_s16(vacc1x01234567), vacc1x89ABCDEF);
199 #else
200     const int16x8_t vacc0x01234567 = vqaddq_s16(vcombine_s16(vqmovn_s32(vacc0x0123), vqmovn_s32(vacc0x4567)), voutput_zero_point);
201     const int16x8_t vacc0x89ABCDEF = vqaddq_s16(vcombine_s16(vqmovn_s32(vacc0x89AB), vqmovn_s32(vacc0xCDEF)), voutput_zero_point);
202     const int16x8_t vacc1x01234567 = vqaddq_s16(vcombine_s16(vqmovn_s32(vacc1x0123), vqmovn_s32(vacc1x4567)), voutput_zero_point);
203     const int16x8_t vacc1x89ABCDEF = vqaddq_s16(vcombine_s16(vqmovn_s32(vacc1x89AB), vqmovn_s32(vacc1xCDEF)), voutput_zero_point);
204 
205     uint8x16_t vout0x0123456789ABCDEF = vcombine_u8(vqmovun_s16(vacc0x01234567), vqmovun_s16(vacc0x89ABCDEF));
206     uint8x16_t vout1x0123456789ABCDEF = vcombine_u8(vqmovun_s16(vacc1x01234567), vqmovun_s16(vacc1x89ABCDEF));
207 #endif
208     const uint8x16_t voutput_min = vld1q_dup_u8(&params->rndnu_neon.output_min);
209     const uint8x16_t voutput_max = vld1q_dup_u8(&params->rndnu_neon.output_max);
210 
211     vout0x0123456789ABCDEF = vmaxq_u8(vout0x0123456789ABCDEF, voutput_min);
212     vout1x0123456789ABCDEF = vmaxq_u8(vout1x0123456789ABCDEF, voutput_min);
213 
214     vout0x0123456789ABCDEF = vminq_u8(vout0x0123456789ABCDEF, voutput_max);
215     vout1x0123456789ABCDEF = vminq_u8(vout1x0123456789ABCDEF, voutput_max);
216 
217     if (nc >= 16) {
218       vst1q_u8(c1 + 0, vout1x0123456789ABCDEF);
219       vst1q_u8(c0 + 0, vout0x0123456789ABCDEF);
220 
221       c1 = (uint8_t*) ((uintptr_t) c1 + cn_stride);
222       c0 = (uint8_t*) ((uintptr_t) c0 + cn_stride);
223 
224       a = (const uint8_t**restrict) ((uintptr_t) a - ks);
225 
226       nc -= 16;
227     } else {
228       uint8x16_t vout0x01234567_1x01234567 = vcombine_u8(vget_low_u8(vout0x0123456789ABCDEF), vget_low_u8(vout1x0123456789ABCDEF));
229       if (nc & 8) {
230         vst1_u8(c1, vget_high_u8(vout0x01234567_1x01234567)); c1 += 8;
231         vst1_u8(c0, vget_low_u8(vout0x01234567_1x01234567)); c0 += 8;
232         vout0x01234567_1x01234567 = vcombine_u8(vget_high_u8(vout0x0123456789ABCDEF), vget_high_u8(vout1x0123456789ABCDEF));
233       }
234       if (nc & 4) {
235         vst1q_lane_u32((void*) c1, vreinterpretq_u32_u8(vout0x01234567_1x01234567), 2); c1 += 4;
236         vst1q_lane_u32((void*) c0, vreinterpretq_u32_u8(vout0x01234567_1x01234567), 0); c0 += 4;
237         vout0x01234567_1x01234567 = vextq_u8(vout0x01234567_1x01234567, vout0x01234567_1x01234567, 4);
238       }
239       if (nc & 2) {
240         vst1q_lane_u16((void*) c1, vreinterpretq_u16_u8(vout0x01234567_1x01234567), 4); c1 += 2;
241         vst1q_lane_u16((void*) c0, vreinterpretq_u16_u8(vout0x01234567_1x01234567), 0); c0 += 2;
242         vout0x01234567_1x01234567 = vextq_u8(vout0x01234567_1x01234567, vout0x01234567_1x01234567, 2);
243       }
244       if (nc & 1) {
245         vst1q_lane_u8(c1, vout0x01234567_1x01234567, 8);
246         vst1q_lane_u8(c0, vout0x01234567_1x01234567, 0);
247       }
248 
249       nc = 0;
250     }
251   } while (nc != 0);
252 }
253