xref: /aosp_15_r20/external/XNNPACK/src/qu8-igemm/gen/1x8c8-minmax-fp32-avx2.c (revision 4bdc94577ba0e567308109d787f7fec7b531ce36)
1 // Auto-generated file. Do not edit!
2 //   Template: src/qs8-igemm/MRx8c8-avx2.c.in
3 //   Generator: tools/xngen
4 //
5 // Copyright 2020 Google LLC
6 //
7 // This source code is licensed under the BSD-style license found in the
8 // LICENSE file in the root directory of this source tree.
9 
10 #include <assert.h>
11 
12 #include <immintrin.h>
13 
14 #include <xnnpack/igemm.h>
15 #include <xnnpack/intrinsics-polyfill.h>
16 #include <xnnpack/math.h>
17 #include <xnnpack/unaligned.h>
18 
19 
xnn_qu8_igemm_minmax_fp32_ukernel_1x8c8__avx2(size_t mr,size_t nc,size_t kc,size_t ks,const uint8_t ** restrict a,const void * restrict w,uint8_t * restrict c,size_t cm_stride,size_t cn_stride,size_t a_offset,const uint8_t * zero,const union xnn_qu8_conv_minmax_params params[restrict XNN_MIN_ELEMENTS (1)])20 void xnn_qu8_igemm_minmax_fp32_ukernel_1x8c8__avx2(
21     size_t mr,
22     size_t nc,
23     size_t kc,
24     size_t ks,
25     const uint8_t** restrict a,
26     const void* restrict w,
27     uint8_t* restrict c,
28     size_t cm_stride,
29     size_t cn_stride,
30     size_t a_offset,
31     const uint8_t* zero,
32     const union xnn_qu8_conv_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_OOB_READS
33 {
34   assert(mr != 0);
35   assert(mr <= 1);
36   assert(nc != 0);
37   assert(kc != 0);
38   assert(ks != 0);
39   assert(ks % (1 * sizeof(void*)) == 0);
40   assert(a_offset % sizeof(uint8_t) == 0);
41   assert(a != NULL);
42   assert(w != NULL);
43   assert(c != NULL);
44 
45   kc = round_up_po2(kc, 8);
46   uint8_t* c0 = c;
47 
48   do {
49     const __m128i vbias0x0 = _mm_cvtsi32_si128(((const int*) w)[0]);
50     const __m128i vbias0x1 = _mm_cvtsi32_si128(((const int*) w)[1]);
51     __m256i vacc0x01 = _mm256_inserti128_si256(_mm256_castsi128_si256(vbias0x0), vbias0x1, 1);
52     const __m128i vbias0x2 = _mm_cvtsi32_si128(((const int*) w)[2]);
53     const __m128i vbias0x3 = _mm_cvtsi32_si128(((const int*) w)[3]);
54     __m256i vacc0x23 = _mm256_inserti128_si256(_mm256_castsi128_si256(vbias0x2), vbias0x3, 1);
55     const __m128i vbias0x4 = _mm_cvtsi32_si128(((const int*) w)[4]);
56     const __m128i vbias0x5 = _mm_cvtsi32_si128(((const int*) w)[5]);
57     __m256i vacc0x45 = _mm256_inserti128_si256(_mm256_castsi128_si256(vbias0x4), vbias0x5, 1);
58     const __m128i vbias0x6 = _mm_cvtsi32_si128(((const int*) w)[6]);
59     const __m128i vbias0x7 = _mm_cvtsi32_si128(((const int*) w)[7]);
60     __m256i vacc0x67 = _mm256_inserti128_si256(_mm256_castsi128_si256(vbias0x6), vbias0x7, 1);
61     w = (const int32_t*) w + 8;
62 
63     size_t p = ks;
64     const __m256i vb_zero_point = _mm256_load_si256((const __m256i*) params->fp32_avx2.kernel_zero_point);
65     do {
66       const uint8_t* restrict a0 = a[0];
67       if XNN_UNPREDICTABLE(a0 != zero) {
68         a0 = (const uint8_t*) ((uintptr_t) a0 + a_offset);
69       }
70       a += 1;
71 
72       size_t k = 0;
73       while (k < kc) {
74         const __m128i va0 = _mm_broadcastq_epi64(_mm_loadl_epi64((const __m128i*) a0));
75         const __m256i vxa0 = _mm256_cvtepu8_epi16(va0);
76         a0 += 8;
77 
78         const __m128i vb01 = _mm_load_si128((const __m128i*) w);
79         const __m256i vxb01 = _mm256_sub_epi16(_mm256_cvtepu8_epi16(vb01), vb_zero_point);
80 
81         vacc0x01 = _mm256_add_epi32(vacc0x01, _mm256_madd_epi16(vxa0, vxb01));
82         const __m128i vb23 = _mm_load_si128((const __m128i*) ((const uint8_t*) w + 16));
83         const __m256i vxb23 = _mm256_sub_epi16(_mm256_cvtepu8_epi16(vb23), vb_zero_point);
84 
85         vacc0x23 = _mm256_add_epi32(vacc0x23, _mm256_madd_epi16(vxa0, vxb23));
86         const __m128i vb45 = _mm_load_si128((const __m128i*) ((const uint8_t*) w + 32));
87         const __m256i vxb45 = _mm256_sub_epi16(_mm256_cvtepu8_epi16(vb45), vb_zero_point);
88 
89         vacc0x45 = _mm256_add_epi32(vacc0x45, _mm256_madd_epi16(vxa0, vxb45));
90         const __m128i vb67 = _mm_load_si128((const __m128i*) ((const uint8_t*) w + 48));
91         const __m256i vxb67 = _mm256_sub_epi16(_mm256_cvtepu8_epi16(vb67), vb_zero_point);
92 
93         vacc0x67 = _mm256_add_epi32(vacc0x67, _mm256_madd_epi16(vxa0, vxb67));
94 
95         w = (const void*) ((const uint8_t*) w + 64);
96         k += 8 * sizeof(uint8_t);
97       }
98       p -= 1 * sizeof(void*);
99     } while (p != 0);
100 
101     const __m256i vacc0x0213 = _mm256_hadd_epi32(vacc0x01, vacc0x23);
102     const __m256i vacc0x4657 = _mm256_hadd_epi32(vacc0x45, vacc0x67);
103 
104     const __m256i vacc0x02461357 = _mm256_hadd_epi32(vacc0x0213, vacc0x4657);
105 
106     const __m256i vpermute_mask = _mm256_set_epi32(7, 3, 6, 2, 5, 1, 4, 0);
107     __m256i vacc0x01234567 = _mm256_permutevar8x32_epi32(vacc0x02461357, vpermute_mask);
108 
109     __m256 vscaled0x01234567 = _mm256_cvtepi32_ps(vacc0x01234567);
110 
111     const __m256 vscale = _mm256_load_ps(params->fp32_avx2.scale);
112     vscaled0x01234567 = _mm256_mul_ps(vscaled0x01234567, vscale);
113 
114     const __m256 voutput_max_less_zero_point = _mm256_load_ps(params->fp32_avx2.output_max_less_zero_point);
115     vscaled0x01234567 = _mm256_min_ps(vscaled0x01234567, voutput_max_less_zero_point);
116 
117     vacc0x01234567 = _mm256_cvtps_epi32(vscaled0x01234567);
118 
119     const __m256i voutput_zero_point = _mm256_load_si256((const __m256i*) params->fp32_avx2.output_zero_point);
120     __m256i vacc00x01234567 = _mm256_adds_epi16(_mm256_packs_epi32(vacc0x01234567, vacc0x01234567), voutput_zero_point);
121 
122     vacc00x01234567 = _mm256_permute4x64_epi64(vacc00x01234567, _MM_SHUFFLE(3, 1, 2, 0));
123 
124     __m256i vout = _mm256_packus_epi16(vacc00x01234567, vacc00x01234567);
125 
126     vout = _mm256_max_epu8(vout, _mm256_load_si256((const __m256i*) params->fp32_avx2.output_min));
127 
128     __m128i vout_lo = _mm256_castsi256_si128(vout);
129     __m128i vout_hi = _mm256_extracti128_si256(vout, 1);
130 
131     if (nc >= 8) {
132       _mm_storel_epi64((__m128i*) c0, vout_lo);
133 
134       c0 = (uint8_t*) ((uintptr_t) c0 + cn_stride);
135 
136       a = (const uint8_t**restrict) ((uintptr_t) a - ks);
137 
138       nc -= 8;
139     } else {
140       if (nc & 4) {
141         _mm_storeu_si32(c0, vout_lo);
142 
143         c0 += 4;
144 
145         vout_lo = _mm_srli_epi64(vout_lo, 32);
146         vout_hi = _mm_srli_epi64(vout_hi, 32);
147       }
148       if (nc & 2) {
149         unaligned_store_u16(c0, (uint16_t) _mm_extract_epi16(vout_lo, 0));
150 
151         c0 += 2;
152 
153         vout_lo = _mm_srli_epi32(vout_lo, 16);
154         vout_hi = _mm_srli_epi32(vout_hi, 16);
155       }
156       if (nc & 1) {
157         *c0 = (uint8_t) _mm_extract_epi8(vout_lo, 0);
158       }
159 
160       nc = 0;
161     }
162   } while (nc != 0);
163 }
164