xref: /aosp_15_r20/external/XNNPACK/src/qu8-igemm/gen/1x16c4-minmax-rndnu-neondot.c (revision 4bdc94577ba0e567308109d787f7fec7b531ce36)
1 // Auto-generated file. Do not edit!
2 //   Template: src/qu8-igemm/c4-neondot.c.in
3 //   Generator: tools/xngen
4 //
5 // Copyright 2020 Google LLC
6 //
7 // This source code is licensed under the BSD-style license found in the
8 // LICENSE file in the root directory of this source tree.
9 
10 #include <assert.h>
11 
12 #include <arm_neon.h>
13 
14 #include <xnnpack/igemm.h>
15 #include <xnnpack/math.h>
16 
17 
xnn_qu8_igemm_minmax_rndnu_ukernel_1x16c4__neondot(size_t mr,size_t nc,size_t kc,size_t ks,const uint8_t ** restrict a,const void * restrict w,uint8_t * restrict c,size_t cm_stride,size_t cn_stride,size_t a_offset,const uint8_t * zero,const union xnn_qu8_conv_minmax_params params[restrict XNN_MIN_ELEMENTS (1)])18 void xnn_qu8_igemm_minmax_rndnu_ukernel_1x16c4__neondot(
19     size_t mr,
20     size_t nc,
21     size_t kc,
22     size_t ks,
23     const uint8_t** restrict a,
24     const void* restrict w,
25     uint8_t* restrict c,
26     size_t cm_stride,
27     size_t cn_stride,
28     size_t a_offset,
29     const uint8_t* zero,
30     const union xnn_qu8_conv_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_OOB_READS
31 {
32   assert(mr != 0);
33   assert(mr <= 1);
34   assert(nc != 0);
35   assert(kc != 0);
36   assert(ks != 0);
37   assert(ks % (1 * sizeof(void*)) == 0);
38   assert(a_offset % sizeof(uint8_t) == 0);
39   assert(a != NULL);
40   assert(w != NULL);
41   assert(c != NULL);
42 
43   kc = round_up_po2(kc, 4 * sizeof(uint8_t));
44   uint8_t* c0 = c;
45 
46   const uint8x8_t va_zero_point = vld1_dup_u8(&params->rndnu_neon.kernel_zero_point[0]);
47 
48   do {
49     // Initialize accumulators with bias. 16 bias values are loaded from the
50     // weight matrix, at the start of the group of 16 columns.
51     uint32x4_t vpacc0x0123 = vld1q_u32(w); w = (const void*) ((const uint32_t*) w + 4);
52     uint32x4_t vpacc0x4567 = vld1q_u32(w); w = (const void*) ((const uint32_t*) w + 4);
53     uint32x4_t vpacc0x89AB = vld1q_u32(w); w = (const void*) ((const uint32_t*) w + 4);
54     uint32x4_t vpacc0xCDEF = vld1q_u32(w); w = (const void*) ((const uint32_t*) w + 4);
55     uint32x2_t vnacc0 = vmov_n_u32(0);
56 
57     size_t p = ks;
58     do {
59       const uint8_t* restrict a0 = a[0];
60       if XNN_UNPREDICTABLE(a0 != zero) {
61         a0 = (const uint8_t*) ((uintptr_t) a0 + a_offset);
62       }
63       a += 1;
64 
65       // Inner accumulation loop along the 16 columns.
66       size_t k = kc;
67       // 2x partial unrolled loop to load 8 bytes at a time.
68       while (k >= 8 * sizeof(uint8_t)) {
69         // Load a 1x8 block of activations.
70         const uint8x8_t va0x01234567 = vld1_u8(a0); a0 += 8;
71 
72         // Load a 8x16 block of weights.
73         const uint8x16_t vb0123x0123 = vld1q_u8(w); w = (const void*) ((const uint8_t*) w + 16);
74         const uint8x16_t vb0123x4567 = vld1q_u8(w); w = (const void*) ((const uint8_t*) w + 16);
75         const uint8x16_t vb0123x89AB = vld1q_u8(w); w = (const void*) ((const uint8_t*) w + 16);
76         const uint8x16_t vb0123xCDEF = vld1q_u8(w); w = (const void*) ((const uint8_t*) w + 16);
77         const uint8x16_t vb4567x0123 = vld1q_u8(w); w = (const void*) ((const uint8_t*) w + 16);
78         const uint8x16_t vb4567x4567 = vld1q_u8(w); w = (const void*) ((const uint8_t*) w + 16);
79         const uint8x16_t vb4567x89AB = vld1q_u8(w); w = (const void*) ((const uint8_t*) w + 16);
80         const uint8x16_t vb4567xCDEF = vld1q_u8(w); w = (const void*) ((const uint8_t*) w + 16);
81 
82         // Multiply-accumulate: 1x8 * 8x16 --> 1x16.
83         vnacc0 = vdot_u32(vnacc0, va_zero_point, va0x01234567);
84         vpacc0x0123 = vdotq_lane_u32(vpacc0x0123, vb0123x0123, va0x01234567, 0);
85         vpacc0x4567 = vdotq_lane_u32(vpacc0x4567, vb0123x4567, va0x01234567, 0);
86         vpacc0x89AB = vdotq_lane_u32(vpacc0x89AB, vb0123x89AB, va0x01234567, 0);
87         vpacc0xCDEF = vdotq_lane_u32(vpacc0xCDEF, vb0123xCDEF, va0x01234567, 0);
88         vpacc0x0123 = vdotq_lane_u32(vpacc0x0123, vb4567x0123, va0x01234567, 1);
89         vpacc0x4567 = vdotq_lane_u32(vpacc0x4567, vb4567x4567, va0x01234567, 1);
90         vpacc0x89AB = vdotq_lane_u32(vpacc0x89AB, vb4567x89AB, va0x01234567, 1);
91         vpacc0xCDEF = vdotq_lane_u32(vpacc0xCDEF, vb4567xCDEF, va0x01234567, 1);
92 
93         k -= 8 * sizeof(uint8_t);
94       }
95       // Handle up to 4 final positions of `k`
96       if XNN_UNLIKELY(k != 0) {
97         // Load a 1x4 block of activations.
98         const uint8x8_t va0x01234567 = vreinterpret_u8_u32(vld1_lane_u32((const void*) a0, vmov_n_u32(0), 0)); a0 += 4;
99 
100         // Load a 4x16 block of weights.
101         const uint8x16_t vb0123x0123 = vld1q_u8(w); w = (const void*) ((const uint8_t*) w + 16);
102         const uint8x16_t vb0123x4567 = vld1q_u8(w); w = (const void*) ((const uint8_t*) w + 16);
103         const uint8x16_t vb0123x89AB = vld1q_u8(w); w = (const void*) ((const uint8_t*) w + 16);
104         const uint8x16_t vb0123xCDEF = vld1q_u8(w); w = (const void*) ((const uint8_t*) w + 16);
105 
106         // Multiply-accumulate: 1x4 * 4x16 --> 1x16.
107         vnacc0 = vdot_u32(vnacc0, va_zero_point, va0x01234567);
108         vpacc0x0123 = vdotq_lane_u32(vpacc0x0123, vb0123x0123, va0x01234567, 0);
109         vpacc0x4567 = vdotq_lane_u32(vpacc0x4567, vb0123x4567, va0x01234567, 0);
110         vpacc0x89AB = vdotq_lane_u32(vpacc0x89AB, vb0123x89AB, va0x01234567, 0);
111         vpacc0xCDEF = vdotq_lane_u32(vpacc0xCDEF, vb0123xCDEF, va0x01234567, 0);
112       }
113       p -= 1 * sizeof(void*);
114     } while (p != 0);
115 
116     // Subtract zero point from accumulators.
117     vnacc0 = vpadd_u32(vnacc0, vnacc0);
118     const uint32x4_t vnacc0x0123 = vcombine_u32(vnacc0, vnacc0);
119     int32x4_t vacc0x0123 = vreinterpretq_s32_u32(vsubq_u32(vpacc0x0123, vnacc0x0123));
120     int32x4_t vacc0x4567 = vreinterpretq_s32_u32(vsubq_u32(vpacc0x4567, vnacc0x0123));
121     int32x4_t vacc0x89AB = vreinterpretq_s32_u32(vsubq_u32(vpacc0x89AB, vnacc0x0123));
122     int32x4_t vacc0xCDEF = vreinterpretq_s32_u32(vsubq_u32(vpacc0xCDEF, vnacc0x0123));
123 
124     const int32x4_t vright_pre_shift = vld1q_dup_s32(&params->rndnu_neon.right_pre_shift);
125     const int32x4_t vmultiplier = vld1q_dup_s32(&params->rndnu_neon.multiplier);
126     const int32x4_t vright_post_shift = vld1q_dup_s32(&params->rndnu_neon.right_post_shift);
127 
128     vacc0x0123 = vshlq_s32(vacc0x0123, vright_pre_shift);
129     vacc0x4567 = vshlq_s32(vacc0x4567, vright_pre_shift);
130     vacc0x89AB = vshlq_s32(vacc0x89AB, vright_pre_shift);
131     vacc0xCDEF = vshlq_s32(vacc0xCDEF, vright_pre_shift);
132 
133     vacc0x0123 = vqdmulhq_s32(vacc0x0123, vmultiplier);
134     vacc0x4567 = vqdmulhq_s32(vacc0x4567, vmultiplier);
135     vacc0x89AB = vqdmulhq_s32(vacc0x89AB, vmultiplier);
136     vacc0xCDEF = vqdmulhq_s32(vacc0xCDEF, vmultiplier);
137 
138     vacc0x0123 = vrshlq_s32(vacc0x0123, vright_post_shift);
139     vacc0x4567 = vrshlq_s32(vacc0x4567, vright_post_shift);
140     vacc0x89AB = vrshlq_s32(vacc0x89AB, vright_post_shift);
141     vacc0xCDEF = vrshlq_s32(vacc0xCDEF, vright_post_shift);
142 
143     const int16x8_t voutput_zero_point = vld1q_dup_s16(&params->rndnu_neon.output_zero_point);
144 #if XNN_ARCH_ARM64
145     const int16x8_t vacc0x01234567 = vqaddq_s16(vqmovn_high_s32(vqmovn_s32(vacc0x0123), vacc0x4567), voutput_zero_point);
146     const int16x8_t vacc0x89ABCDEF = vqaddq_s16(vqmovn_high_s32(vqmovn_s32(vacc0x89AB), vacc0xCDEF), voutput_zero_point);
147 
148     uint8x16_t vout0x0123456789ABCDEF = vqmovun_high_s16(vqmovun_s16(vacc0x01234567), vacc0x89ABCDEF);
149 #else
150     const int16x8_t vacc0x01234567 = vqaddq_s16(vcombine_s16(vqmovn_s32(vacc0x0123), vqmovn_s32(vacc0x4567)), voutput_zero_point);
151     const int16x8_t vacc0x89ABCDEF = vqaddq_s16(vcombine_s16(vqmovn_s32(vacc0x89AB), vqmovn_s32(vacc0xCDEF)), voutput_zero_point);
152 
153     uint8x16_t vout0x0123456789ABCDEF = vcombine_u8(vqmovun_s16(vacc0x01234567), vqmovun_s16(vacc0x89ABCDEF));
154 #endif
155     const uint8x16_t voutput_min = vld1q_dup_u8(&params->rndnu_neon.output_min);
156     const uint8x16_t voutput_max = vld1q_dup_u8(&params->rndnu_neon.output_max);
157 
158     vout0x0123456789ABCDEF = vmaxq_u8(vout0x0123456789ABCDEF, voutput_min);
159 
160     vout0x0123456789ABCDEF = vminq_u8(vout0x0123456789ABCDEF, voutput_max);
161 
162     if (nc >= 16) {
163       vst1q_u8(c0 + 0, vout0x0123456789ABCDEF);
164 
165       c0 = (uint8_t*) ((uintptr_t) c0 + cn_stride);
166 
167       a = (const uint8_t**restrict) ((uintptr_t) a - ks);
168 
169       nc -= 16;
170     } else {
171       uint8x8_t vout0x01234567 = vget_low_u8(vout0x0123456789ABCDEF);
172       if (nc & 8) {
173         vst1_u8(c0, vout0x01234567); c0 += 8;  // This line
174         vout0x01234567 = vget_high_u8(vout0x0123456789ABCDEF);
175       }
176       if (nc & 4) {
177         vst1_lane_u32((void*) c0, vreinterpret_u32_u8(vout0x01234567), 0); c0 += 4;
178         vout0x01234567 = vext_u8(vout0x01234567, vout0x01234567, 4);
179       }
180       if (nc & 2) {
181         vst1_lane_u16((void*) c0, vreinterpret_u16_u8(vout0x01234567), 0); c0 += 2;
182         vout0x01234567 = vext_u8(vout0x01234567, vout0x01234567, 2);
183       }
184       if (nc & 1) {
185         vst1_lane_u8(c0, vout0x01234567, 0);
186       }
187 
188       nc = 0;
189     }
190   } while (nc != 0);
191 }
192