xref: /aosp_15_r20/external/XNNPACK/src/qu8-igemm/gen/1x16c4-minmax-fp32-neondot.c (revision 4bdc94577ba0e567308109d787f7fec7b531ce36)
1 // Auto-generated file. Do not edit!
2 //   Template: src/qu8-igemm/c4-neondot.c.in
3 //   Generator: tools/xngen
4 //
5 // Copyright 2020 Google LLC
6 //
7 // This source code is licensed under the BSD-style license found in the
8 // LICENSE file in the root directory of this source tree.
9 
10 #include <assert.h>
11 
12 #include <arm_neon.h>
13 
14 #include <xnnpack/igemm.h>
15 #include <xnnpack/intrinsics-polyfill.h>
16 #include <xnnpack/math.h>
17 
18 
xnn_qu8_igemm_minmax_fp32_ukernel_1x16c4__neondot(size_t mr,size_t nc,size_t kc,size_t ks,const uint8_t ** restrict a,const void * restrict w,uint8_t * restrict c,size_t cm_stride,size_t cn_stride,size_t a_offset,const uint8_t * zero,const union xnn_qu8_conv_minmax_params params[restrict XNN_MIN_ELEMENTS (1)])19 void xnn_qu8_igemm_minmax_fp32_ukernel_1x16c4__neondot(
20     size_t mr,
21     size_t nc,
22     size_t kc,
23     size_t ks,
24     const uint8_t** restrict a,
25     const void* restrict w,
26     uint8_t* restrict c,
27     size_t cm_stride,
28     size_t cn_stride,
29     size_t a_offset,
30     const uint8_t* zero,
31     const union xnn_qu8_conv_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_OOB_READS
32 {
33   assert(mr != 0);
34   assert(mr <= 1);
35   assert(nc != 0);
36   assert(kc != 0);
37   assert(ks != 0);
38   assert(ks % (1 * sizeof(void*)) == 0);
39   assert(a_offset % sizeof(uint8_t) == 0);
40   assert(a != NULL);
41   assert(w != NULL);
42   assert(c != NULL);
43 
44   kc = round_up_po2(kc, 4 * sizeof(uint8_t));
45   uint8_t* c0 = c;
46 
47   const uint8x8_t va_zero_point = vld1_dup_u8(&params->fp32_neonv8.kernel_zero_point[0]);
48 
49   do {
50     // Initialize accumulators with bias. 16 bias values are loaded from the
51     // weight matrix, at the start of the group of 16 columns.
52     uint32x4_t vpacc0x0123 = vld1q_u32(w); w = (const void*) ((const uint32_t*) w + 4);
53     uint32x4_t vpacc0x4567 = vld1q_u32(w); w = (const void*) ((const uint32_t*) w + 4);
54     uint32x4_t vpacc0x89AB = vld1q_u32(w); w = (const void*) ((const uint32_t*) w + 4);
55     uint32x4_t vpacc0xCDEF = vld1q_u32(w); w = (const void*) ((const uint32_t*) w + 4);
56     uint32x2_t vnacc0 = vmov_n_u32(0);
57 
58     size_t p = ks;
59     do {
60       const uint8_t* restrict a0 = a[0];
61       if XNN_UNPREDICTABLE(a0 != zero) {
62         a0 = (const uint8_t*) ((uintptr_t) a0 + a_offset);
63       }
64       a += 1;
65 
66       // Inner accumulation loop along the 16 columns.
67       size_t k = kc;
68       // 2x partial unrolled loop to load 8 bytes at a time.
69       while (k >= 8 * sizeof(uint8_t)) {
70         // Load a 1x8 block of activations.
71         const uint8x8_t va0x01234567 = vld1_u8(a0); a0 += 8;
72 
73         // Load a 8x16 block of weights.
74         const uint8x16_t vb0123x0123 = vld1q_u8(w); w = (const void*) ((const uint8_t*) w + 16);
75         const uint8x16_t vb0123x4567 = vld1q_u8(w); w = (const void*) ((const uint8_t*) w + 16);
76         const uint8x16_t vb0123x89AB = vld1q_u8(w); w = (const void*) ((const uint8_t*) w + 16);
77         const uint8x16_t vb0123xCDEF = vld1q_u8(w); w = (const void*) ((const uint8_t*) w + 16);
78         const uint8x16_t vb4567x0123 = vld1q_u8(w); w = (const void*) ((const uint8_t*) w + 16);
79         const uint8x16_t vb4567x4567 = vld1q_u8(w); w = (const void*) ((const uint8_t*) w + 16);
80         const uint8x16_t vb4567x89AB = vld1q_u8(w); w = (const void*) ((const uint8_t*) w + 16);
81         const uint8x16_t vb4567xCDEF = vld1q_u8(w); w = (const void*) ((const uint8_t*) w + 16);
82 
83         // Multiply-accumulate: 1x8 * 8x16 --> 1x16.
84         vnacc0 = vdot_u32(vnacc0, va_zero_point, va0x01234567);
85         vpacc0x0123 = vdotq_lane_u32(vpacc0x0123, vb0123x0123, va0x01234567, 0);
86         vpacc0x4567 = vdotq_lane_u32(vpacc0x4567, vb0123x4567, va0x01234567, 0);
87         vpacc0x89AB = vdotq_lane_u32(vpacc0x89AB, vb0123x89AB, va0x01234567, 0);
88         vpacc0xCDEF = vdotq_lane_u32(vpacc0xCDEF, vb0123xCDEF, va0x01234567, 0);
89         vpacc0x0123 = vdotq_lane_u32(vpacc0x0123, vb4567x0123, va0x01234567, 1);
90         vpacc0x4567 = vdotq_lane_u32(vpacc0x4567, vb4567x4567, va0x01234567, 1);
91         vpacc0x89AB = vdotq_lane_u32(vpacc0x89AB, vb4567x89AB, va0x01234567, 1);
92         vpacc0xCDEF = vdotq_lane_u32(vpacc0xCDEF, vb4567xCDEF, va0x01234567, 1);
93 
94         k -= 8 * sizeof(uint8_t);
95       }
96       // Handle up to 4 final positions of `k`
97       if XNN_UNLIKELY(k != 0) {
98         // Load a 1x4 block of activations.
99         const uint8x8_t va0x01234567 = vreinterpret_u8_u32(vld1_lane_u32((const void*) a0, vmov_n_u32(0), 0)); a0 += 4;
100 
101         // Load a 4x16 block of weights.
102         const uint8x16_t vb0123x0123 = vld1q_u8(w); w = (const void*) ((const uint8_t*) w + 16);
103         const uint8x16_t vb0123x4567 = vld1q_u8(w); w = (const void*) ((const uint8_t*) w + 16);
104         const uint8x16_t vb0123x89AB = vld1q_u8(w); w = (const void*) ((const uint8_t*) w + 16);
105         const uint8x16_t vb0123xCDEF = vld1q_u8(w); w = (const void*) ((const uint8_t*) w + 16);
106 
107         // Multiply-accumulate: 1x4 * 4x16 --> 1x16.
108         vnacc0 = vdot_u32(vnacc0, va_zero_point, va0x01234567);
109         vpacc0x0123 = vdotq_lane_u32(vpacc0x0123, vb0123x0123, va0x01234567, 0);
110         vpacc0x4567 = vdotq_lane_u32(vpacc0x4567, vb0123x4567, va0x01234567, 0);
111         vpacc0x89AB = vdotq_lane_u32(vpacc0x89AB, vb0123x89AB, va0x01234567, 0);
112         vpacc0xCDEF = vdotq_lane_u32(vpacc0xCDEF, vb0123xCDEF, va0x01234567, 0);
113       }
114       p -= 1 * sizeof(void*);
115     } while (p != 0);
116 
117     // Subtract zero point from accumulators.
118     vnacc0 = vpadd_u32(vnacc0, vnacc0);
119     const uint32x4_t vnacc0x0123 = vcombine_u32(vnacc0, vnacc0);
120     int32x4_t vacc0x0123 = vreinterpretq_s32_u32(vsubq_u32(vpacc0x0123, vnacc0x0123));
121     int32x4_t vacc0x4567 = vreinterpretq_s32_u32(vsubq_u32(vpacc0x4567, vnacc0x0123));
122     int32x4_t vacc0x89AB = vreinterpretq_s32_u32(vsubq_u32(vpacc0x89AB, vnacc0x0123));
123     int32x4_t vacc0xCDEF = vreinterpretq_s32_u32(vsubq_u32(vpacc0xCDEF, vnacc0x0123));
124 
125     float32x4_t vfpacc0x0123 = vcvtq_f32_s32(vacc0x0123);
126     float32x4_t vfpacc0x4567 = vcvtq_f32_s32(vacc0x4567);
127     float32x4_t vfpacc0x89AB = vcvtq_f32_s32(vacc0x89AB);
128     float32x4_t vfpacc0xCDEF = vcvtq_f32_s32(vacc0xCDEF);
129 
130     const float32x4_t vscale = vld1q_dup_f32(&params->fp32_neonv8.scale);
131     vfpacc0x0123 = vmulq_f32(vfpacc0x0123, vscale);
132     vfpacc0x4567 = vmulq_f32(vfpacc0x4567, vscale);
133     vfpacc0x89AB = vmulq_f32(vfpacc0x89AB, vscale);
134     vfpacc0xCDEF = vmulq_f32(vfpacc0xCDEF, vscale);
135 
136     vacc0x0123 = vcvtnq_s32_f32(vfpacc0x0123);
137     vacc0x4567 = vcvtnq_s32_f32(vfpacc0x4567);
138     vacc0x89AB = vcvtnq_s32_f32(vfpacc0x89AB);
139     vacc0xCDEF = vcvtnq_s32_f32(vfpacc0xCDEF);
140 
141     const int16x8_t voutput_zero_point = vld1q_dup_s16(&params->fp32_neonv8.output_zero_point);
142 #if XNN_ARCH_ARM64
143     const int16x8_t vacc0x01234567 = vqaddq_s16(vqmovn_high_s32(vqmovn_s32(vacc0x0123), vacc0x4567), voutput_zero_point);
144     const int16x8_t vacc0x89ABCDEF = vqaddq_s16(vqmovn_high_s32(vqmovn_s32(vacc0x89AB), vacc0xCDEF), voutput_zero_point);
145 
146     uint8x16_t vout0x0123456789ABCDEF = vqmovun_high_s16(vqmovun_s16(vacc0x01234567), vacc0x89ABCDEF);
147 #else
148     const int16x8_t vacc0x01234567 = vqaddq_s16(vcombine_s16(vqmovn_s32(vacc0x0123), vqmovn_s32(vacc0x4567)), voutput_zero_point);
149     const int16x8_t vacc0x89ABCDEF = vqaddq_s16(vcombine_s16(vqmovn_s32(vacc0x89AB), vqmovn_s32(vacc0xCDEF)), voutput_zero_point);
150 
151     uint8x16_t vout0x0123456789ABCDEF = vcombine_u8(vqmovun_s16(vacc0x01234567), vqmovun_s16(vacc0x89ABCDEF));
152 #endif
153     const uint8x16_t voutput_min = vld1q_dup_u8(&params->fp32_neonv8.output_min);
154     const uint8x16_t voutput_max = vld1q_dup_u8(&params->fp32_neonv8.output_max);
155 
156     vout0x0123456789ABCDEF = vmaxq_u8(vout0x0123456789ABCDEF, voutput_min);
157 
158     vout0x0123456789ABCDEF = vminq_u8(vout0x0123456789ABCDEF, voutput_max);
159 
160     if (nc >= 16) {
161       vst1q_u8(c0 + 0, vout0x0123456789ABCDEF);
162 
163       c0 = (uint8_t*) ((uintptr_t) c0 + cn_stride);
164 
165       a = (const uint8_t**restrict) ((uintptr_t) a - ks);
166 
167       nc -= 16;
168     } else {
169       uint8x8_t vout0x01234567 = vget_low_u8(vout0x0123456789ABCDEF);
170       if (nc & 8) {
171         vst1_u8(c0, vout0x01234567); c0 += 8;  // This line
172         vout0x01234567 = vget_high_u8(vout0x0123456789ABCDEF);
173       }
174       if (nc & 4) {
175         vst1_lane_u32((void*) c0, vreinterpret_u32_u8(vout0x01234567), 0); c0 += 4;
176         vout0x01234567 = vext_u8(vout0x01234567, vout0x01234567, 4);
177       }
178       if (nc & 2) {
179         vst1_lane_u16((void*) c0, vreinterpret_u16_u8(vout0x01234567), 0); c0 += 2;
180         vout0x01234567 = vext_u8(vout0x01234567, vout0x01234567, 2);
181       }
182       if (nc & 1) {
183         vst1_lane_u8(c0, vout0x01234567, 0);
184       }
185 
186       nc = 0;
187     }
188   } while (nc != 0);
189 }
190