xref: /aosp_15_r20/external/XNNPACK/src/qu8-gemm/gen/2x8c4-minmax-rndnu-neondot.c (revision 4bdc94577ba0e567308109d787f7fec7b531ce36)
1 // Auto-generated file. Do not edit!
2 //   Template: src/qu8-gemm/c4-neondot.c.in
3 //   Generator: tools/xngen
4 //
5 // Copyright 2020 Google LLC
6 //
7 // This source code is licensed under the BSD-style license found in the
8 // LICENSE file in the root directory of this source tree.
9 
10 #include <assert.h>
11 
12 #include <arm_neon.h>
13 
14 #include <xnnpack/gemm.h>
15 #include <xnnpack/math.h>
16 
17 
xnn_qu8_gemm_minmax_rndnu_ukernel_2x8c4__neondot(size_t mr,size_t nc,size_t kc,const uint8_t * restrict a,size_t a_stride,const void * restrict w,uint8_t * restrict c,size_t cm_stride,size_t cn_stride,const union xnn_qu8_conv_minmax_params params[restrict XNN_MIN_ELEMENTS (1)])18 void xnn_qu8_gemm_minmax_rndnu_ukernel_2x8c4__neondot(
19     size_t mr,
20     size_t nc,
21     size_t kc,
22     const uint8_t* restrict a,
23     size_t a_stride,
24     const void* restrict w,
25     uint8_t* restrict c,
26     size_t cm_stride,
27     size_t cn_stride,
28     const union xnn_qu8_conv_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_OOB_READS
29 {
30   assert(mr != 0);
31   assert(mr <= 2);
32   assert(nc != 0);
33   assert(kc != 0);
34   assert(kc % sizeof(uint8_t) == 0);
35   assert(a != NULL);
36   assert(w != NULL);
37   assert(c != NULL);
38 
39   kc = round_up_po2(kc, 4 * sizeof(uint8_t));
40   const uint8_t* a0 = a;
41   uint8_t* c0 = c;
42   const uint8_t* a1 = (const uint8_t*) ((uintptr_t) a0 + a_stride);
43   uint8_t* c1 = (uint8_t*) ((uintptr_t) c0 + cm_stride);
44   if XNN_UNPREDICTABLE(mr != 2) {
45     a1 = a0;
46     c1 = c0;
47   }
48 
49   const uint8x8_t va_zero_point = vld1_dup_u8(&params->rndnu_neon.kernel_zero_point[0]);
50 
51   // Loop over groups of 8 columns.
52   do {
53     // Initialize accumulators with bias. 8 bias values are loaded from the
54     // weight matrix, at the start of the group of 8 columns.
55     uint32x4_t vpacc0x0123 = vld1q_u32(w); w = (const void*) ((const uint32_t*) w + 4);
56     uint32x4_t vpacc0x4567 = vld1q_u32(w); w = (const void*) ((const uint32_t*) w + 4);
57     uint32x4_t vpacc1x0123 = vpacc0x0123;
58     uint32x4_t vpacc1x4567 = vpacc0x4567;
59     uint32x2_t vnacc0 = vmov_n_u32(0);
60     uint32x2_t vnacc1 = vmov_n_u32(0);
61 
62     // Inner accumulation loop along the 8 columns.
63     size_t k = kc;
64     // 2x partial unrolled loop to load 8 bytes at a time.
65     while (k >= 8 * sizeof(uint8_t)) {
66       // Load a 2x8 block of activations.
67       const uint8x8_t va0x01234567 = vld1_u8(a0); a0 += 8;
68       const uint8x8_t va1x01234567 = vld1_u8(a1); a1 += 8;
69 
70       // Load a 8x8 block of weights.
71       const uint8x16_t vb0123x0123 = vld1q_u8(w); w = (const void*) ((const uint8_t*) w + 16);
72       const uint8x16_t vb0123x4567 = vld1q_u8(w); w = (const void*) ((const uint8_t*) w + 16);
73       const uint8x16_t vb4567x0123 = vld1q_u8(w); w = (const void*) ((const uint8_t*) w + 16);
74       const uint8x16_t vb4567x4567 = vld1q_u8(w); w = (const void*) ((const uint8_t*) w + 16);
75 
76       // Multiply-accumulate: 2x8 * 8x8 --> 2x8.
77       vnacc0 = vdot_u32(vnacc0, va_zero_point, va0x01234567);
78       vpacc0x0123 = vdotq_lane_u32(vpacc0x0123, vb0123x0123, va0x01234567, 0);
79       vpacc0x4567 = vdotq_lane_u32(vpacc0x4567, vb0123x4567, va0x01234567, 0);
80       vpacc0x0123 = vdotq_lane_u32(vpacc0x0123, vb4567x0123, va0x01234567, 1);
81       vpacc0x4567 = vdotq_lane_u32(vpacc0x4567, vb4567x4567, va0x01234567, 1);
82       vnacc1 = vdot_u32(vnacc1, va_zero_point, va1x01234567);
83       vpacc1x0123 = vdotq_lane_u32(vpacc1x0123, vb0123x0123, va1x01234567, 0);
84       vpacc1x4567 = vdotq_lane_u32(vpacc1x4567, vb0123x4567, va1x01234567, 0);
85       vpacc1x0123 = vdotq_lane_u32(vpacc1x0123, vb4567x0123, va1x01234567, 1);
86       vpacc1x4567 = vdotq_lane_u32(vpacc1x4567, vb4567x4567, va1x01234567, 1);
87 
88       k -= 8 * sizeof(uint8_t);
89     }
90     // Handle up to 4 final positions of `k`
91     if XNN_UNLIKELY(k != 0) {
92       // Load a 2x4 block of activations.
93       const uint8x8_t va0x01234567 = vreinterpret_u8_u32(vld1_lane_u32((const void*) a0, vmov_n_u32(0), 0)); a0 += 4;
94       const uint8x8_t va1x01234567 = vreinterpret_u8_u32(vld1_lane_u32((const void*) a1, vmov_n_u32(0), 0)); a1 += 4;
95 
96       // Load a 4x8 block of weights.
97       const uint8x16_t vb0123x0123 = vld1q_u8(w); w = (const void*) ((const uint8_t*) w + 16);
98       const uint8x16_t vb0123x4567 = vld1q_u8(w); w = (const void*) ((const uint8_t*) w + 16);
99 
100       // Multiply-accumulate: 2x4 * 4x8 --> 2x8.
101       vnacc0 = vdot_u32(vnacc0, va_zero_point, va0x01234567);
102       vpacc0x0123 = vdotq_lane_u32(vpacc0x0123, vb0123x0123, va0x01234567, 0);
103       vpacc0x4567 = vdotq_lane_u32(vpacc0x4567, vb0123x4567, va0x01234567, 0);
104       vnacc1 = vdot_u32(vnacc1, va_zero_point, va1x01234567);
105       vpacc1x0123 = vdotq_lane_u32(vpacc1x0123, vb0123x0123, va1x01234567, 0);
106       vpacc1x4567 = vdotq_lane_u32(vpacc1x4567, vb0123x4567, va1x01234567, 0);
107     }
108 
109     // Subtract zero point from accumulators.
110     vnacc0 = vpadd_u32(vnacc0, vnacc0);
111     const uint32x4_t vnacc0x0123 = vcombine_u32(vnacc0, vnacc0);
112     int32x4_t vacc0x0123 = vreinterpretq_s32_u32(vsubq_u32(vpacc0x0123, vnacc0x0123));
113     int32x4_t vacc0x4567 = vreinterpretq_s32_u32(vsubq_u32(vpacc0x4567, vnacc0x0123));
114     vnacc1 = vpadd_u32(vnacc1, vnacc1);
115     const uint32x4_t vnacc1x0123 = vcombine_u32(vnacc1, vnacc1);
116     int32x4_t vacc1x0123 = vreinterpretq_s32_u32(vsubq_u32(vpacc1x0123, vnacc1x0123));
117     int32x4_t vacc1x4567 = vreinterpretq_s32_u32(vsubq_u32(vpacc1x4567, vnacc1x0123));
118 
119     const int32x4_t vright_pre_shift = vld1q_dup_s32(&params->rndnu_neon.right_pre_shift);
120     const int32x4_t vmultiplier = vld1q_dup_s32(&params->rndnu_neon.multiplier);
121     const int32x4_t vright_post_shift = vld1q_dup_s32(&params->rndnu_neon.right_post_shift);
122 
123     vacc0x0123 = vshlq_s32(vacc0x0123, vright_pre_shift);
124     vacc0x4567 = vshlq_s32(vacc0x4567, vright_pre_shift);
125     vacc1x0123 = vshlq_s32(vacc1x0123, vright_pre_shift);
126     vacc1x4567 = vshlq_s32(vacc1x4567, vright_pre_shift);
127 
128     vacc0x0123 = vqdmulhq_s32(vacc0x0123, vmultiplier);
129     vacc0x4567 = vqdmulhq_s32(vacc0x4567, vmultiplier);
130     vacc1x0123 = vqdmulhq_s32(vacc1x0123, vmultiplier);
131     vacc1x4567 = vqdmulhq_s32(vacc1x4567, vmultiplier);
132 
133     vacc0x0123 = vrshlq_s32(vacc0x0123, vright_post_shift);
134     vacc0x4567 = vrshlq_s32(vacc0x4567, vright_post_shift);
135     vacc1x0123 = vrshlq_s32(vacc1x0123, vright_post_shift);
136     vacc1x4567 = vrshlq_s32(vacc1x4567, vright_post_shift);
137 
138     const int16x8_t voutput_zero_point = vld1q_dup_s16(&params->rndnu_neon.output_zero_point);
139 #if XNN_ARCH_ARM64
140     const int16x8_t vacc0x01234567 = vqaddq_s16(vqmovn_high_s32(vqmovn_s32(vacc0x0123), vacc0x4567), voutput_zero_point);
141     const int16x8_t vacc1x01234567 = vqaddq_s16(vqmovn_high_s32(vqmovn_s32(vacc1x0123), vacc1x4567), voutput_zero_point);
142 
143     uint8x16_t vout0x01234567_1x01234567 = vqmovun_high_s16(vqmovun_s16(vacc0x01234567), vacc1x01234567);
144 #else
145     const int16x8_t vacc0x01234567 = vqaddq_s16(vcombine_s16(vqmovn_s32(vacc0x0123), vqmovn_s32(vacc0x4567)), voutput_zero_point);
146     const int16x8_t vacc1x01234567 = vqaddq_s16(vcombine_s16(vqmovn_s32(vacc1x0123), vqmovn_s32(vacc1x4567)), voutput_zero_point);
147 
148     uint8x16_t vout0x01234567_1x01234567 = vcombine_u8(vqmovun_s16(vacc0x01234567), vqmovun_s16(vacc1x01234567));
149 #endif
150     const uint8x16_t voutput_min = vld1q_dup_u8(&params->rndnu_neon.output_min);
151     const uint8x16_t voutput_max = vld1q_dup_u8(&params->rndnu_neon.output_max);
152 
153     vout0x01234567_1x01234567 = vmaxq_u8(vout0x01234567_1x01234567, voutput_min);
154 
155     vout0x01234567_1x01234567 = vminq_u8(vout0x01234567_1x01234567, voutput_max);
156 
157     if (nc >= 8) {
158       vst1_u8(c0 + 0, vget_low_u8(vout0x01234567_1x01234567));
159       vst1_u8(c1 + 0, vget_high_u8(vout0x01234567_1x01234567));
160 
161       c0 = (uint8_t*) ((uintptr_t) c0 + cn_stride);
162       c1 = (uint8_t*) ((uintptr_t) c1 + cn_stride);
163 
164       a0 = (const uint8_t*) ((uintptr_t) a0 - kc);
165       a1 = (const uint8_t*) ((uintptr_t) a1 - kc);
166 
167       nc -= 8;
168     } else {
169       if (nc & 4) {
170         vst1q_lane_u32((void*) c0, vreinterpretq_u32_u8(vout0x01234567_1x01234567), 0); c0 += 4;
171         vst1q_lane_u32((void*) c1, vreinterpretq_u32_u8(vout0x01234567_1x01234567), 2); c1 += 4;
172         vout0x01234567_1x01234567 = vextq_u8(vout0x01234567_1x01234567, vout0x01234567_1x01234567, 4);
173       }
174       if (nc & 2) {
175         vst1q_lane_u16((void*) c0, vreinterpretq_u16_u8(vout0x01234567_1x01234567), 0); c0 += 2;
176         vst1q_lane_u16((void*) c1, vreinterpretq_u16_u8(vout0x01234567_1x01234567), 4); c1 += 2;
177         vout0x01234567_1x01234567 = vextq_u8(vout0x01234567_1x01234567, vout0x01234567_1x01234567, 2);
178       }
179       if (nc & 1) {
180         vst1q_lane_u8(c0, vout0x01234567_1x01234567, 0);
181         vst1q_lane_u8(c1, vout0x01234567_1x01234567, 8);
182       }
183 
184       nc = 0;
185     }
186   } while (nc != 0);
187 }
188