1 // Auto-generated file. Do not edit!
2 // Template: src/qu8-gemm/c4-neondot.c.in
3 // Generator: tools/xngen
4 //
5 // Copyright 2020 Google LLC
6 //
7 // This source code is licensed under the BSD-style license found in the
8 // LICENSE file in the root directory of this source tree.
9
10 #include <assert.h>
11
12 #include <arm_neon.h>
13
14 #include <xnnpack/gemm.h>
15 #include <xnnpack/math.h>
16
17
xnn_qu8_gemm_minmax_rndnu_ukernel_1x8c4__neondot(size_t mr,size_t nc,size_t kc,const uint8_t * restrict a,size_t a_stride,const void * restrict w,uint8_t * restrict c,size_t cm_stride,size_t cn_stride,const union xnn_qu8_conv_minmax_params params[restrict XNN_MIN_ELEMENTS (1)])18 void xnn_qu8_gemm_minmax_rndnu_ukernel_1x8c4__neondot(
19 size_t mr,
20 size_t nc,
21 size_t kc,
22 const uint8_t* restrict a,
23 size_t a_stride,
24 const void* restrict w,
25 uint8_t* restrict c,
26 size_t cm_stride,
27 size_t cn_stride,
28 const union xnn_qu8_conv_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_OOB_READS
29 {
30 assert(mr != 0);
31 assert(mr <= 1);
32 assert(nc != 0);
33 assert(kc != 0);
34 assert(kc % sizeof(uint8_t) == 0);
35 assert(a != NULL);
36 assert(w != NULL);
37 assert(c != NULL);
38
39 kc = round_up_po2(kc, 4 * sizeof(uint8_t));
40 const uint8_t* a0 = a;
41 uint8_t* c0 = c;
42
43 const uint8x8_t va_zero_point = vld1_dup_u8(¶ms->rndnu_neon.kernel_zero_point[0]);
44
45 // Loop over groups of 8 columns.
46 do {
47 // Initialize accumulators with bias. 8 bias values are loaded from the
48 // weight matrix, at the start of the group of 8 columns.
49 uint32x4_t vpacc0x0123 = vld1q_u32(w); w = (const void*) ((const uint32_t*) w + 4);
50 uint32x4_t vpacc0x4567 = vld1q_u32(w); w = (const void*) ((const uint32_t*) w + 4);
51 uint32x2_t vnacc0 = vmov_n_u32(0);
52
53 // Inner accumulation loop along the 8 columns.
54 size_t k = kc;
55 // 2x partial unrolled loop to load 8 bytes at a time.
56 while (k >= 8 * sizeof(uint8_t)) {
57 // Load a 1x8 block of activations.
58 const uint8x8_t va0x01234567 = vld1_u8(a0); a0 += 8;
59
60 // Load a 8x8 block of weights.
61 const uint8x16_t vb0123x0123 = vld1q_u8(w); w = (const void*) ((const uint8_t*) w + 16);
62 const uint8x16_t vb0123x4567 = vld1q_u8(w); w = (const void*) ((const uint8_t*) w + 16);
63 const uint8x16_t vb4567x0123 = vld1q_u8(w); w = (const void*) ((const uint8_t*) w + 16);
64 const uint8x16_t vb4567x4567 = vld1q_u8(w); w = (const void*) ((const uint8_t*) w + 16);
65
66 // Multiply-accumulate: 1x8 * 8x8 --> 1x8.
67 vnacc0 = vdot_u32(vnacc0, va_zero_point, va0x01234567);
68 vpacc0x0123 = vdotq_lane_u32(vpacc0x0123, vb0123x0123, va0x01234567, 0);
69 vpacc0x4567 = vdotq_lane_u32(vpacc0x4567, vb0123x4567, va0x01234567, 0);
70 vpacc0x0123 = vdotq_lane_u32(vpacc0x0123, vb4567x0123, va0x01234567, 1);
71 vpacc0x4567 = vdotq_lane_u32(vpacc0x4567, vb4567x4567, va0x01234567, 1);
72
73 k -= 8 * sizeof(uint8_t);
74 }
75 // Handle up to 4 final positions of `k`
76 if XNN_UNLIKELY(k != 0) {
77 // Load a 1x4 block of activations.
78 const uint8x8_t va0x01234567 = vreinterpret_u8_u32(vld1_lane_u32((const void*) a0, vmov_n_u32(0), 0)); a0 += 4;
79
80 // Load a 4x8 block of weights.
81 const uint8x16_t vb0123x0123 = vld1q_u8(w); w = (const void*) ((const uint8_t*) w + 16);
82 const uint8x16_t vb0123x4567 = vld1q_u8(w); w = (const void*) ((const uint8_t*) w + 16);
83
84 // Multiply-accumulate: 1x4 * 4x8 --> 1x8.
85 vnacc0 = vdot_u32(vnacc0, va_zero_point, va0x01234567);
86 vpacc0x0123 = vdotq_lane_u32(vpacc0x0123, vb0123x0123, va0x01234567, 0);
87 vpacc0x4567 = vdotq_lane_u32(vpacc0x4567, vb0123x4567, va0x01234567, 0);
88 }
89
90 // Subtract zero point from accumulators.
91 vnacc0 = vpadd_u32(vnacc0, vnacc0);
92 const uint32x4_t vnacc0x0123 = vcombine_u32(vnacc0, vnacc0);
93 int32x4_t vacc0x0123 = vreinterpretq_s32_u32(vsubq_u32(vpacc0x0123, vnacc0x0123));
94 int32x4_t vacc0x4567 = vreinterpretq_s32_u32(vsubq_u32(vpacc0x4567, vnacc0x0123));
95
96 const int32x4_t vright_pre_shift = vld1q_dup_s32(¶ms->rndnu_neon.right_pre_shift);
97 const int32x4_t vmultiplier = vld1q_dup_s32(¶ms->rndnu_neon.multiplier);
98 const int32x4_t vright_post_shift = vld1q_dup_s32(¶ms->rndnu_neon.right_post_shift);
99
100 vacc0x0123 = vshlq_s32(vacc0x0123, vright_pre_shift);
101 vacc0x4567 = vshlq_s32(vacc0x4567, vright_pre_shift);
102
103 vacc0x0123 = vqdmulhq_s32(vacc0x0123, vmultiplier);
104 vacc0x4567 = vqdmulhq_s32(vacc0x4567, vmultiplier);
105
106 vacc0x0123 = vrshlq_s32(vacc0x0123, vright_post_shift);
107 vacc0x4567 = vrshlq_s32(vacc0x4567, vright_post_shift);
108
109 const int16x8_t voutput_zero_point = vld1q_dup_s16(¶ms->rndnu_neon.output_zero_point);
110 #if XNN_ARCH_ARM64
111 const int16x8_t vacc0x01234567 = vqaddq_s16(vqmovn_high_s32(vqmovn_s32(vacc0x0123), vacc0x4567), voutput_zero_point);
112
113 uint8x8_t vout0x01234567 = vqmovun_s16(vacc0x01234567);
114 #else
115 const int16x8_t vacc0x01234567 = vqaddq_s16(vcombine_s16(vqmovn_s32(vacc0x0123), vqmovn_s32(vacc0x4567)), voutput_zero_point);
116
117 uint8x8_t vout0x01234567 = vqmovun_s16(vacc0x01234567);
118 #endif
119 const uint8x8_t voutput_min = vld1_dup_u8(¶ms->rndnu_neon.output_min);
120 const uint8x8_t voutput_max = vld1_dup_u8(¶ms->rndnu_neon.output_max);
121
122 vout0x01234567 = vmax_u8(vout0x01234567, voutput_min);
123
124 vout0x01234567 = vmin_u8(vout0x01234567, voutput_max);
125
126 if (nc >= 8) {
127 vst1_u8(c0 + 0, vout0x01234567);
128
129 c0 = (uint8_t*) ((uintptr_t) c0 + cn_stride);
130
131 a0 = (const uint8_t*) ((uintptr_t) a0 - kc);
132
133 nc -= 8;
134 } else {
135 if (nc & 4) {
136 vst1_lane_u32((void*) c0, vreinterpret_u32_u8(vout0x01234567), 0); c0 += 4;
137 vout0x01234567 = vext_u8(vout0x01234567, vout0x01234567, 4);
138 }
139 if (nc & 2) {
140 vst1_lane_u16((void*) c0, vreinterpret_u16_u8(vout0x01234567), 0); c0 += 2;
141 vout0x01234567 = vext_u8(vout0x01234567, vout0x01234567, 2);
142 }
143 if (nc & 1) {
144 vst1_lane_u8(c0, vout0x01234567, 0);
145 }
146
147 nc = 0;
148 }
149 } while (nc != 0);
150 }
151