1 // Auto-generated file. Do not edit!
2 // Template: src/qs8-gavgpool/unipass-sse4.c.in
3 // Generator: tools/xngen
4 //
5 // Copyright 2020 Google LLC
6 //
7 // This source code is licensed under the BSD-style license found in the
8 // LICENSE file in the root directory of this source tree.
9
10 #include <assert.h>
11
12 #include <smmintrin.h>
13
14 #include <xnnpack/gavgpool.h>
15 #include <xnnpack/unaligned.h>
16
17
xnn_qu8_gavgpool_minmax_fp32_ukernel_7x__sse41_c8(size_t rows,size_t channels,const uint8_t * input,size_t input_stride,const uint8_t * zero,uint8_t * output,const union xnn_qu8_avgpool_minmax_params params[restrict XNN_MIN_ELEMENTS (1)])18 void xnn_qu8_gavgpool_minmax_fp32_ukernel_7x__sse41_c8(
19 size_t rows,
20 size_t channels,
21 const uint8_t* input,
22 size_t input_stride,
23 const uint8_t* zero,
24 uint8_t* output,
25 const union xnn_qu8_avgpool_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_OOB_READS
26 {
27 assert(rows != 0);
28 assert(rows <= 7);
29 assert(channels != 0);
30
31 const uint8_t* i0 = input;
32 const uint8_t* i1 = (const uint8_t*) ((uintptr_t) i0 + input_stride);
33 if XNN_UNPREDICTABLE(rows < 2) {
34 i1 = zero;
35 }
36 const uint8_t* i2 = (const uint8_t*) ((uintptr_t) i1 + input_stride);
37 if XNN_UNPREDICTABLE(rows <= 2) {
38 i2 = zero;
39 }
40 const uint8_t* i3 = (const uint8_t*) ((uintptr_t) i2 + input_stride);
41 if XNN_UNPREDICTABLE(rows < 4) {
42 i3 = zero;
43 }
44 const uint8_t* i4 = (const uint8_t*) ((uintptr_t) i3 + input_stride);
45 if XNN_UNPREDICTABLE(rows <= 4) {
46 i4 = zero;
47 }
48 const uint8_t* i5 = (const uint8_t*) ((uintptr_t) i4 + input_stride);
49 if XNN_UNPREDICTABLE(rows < 6) {
50 i5 = zero;
51 }
52 const uint8_t* i6 = (const uint8_t*) ((uintptr_t) i5 + input_stride);
53 if XNN_UNPREDICTABLE(rows <= 6) {
54 i6 = zero;
55 }
56
57 const __m128i vinit_bias = _mm_load_si128((const __m128i*) params->fp32_sse4.init_bias);
58 const __m128 vscale = _mm_load_ps(params->fp32_sse4.scale);
59 const __m128 voutput_max_less_zero_point = _mm_load_ps(params->fp32_sse4.output_max_less_zero_point);
60 const __m128i voutput_zero_point = _mm_load_si128((const __m128i*) params->fp32_sse4.output_zero_point);
61 const __m128i voutput_min = _mm_load_si128((const __m128i*) params->fp32_sse4.output_min);
62 for (; channels >= 8; channels -= 8) {
63 const __m128i vxi0x01234567 = _mm_cvtepu8_epi16(_mm_loadl_epi64((const __m128i*) i0));
64 i0 += 8;
65 const __m128i vxi1x01234567 = _mm_cvtepu8_epi16(_mm_loadl_epi64((const __m128i*) i1));
66 i1 += 8;
67
68 __m128i vacc01234567 = _mm_add_epi16(vxi0x01234567, vxi1x01234567);
69 const __m128i vxi2x01234567 = _mm_cvtepu8_epi16(_mm_loadl_epi64((const __m128i*) i2));
70 i2 += 8;
71
72 vacc01234567 = _mm_add_epi16(vacc01234567, vxi2x01234567);
73 const __m128i vxi3x01234567 = _mm_cvtepu8_epi16(_mm_loadl_epi64((const __m128i*) i3));
74 i3 += 8;
75 vacc01234567 = _mm_add_epi16(vacc01234567, vxi3x01234567);
76 const __m128i vxi4x01234567 = _mm_cvtepu8_epi16(_mm_loadl_epi64((const __m128i*) i4));
77 i4 += 8;
78 vacc01234567 = _mm_add_epi16(vacc01234567, vxi4x01234567);
79 const __m128i vxi5x01234567 = _mm_cvtepu8_epi16(_mm_loadl_epi64((const __m128i*) i5));
80 i5 += 8;
81 vacc01234567 = _mm_add_epi16(vacc01234567, vxi5x01234567);
82 const __m128i vxi6x01234567 = _mm_cvtepu8_epi16(_mm_loadl_epi64((const __m128i*) i6));
83 i6 += 8;
84
85 vacc01234567 = _mm_add_epi16(vacc01234567, vxi6x01234567);
86
87 const __m128i vzero = _mm_setzero_si128();
88 __m128i vacc0123 = _mm_cvtepu16_epi32(vacc01234567);
89 __m128i vacc4567 = _mm_unpackhi_epi16(vacc01234567, vzero);
90
91 vacc0123 = _mm_add_epi32(vacc0123, vinit_bias);
92 vacc4567 = _mm_add_epi32(vacc4567, vinit_bias);
93
94 __m128 vfpacc0123 = _mm_cvtepi32_ps(vacc0123);
95 __m128 vfpacc4567 = _mm_cvtepi32_ps(vacc4567);
96
97 vfpacc0123 = _mm_mul_ps(vfpacc0123, vscale);
98 vfpacc4567 = _mm_mul_ps(vfpacc4567, vscale);
99
100 vfpacc0123 = _mm_min_ps(vfpacc0123, voutput_max_less_zero_point);
101 vfpacc4567 = _mm_min_ps(vfpacc4567, voutput_max_less_zero_point);
102
103 vacc0123 = _mm_cvtps_epi32(vfpacc0123);
104 vacc4567 = _mm_cvtps_epi32(vfpacc4567);
105
106 __m128i vout01234567 = _mm_adds_epi16(_mm_packs_epi32(vacc0123, vacc4567), voutput_zero_point);
107
108 __m128i vout0123456701234567 = _mm_packus_epi16(vout01234567, vout01234567);
109
110 vout0123456701234567 = _mm_max_epu8(vout0123456701234567, voutput_min);
111
112 _mm_storel_epi64((__m128i*) output, vout0123456701234567);
113 output += 8;
114 }
115 if XNN_UNLIKELY(channels != 0) {
116 {
117 const __m128i vxi0x01234567 = _mm_cvtepu8_epi16(_mm_loadl_epi64((const __m128i*) i0));
118 i0 += 8;
119 const __m128i vxi1x01234567 = _mm_cvtepu8_epi16(_mm_loadl_epi64((const __m128i*) i1));
120 i1 += 8;
121
122 __m128i vacc01234567 = _mm_add_epi16(vxi0x01234567, vxi1x01234567);
123 const __m128i vxi2x01234567 = _mm_cvtepu8_epi16(_mm_loadl_epi64((const __m128i*) i2));
124 i2 += 8;
125
126 vacc01234567 = _mm_add_epi16(vacc01234567, vxi2x01234567);
127 const __m128i vxi3x01234567 = _mm_cvtepu8_epi16(_mm_loadl_epi64((const __m128i*) i3));
128 i3 += 8;
129 vacc01234567 = _mm_add_epi16(vacc01234567, vxi3x01234567);
130 const __m128i vxi4x01234567 = _mm_cvtepu8_epi16(_mm_loadl_epi64((const __m128i*) i4));
131 i4 += 8;
132 vacc01234567 = _mm_add_epi16(vacc01234567, vxi4x01234567);
133 const __m128i vxi5x01234567 = _mm_cvtepu8_epi16(_mm_loadl_epi64((const __m128i*) i5));
134 i5 += 8;
135 vacc01234567 = _mm_add_epi16(vacc01234567, vxi5x01234567);
136 const __m128i vxi6x01234567 = _mm_cvtepu8_epi16(_mm_loadl_epi64((const __m128i*) i6));
137 i6 += 8;
138
139 vacc01234567 = _mm_add_epi16(vacc01234567, vxi6x01234567);
140
141 __m128i vacc0123 = _mm_cvtepu16_epi32(vacc01234567);
142 __m128i vacc4567 = _mm_unpackhi_epi16(vacc01234567, _mm_setzero_si128());
143
144 vacc0123 = _mm_add_epi32(vacc0123, vinit_bias);
145 vacc4567 = _mm_add_epi32(vacc4567, vinit_bias);
146
147 __m128 vfpacc0123 = _mm_cvtepi32_ps(vacc0123);
148 __m128 vfpacc4567 = _mm_cvtepi32_ps(vacc4567);
149
150 vfpacc0123 = _mm_mul_ps(vfpacc0123, vscale);
151 vfpacc4567 = _mm_mul_ps(vfpacc4567, vscale);
152
153 vfpacc0123 = _mm_min_ps(vfpacc0123, voutput_max_less_zero_point);
154 vfpacc4567 = _mm_min_ps(vfpacc4567, voutput_max_less_zero_point);
155
156 vacc0123 = _mm_cvtps_epi32(vfpacc0123);
157 vacc4567 = _mm_cvtps_epi32(vfpacc4567);
158
159 __m128i vout01234567 = _mm_adds_epi16(_mm_packs_epi32(vacc0123, vacc4567), voutput_zero_point);
160
161 __m128i vout0123456701234567 = _mm_packus_epi16(vout01234567, vout01234567);
162 vout0123456701234567 = _mm_max_epu8(vout0123456701234567, voutput_min);
163
164 if (channels & 4) {
165 unaligned_store_u32(output, (uint32_t) _mm_cvtsi128_si32(vout0123456701234567));
166 vout0123456701234567 = _mm_srli_epi64(vout0123456701234567, 32);
167 output += 4;
168 }
169 if (channels & 2) {
170 unaligned_store_u16(output, (uint16_t) _mm_extract_epi16(vout0123456701234567, 0));
171 vout0123456701234567 = _mm_srli_epi32(vout0123456701234567, 16);
172 output += 2;
173 }
174 if (channels & 1) {
175 *output = (uint8_t) _mm_extract_epi8(vout0123456701234567, 0);
176 }
177 }
178 }
179 }
180