xref: /aosp_15_r20/external/XNNPACK/src/qu8-gavgpool/gen/7x-minmax-fp32-sse41-c24.c (revision 4bdc94577ba0e567308109d787f7fec7b531ce36)
1 // Auto-generated file. Do not edit!
2 //   Template: src/qs8-gavgpool/unipass-sse4.c.in
3 //   Generator: tools/xngen
4 //
5 // Copyright 2020 Google LLC
6 //
7 // This source code is licensed under the BSD-style license found in the
8 // LICENSE file in the root directory of this source tree.
9 
10 #include <assert.h>
11 
12 #include <smmintrin.h>
13 
14 #include <xnnpack/gavgpool.h>
15 #include <xnnpack/unaligned.h>
16 
17 
xnn_qu8_gavgpool_minmax_fp32_ukernel_7x__sse41_c24(size_t rows,size_t channels,const uint8_t * input,size_t input_stride,const uint8_t * zero,uint8_t * output,const union xnn_qu8_avgpool_minmax_params params[restrict XNN_MIN_ELEMENTS (1)])18 void xnn_qu8_gavgpool_minmax_fp32_ukernel_7x__sse41_c24(
19     size_t rows,
20     size_t channels,
21     const uint8_t* input,
22     size_t input_stride,
23     const uint8_t* zero,
24     uint8_t* output,
25     const union xnn_qu8_avgpool_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_OOB_READS
26 {
27   assert(rows != 0);
28   assert(rows <= 7);
29   assert(channels != 0);
30 
31   const uint8_t* i0 = input;
32   const uint8_t* i1 = (const uint8_t*) ((uintptr_t) i0 + input_stride);
33   if XNN_UNPREDICTABLE(rows < 2) {
34     i1 = zero;
35   }
36   const uint8_t* i2 = (const uint8_t*) ((uintptr_t) i1 + input_stride);
37   if XNN_UNPREDICTABLE(rows <= 2) {
38     i2 = zero;
39   }
40   const uint8_t* i3 = (const uint8_t*) ((uintptr_t) i2 + input_stride);
41   if XNN_UNPREDICTABLE(rows < 4) {
42     i3 = zero;
43   }
44   const uint8_t* i4 = (const uint8_t*) ((uintptr_t) i3 + input_stride);
45   if XNN_UNPREDICTABLE(rows <= 4) {
46     i4 = zero;
47   }
48   const uint8_t* i5 = (const uint8_t*) ((uintptr_t) i4 + input_stride);
49   if XNN_UNPREDICTABLE(rows < 6) {
50     i5 = zero;
51   }
52   const uint8_t* i6 = (const uint8_t*) ((uintptr_t) i5 + input_stride);
53   if XNN_UNPREDICTABLE(rows <= 6) {
54     i6 = zero;
55   }
56 
57   const __m128i vinit_bias = _mm_load_si128((const __m128i*) params->fp32_sse4.init_bias);
58   const __m128 vscale = _mm_load_ps(params->fp32_sse4.scale);
59   const __m128 voutput_max_less_zero_point = _mm_load_ps(params->fp32_sse4.output_max_less_zero_point);
60   const __m128i voutput_zero_point = _mm_load_si128((const __m128i*) params->fp32_sse4.output_zero_point);
61   const __m128i voutput_min = _mm_load_si128((const __m128i*) params->fp32_sse4.output_min);
62   for (; channels >= 24; channels -= 24) {
63     const __m128i vxi0x01234567 = _mm_cvtepu8_epi16(_mm_loadl_epi64((const __m128i*) i0));
64     const __m128i vxi0x89ABCDEF = _mm_cvtepu8_epi16(_mm_loadl_epi64((const __m128i*) (i0 + 8)));
65     const __m128i vxi0xGHIJKLMN = _mm_cvtepu8_epi16(_mm_loadl_epi64((const __m128i*) (i0 + 16)));
66     i0 += 24;
67     const __m128i vxi1x01234567 = _mm_cvtepu8_epi16(_mm_loadl_epi64((const __m128i*) i1));
68     const __m128i vxi1x89ABCDEF = _mm_cvtepu8_epi16(_mm_loadl_epi64((const __m128i*) (i1 + 8)));
69     const __m128i vxi1xGHIJKLMN = _mm_cvtepu8_epi16(_mm_loadl_epi64((const __m128i*) (i1 + 16)));
70     i1 += 24;
71 
72     __m128i vacc01234567 = _mm_add_epi16(vxi0x01234567, vxi1x01234567);
73     const __m128i vxi2x01234567 = _mm_cvtepu8_epi16(_mm_loadl_epi64((const __m128i*) i2));
74     __m128i vacc89ABCDEF = _mm_add_epi16(vxi0x89ABCDEF, vxi1x89ABCDEF);
75     const __m128i vxi2x89ABCDEF = _mm_cvtepu8_epi16(_mm_loadl_epi64((const __m128i*) (i2 + 8)));
76     __m128i vaccGHIJKLMN = _mm_add_epi16(vxi0xGHIJKLMN, vxi1xGHIJKLMN);
77     const __m128i vxi2xGHIJKLMN = _mm_cvtepu8_epi16(_mm_loadl_epi64((const __m128i*) (i2 + 16)));
78     i2 += 24;
79 
80     vacc01234567 = _mm_add_epi16(vacc01234567, vxi2x01234567);
81     const __m128i vxi3x01234567 = _mm_cvtepu8_epi16(_mm_loadl_epi64((const __m128i*) i3));
82     vacc89ABCDEF = _mm_add_epi16(vacc89ABCDEF, vxi2x89ABCDEF);
83     const __m128i vxi3x89ABCDEF = _mm_cvtepu8_epi16(_mm_loadl_epi64((const __m128i*) (i3 + 8)));
84     vaccGHIJKLMN = _mm_add_epi16(vaccGHIJKLMN, vxi2xGHIJKLMN);
85     const __m128i vxi3xGHIJKLMN = _mm_cvtepu8_epi16(_mm_loadl_epi64((const __m128i*) (i3 + 16)));
86     i3 += 24;
87     vacc01234567 = _mm_add_epi16(vacc01234567, vxi3x01234567);
88     const __m128i vxi4x01234567 = _mm_cvtepu8_epi16(_mm_loadl_epi64((const __m128i*) i4));
89     vacc89ABCDEF = _mm_add_epi16(vacc89ABCDEF, vxi3x89ABCDEF);
90     const __m128i vxi4x89ABCDEF = _mm_cvtepu8_epi16(_mm_loadl_epi64((const __m128i*) (i4 + 8)));
91     vaccGHIJKLMN = _mm_add_epi16(vaccGHIJKLMN, vxi3xGHIJKLMN);
92     const __m128i vxi4xGHIJKLMN = _mm_cvtepu8_epi16(_mm_loadl_epi64((const __m128i*) (i4 + 16)));
93     i4 += 24;
94     vacc01234567 = _mm_add_epi16(vacc01234567, vxi4x01234567);
95     const __m128i vxi5x01234567 = _mm_cvtepu8_epi16(_mm_loadl_epi64((const __m128i*) i5));
96     vacc89ABCDEF = _mm_add_epi16(vacc89ABCDEF, vxi4x89ABCDEF);
97     const __m128i vxi5x89ABCDEF = _mm_cvtepu8_epi16(_mm_loadl_epi64((const __m128i*) (i5 + 8)));
98     vaccGHIJKLMN = _mm_add_epi16(vaccGHIJKLMN, vxi4xGHIJKLMN);
99     const __m128i vxi5xGHIJKLMN = _mm_cvtepu8_epi16(_mm_loadl_epi64((const __m128i*) (i5 + 16)));
100     i5 += 24;
101     vacc01234567 = _mm_add_epi16(vacc01234567, vxi5x01234567);
102     const __m128i vxi6x01234567 = _mm_cvtepu8_epi16(_mm_loadl_epi64((const __m128i*) i6));
103     vacc89ABCDEF = _mm_add_epi16(vacc89ABCDEF, vxi5x89ABCDEF);
104     const __m128i vxi6x89ABCDEF = _mm_cvtepu8_epi16(_mm_loadl_epi64((const __m128i*) (i6 + 8)));
105     vaccGHIJKLMN = _mm_add_epi16(vaccGHIJKLMN, vxi5xGHIJKLMN);
106     const __m128i vxi6xGHIJKLMN = _mm_cvtepu8_epi16(_mm_loadl_epi64((const __m128i*) (i6 + 16)));
107     i6 += 24;
108 
109     vacc01234567 = _mm_add_epi16(vacc01234567, vxi6x01234567);
110     vacc89ABCDEF = _mm_add_epi16(vacc89ABCDEF, vxi6x89ABCDEF);
111     vaccGHIJKLMN = _mm_add_epi16(vaccGHIJKLMN, vxi6xGHIJKLMN);
112 
113     const __m128i vzero = _mm_setzero_si128();
114     __m128i vacc0123 = _mm_cvtepu16_epi32(vacc01234567);
115     __m128i vacc4567 = _mm_unpackhi_epi16(vacc01234567, vzero);
116     __m128i vacc89AB = _mm_cvtepu16_epi32(vacc89ABCDEF);
117     __m128i vaccCDEF = _mm_unpackhi_epi16(vacc89ABCDEF, vzero);
118     __m128i vaccGHIJ = _mm_cvtepu16_epi32(vaccGHIJKLMN);
119     __m128i vaccKLMN = _mm_unpackhi_epi16(vaccGHIJKLMN, vzero);
120 
121     vacc0123 = _mm_add_epi32(vacc0123, vinit_bias);
122     vacc4567 = _mm_add_epi32(vacc4567, vinit_bias);
123     vacc89AB = _mm_add_epi32(vacc89AB, vinit_bias);
124     vaccCDEF = _mm_add_epi32(vaccCDEF, vinit_bias);
125     vaccGHIJ = _mm_add_epi32(vaccGHIJ, vinit_bias);
126     vaccKLMN = _mm_add_epi32(vaccKLMN, vinit_bias);
127 
128     __m128 vfpacc0123 = _mm_cvtepi32_ps(vacc0123);
129     __m128 vfpacc4567 = _mm_cvtepi32_ps(vacc4567);
130     __m128 vfpacc89AB = _mm_cvtepi32_ps(vacc89AB);
131     __m128 vfpaccCDEF = _mm_cvtepi32_ps(vaccCDEF);
132     __m128 vfpaccGHIJ = _mm_cvtepi32_ps(vaccGHIJ);
133     __m128 vfpaccKLMN = _mm_cvtepi32_ps(vaccKLMN);
134 
135     vfpacc0123 = _mm_mul_ps(vfpacc0123, vscale);
136     vfpacc4567 = _mm_mul_ps(vfpacc4567, vscale);
137     vfpacc89AB = _mm_mul_ps(vfpacc89AB, vscale);
138     vfpaccCDEF = _mm_mul_ps(vfpaccCDEF, vscale);
139     vfpaccGHIJ = _mm_mul_ps(vfpaccGHIJ, vscale);
140     vfpaccKLMN = _mm_mul_ps(vfpaccKLMN, vscale);
141 
142     vfpacc0123 = _mm_min_ps(vfpacc0123, voutput_max_less_zero_point);
143     vfpacc4567 = _mm_min_ps(vfpacc4567, voutput_max_less_zero_point);
144     vfpacc89AB = _mm_min_ps(vfpacc89AB, voutput_max_less_zero_point);
145     vfpaccCDEF = _mm_min_ps(vfpaccCDEF, voutput_max_less_zero_point);
146     vfpaccGHIJ = _mm_min_ps(vfpaccGHIJ, voutput_max_less_zero_point);
147     vfpaccKLMN = _mm_min_ps(vfpaccKLMN, voutput_max_less_zero_point);
148 
149     vacc0123 = _mm_cvtps_epi32(vfpacc0123);
150     vacc4567 = _mm_cvtps_epi32(vfpacc4567);
151     vacc89AB = _mm_cvtps_epi32(vfpacc89AB);
152     vaccCDEF = _mm_cvtps_epi32(vfpaccCDEF);
153     vaccGHIJ = _mm_cvtps_epi32(vfpaccGHIJ);
154     vaccKLMN = _mm_cvtps_epi32(vfpaccKLMN);
155 
156     __m128i vout01234567 = _mm_adds_epi16(_mm_packs_epi32(vacc0123, vacc4567), voutput_zero_point);
157     __m128i vout89ABCDEF = _mm_adds_epi16(_mm_packs_epi32(vacc89AB, vaccCDEF), voutput_zero_point);
158     __m128i voutGHIJKLMN = _mm_adds_epi16(_mm_packs_epi32(vaccGHIJ, vaccKLMN), voutput_zero_point);
159 
160     __m128i vout0123456789ABCDEF = _mm_packus_epi16(vout01234567, vout89ABCDEF);
161     __m128i voutGHIJKLMNGHIJKLMN = _mm_packus_epi16(voutGHIJKLMN, voutGHIJKLMN);
162 
163     vout0123456789ABCDEF = _mm_max_epu8(vout0123456789ABCDEF, voutput_min);
164     voutGHIJKLMNGHIJKLMN = _mm_max_epu8(voutGHIJKLMNGHIJKLMN, voutput_min);
165 
166     _mm_storeu_si128((__m128i*) output, vout0123456789ABCDEF);
167     _mm_storel_epi64((__m128i*) (output + 16), voutGHIJKLMNGHIJKLMN);
168     output += 24;
169   }
170   if XNN_UNLIKELY(channels != 0) {
171     do {
172       const __m128i vxi0x01234567 = _mm_cvtepu8_epi16(_mm_loadl_epi64((const __m128i*) i0));
173       i0 += 8;
174       const __m128i vxi1x01234567 = _mm_cvtepu8_epi16(_mm_loadl_epi64((const __m128i*) i1));
175       i1 += 8;
176 
177       __m128i vacc01234567 = _mm_add_epi16(vxi0x01234567, vxi1x01234567);
178       const __m128i vxi2x01234567 = _mm_cvtepu8_epi16(_mm_loadl_epi64((const __m128i*) i2));
179       i2 += 8;
180 
181       vacc01234567 = _mm_add_epi16(vacc01234567, vxi2x01234567);
182       const __m128i vxi3x01234567 = _mm_cvtepu8_epi16(_mm_loadl_epi64((const __m128i*) i3));
183       i3 += 8;
184       vacc01234567 = _mm_add_epi16(vacc01234567, vxi3x01234567);
185       const __m128i vxi4x01234567 = _mm_cvtepu8_epi16(_mm_loadl_epi64((const __m128i*) i4));
186       i4 += 8;
187       vacc01234567 = _mm_add_epi16(vacc01234567, vxi4x01234567);
188       const __m128i vxi5x01234567 = _mm_cvtepu8_epi16(_mm_loadl_epi64((const __m128i*) i5));
189       i5 += 8;
190       vacc01234567 = _mm_add_epi16(vacc01234567, vxi5x01234567);
191       const __m128i vxi6x01234567 = _mm_cvtepu8_epi16(_mm_loadl_epi64((const __m128i*) i6));
192       i6 += 8;
193 
194       vacc01234567 = _mm_add_epi16(vacc01234567, vxi6x01234567);
195 
196       __m128i vacc0123 = _mm_cvtepu16_epi32(vacc01234567);
197       __m128i vacc4567 = _mm_unpackhi_epi16(vacc01234567, _mm_setzero_si128());
198 
199       vacc0123 = _mm_add_epi32(vacc0123, vinit_bias);
200       vacc4567 = _mm_add_epi32(vacc4567, vinit_bias);
201 
202       __m128 vfpacc0123 = _mm_cvtepi32_ps(vacc0123);
203       __m128 vfpacc4567 = _mm_cvtepi32_ps(vacc4567);
204 
205       vfpacc0123 = _mm_mul_ps(vfpacc0123, vscale);
206       vfpacc4567 = _mm_mul_ps(vfpacc4567, vscale);
207 
208       vfpacc0123 = _mm_min_ps(vfpacc0123, voutput_max_less_zero_point);
209       vfpacc4567 = _mm_min_ps(vfpacc4567, voutput_max_less_zero_point);
210 
211       vacc0123 = _mm_cvtps_epi32(vfpacc0123);
212       vacc4567 = _mm_cvtps_epi32(vfpacc4567);
213 
214       __m128i vout01234567 = _mm_adds_epi16(_mm_packs_epi32(vacc0123, vacc4567), voutput_zero_point);
215 
216       __m128i vout0123456701234567 = _mm_packus_epi16(vout01234567, vout01234567);
217       vout0123456701234567 = _mm_max_epu8(vout0123456701234567, voutput_min);
218 
219       if XNN_LIKELY(channels >= 8) {
220         _mm_storel_epi64((__m128i*) output, vout0123456701234567);
221         output += 8;
222         channels -= 8;
223       } else {
224         if (channels & 4) {
225           unaligned_store_u32(output, (uint32_t) _mm_cvtsi128_si32(vout0123456701234567));
226           vout0123456701234567 = _mm_srli_epi64(vout0123456701234567, 32);
227           output += 4;
228         }
229         if (channels & 2) {
230           unaligned_store_u16(output, (uint16_t) _mm_extract_epi16(vout0123456701234567, 0));
231           vout0123456701234567 = _mm_srli_epi32(vout0123456701234567, 16);
232           output += 2;
233         }
234         if (channels & 1) {
235           *output = (uint8_t) _mm_extract_epi8(vout0123456701234567, 0);
236           output += 1;
237         }
238         channels = 0;
239       }
240     } while (channels != 0);
241   }
242 }
243