xref: /aosp_15_r20/external/XNNPACK/src/qu8-gavgpool/gen/7x-minmax-fp32-sse41-c16.c (revision 4bdc94577ba0e567308109d787f7fec7b531ce36)
1 // Auto-generated file. Do not edit!
2 //   Template: src/qs8-gavgpool/unipass-sse4.c.in
3 //   Generator: tools/xngen
4 //
5 // Copyright 2020 Google LLC
6 //
7 // This source code is licensed under the BSD-style license found in the
8 // LICENSE file in the root directory of this source tree.
9 
10 #include <assert.h>
11 
12 #include <smmintrin.h>
13 
14 #include <xnnpack/gavgpool.h>
15 #include <xnnpack/unaligned.h>
16 
17 
xnn_qu8_gavgpool_minmax_fp32_ukernel_7x__sse41_c16(size_t rows,size_t channels,const uint8_t * input,size_t input_stride,const uint8_t * zero,uint8_t * output,const union xnn_qu8_avgpool_minmax_params params[restrict XNN_MIN_ELEMENTS (1)])18 void xnn_qu8_gavgpool_minmax_fp32_ukernel_7x__sse41_c16(
19     size_t rows,
20     size_t channels,
21     const uint8_t* input,
22     size_t input_stride,
23     const uint8_t* zero,
24     uint8_t* output,
25     const union xnn_qu8_avgpool_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_OOB_READS
26 {
27   assert(rows != 0);
28   assert(rows <= 7);
29   assert(channels != 0);
30 
31   const uint8_t* i0 = input;
32   const uint8_t* i1 = (const uint8_t*) ((uintptr_t) i0 + input_stride);
33   if XNN_UNPREDICTABLE(rows < 2) {
34     i1 = zero;
35   }
36   const uint8_t* i2 = (const uint8_t*) ((uintptr_t) i1 + input_stride);
37   if XNN_UNPREDICTABLE(rows <= 2) {
38     i2 = zero;
39   }
40   const uint8_t* i3 = (const uint8_t*) ((uintptr_t) i2 + input_stride);
41   if XNN_UNPREDICTABLE(rows < 4) {
42     i3 = zero;
43   }
44   const uint8_t* i4 = (const uint8_t*) ((uintptr_t) i3 + input_stride);
45   if XNN_UNPREDICTABLE(rows <= 4) {
46     i4 = zero;
47   }
48   const uint8_t* i5 = (const uint8_t*) ((uintptr_t) i4 + input_stride);
49   if XNN_UNPREDICTABLE(rows < 6) {
50     i5 = zero;
51   }
52   const uint8_t* i6 = (const uint8_t*) ((uintptr_t) i5 + input_stride);
53   if XNN_UNPREDICTABLE(rows <= 6) {
54     i6 = zero;
55   }
56 
57   const __m128i vinit_bias = _mm_load_si128((const __m128i*) params->fp32_sse4.init_bias);
58   const __m128 vscale = _mm_load_ps(params->fp32_sse4.scale);
59   const __m128 voutput_max_less_zero_point = _mm_load_ps(params->fp32_sse4.output_max_less_zero_point);
60   const __m128i voutput_zero_point = _mm_load_si128((const __m128i*) params->fp32_sse4.output_zero_point);
61   const __m128i voutput_min = _mm_load_si128((const __m128i*) params->fp32_sse4.output_min);
62   for (; channels >= 16; channels -= 16) {
63     const __m128i vxi0x01234567 = _mm_cvtepu8_epi16(_mm_loadl_epi64((const __m128i*) i0));
64     const __m128i vxi0x89ABCDEF = _mm_cvtepu8_epi16(_mm_loadl_epi64((const __m128i*) (i0 + 8)));
65     i0 += 16;
66     const __m128i vxi1x01234567 = _mm_cvtepu8_epi16(_mm_loadl_epi64((const __m128i*) i1));
67     const __m128i vxi1x89ABCDEF = _mm_cvtepu8_epi16(_mm_loadl_epi64((const __m128i*) (i1 + 8)));
68     i1 += 16;
69 
70     __m128i vacc01234567 = _mm_add_epi16(vxi0x01234567, vxi1x01234567);
71     const __m128i vxi2x01234567 = _mm_cvtepu8_epi16(_mm_loadl_epi64((const __m128i*) i2));
72     __m128i vacc89ABCDEF = _mm_add_epi16(vxi0x89ABCDEF, vxi1x89ABCDEF);
73     const __m128i vxi2x89ABCDEF = _mm_cvtepu8_epi16(_mm_loadl_epi64((const __m128i*) (i2 + 8)));
74     i2 += 16;
75 
76     vacc01234567 = _mm_add_epi16(vacc01234567, vxi2x01234567);
77     const __m128i vxi3x01234567 = _mm_cvtepu8_epi16(_mm_loadl_epi64((const __m128i*) i3));
78     vacc89ABCDEF = _mm_add_epi16(vacc89ABCDEF, vxi2x89ABCDEF);
79     const __m128i vxi3x89ABCDEF = _mm_cvtepu8_epi16(_mm_loadl_epi64((const __m128i*) (i3 + 8)));
80     i3 += 16;
81     vacc01234567 = _mm_add_epi16(vacc01234567, vxi3x01234567);
82     const __m128i vxi4x01234567 = _mm_cvtepu8_epi16(_mm_loadl_epi64((const __m128i*) i4));
83     vacc89ABCDEF = _mm_add_epi16(vacc89ABCDEF, vxi3x89ABCDEF);
84     const __m128i vxi4x89ABCDEF = _mm_cvtepu8_epi16(_mm_loadl_epi64((const __m128i*) (i4 + 8)));
85     i4 += 16;
86     vacc01234567 = _mm_add_epi16(vacc01234567, vxi4x01234567);
87     const __m128i vxi5x01234567 = _mm_cvtepu8_epi16(_mm_loadl_epi64((const __m128i*) i5));
88     vacc89ABCDEF = _mm_add_epi16(vacc89ABCDEF, vxi4x89ABCDEF);
89     const __m128i vxi5x89ABCDEF = _mm_cvtepu8_epi16(_mm_loadl_epi64((const __m128i*) (i5 + 8)));
90     i5 += 16;
91     vacc01234567 = _mm_add_epi16(vacc01234567, vxi5x01234567);
92     const __m128i vxi6x01234567 = _mm_cvtepu8_epi16(_mm_loadl_epi64((const __m128i*) i6));
93     vacc89ABCDEF = _mm_add_epi16(vacc89ABCDEF, vxi5x89ABCDEF);
94     const __m128i vxi6x89ABCDEF = _mm_cvtepu8_epi16(_mm_loadl_epi64((const __m128i*) (i6 + 8)));
95     i6 += 16;
96 
97     vacc01234567 = _mm_add_epi16(vacc01234567, vxi6x01234567);
98     vacc89ABCDEF = _mm_add_epi16(vacc89ABCDEF, vxi6x89ABCDEF);
99 
100     const __m128i vzero = _mm_setzero_si128();
101     __m128i vacc0123 = _mm_cvtepu16_epi32(vacc01234567);
102     __m128i vacc4567 = _mm_unpackhi_epi16(vacc01234567, vzero);
103     __m128i vacc89AB = _mm_cvtepu16_epi32(vacc89ABCDEF);
104     __m128i vaccCDEF = _mm_unpackhi_epi16(vacc89ABCDEF, vzero);
105 
106     vacc0123 = _mm_add_epi32(vacc0123, vinit_bias);
107     vacc4567 = _mm_add_epi32(vacc4567, vinit_bias);
108     vacc89AB = _mm_add_epi32(vacc89AB, vinit_bias);
109     vaccCDEF = _mm_add_epi32(vaccCDEF, vinit_bias);
110 
111     __m128 vfpacc0123 = _mm_cvtepi32_ps(vacc0123);
112     __m128 vfpacc4567 = _mm_cvtepi32_ps(vacc4567);
113     __m128 vfpacc89AB = _mm_cvtepi32_ps(vacc89AB);
114     __m128 vfpaccCDEF = _mm_cvtepi32_ps(vaccCDEF);
115 
116     vfpacc0123 = _mm_mul_ps(vfpacc0123, vscale);
117     vfpacc4567 = _mm_mul_ps(vfpacc4567, vscale);
118     vfpacc89AB = _mm_mul_ps(vfpacc89AB, vscale);
119     vfpaccCDEF = _mm_mul_ps(vfpaccCDEF, vscale);
120 
121     vfpacc0123 = _mm_min_ps(vfpacc0123, voutput_max_less_zero_point);
122     vfpacc4567 = _mm_min_ps(vfpacc4567, voutput_max_less_zero_point);
123     vfpacc89AB = _mm_min_ps(vfpacc89AB, voutput_max_less_zero_point);
124     vfpaccCDEF = _mm_min_ps(vfpaccCDEF, voutput_max_less_zero_point);
125 
126     vacc0123 = _mm_cvtps_epi32(vfpacc0123);
127     vacc4567 = _mm_cvtps_epi32(vfpacc4567);
128     vacc89AB = _mm_cvtps_epi32(vfpacc89AB);
129     vaccCDEF = _mm_cvtps_epi32(vfpaccCDEF);
130 
131     __m128i vout01234567 = _mm_adds_epi16(_mm_packs_epi32(vacc0123, vacc4567), voutput_zero_point);
132     __m128i vout89ABCDEF = _mm_adds_epi16(_mm_packs_epi32(vacc89AB, vaccCDEF), voutput_zero_point);
133 
134     __m128i vout0123456789ABCDEF = _mm_packus_epi16(vout01234567, vout89ABCDEF);
135 
136     vout0123456789ABCDEF = _mm_max_epu8(vout0123456789ABCDEF, voutput_min);
137 
138     _mm_storeu_si128((__m128i*) output, vout0123456789ABCDEF);
139     output += 16;
140   }
141   if XNN_UNLIKELY(channels != 0) {
142     do {
143       const __m128i vxi0x01234567 = _mm_cvtepu8_epi16(_mm_loadl_epi64((const __m128i*) i0));
144       i0 += 8;
145       const __m128i vxi1x01234567 = _mm_cvtepu8_epi16(_mm_loadl_epi64((const __m128i*) i1));
146       i1 += 8;
147 
148       __m128i vacc01234567 = _mm_add_epi16(vxi0x01234567, vxi1x01234567);
149       const __m128i vxi2x01234567 = _mm_cvtepu8_epi16(_mm_loadl_epi64((const __m128i*) i2));
150       i2 += 8;
151 
152       vacc01234567 = _mm_add_epi16(vacc01234567, vxi2x01234567);
153       const __m128i vxi3x01234567 = _mm_cvtepu8_epi16(_mm_loadl_epi64((const __m128i*) i3));
154       i3 += 8;
155       vacc01234567 = _mm_add_epi16(vacc01234567, vxi3x01234567);
156       const __m128i vxi4x01234567 = _mm_cvtepu8_epi16(_mm_loadl_epi64((const __m128i*) i4));
157       i4 += 8;
158       vacc01234567 = _mm_add_epi16(vacc01234567, vxi4x01234567);
159       const __m128i vxi5x01234567 = _mm_cvtepu8_epi16(_mm_loadl_epi64((const __m128i*) i5));
160       i5 += 8;
161       vacc01234567 = _mm_add_epi16(vacc01234567, vxi5x01234567);
162       const __m128i vxi6x01234567 = _mm_cvtepu8_epi16(_mm_loadl_epi64((const __m128i*) i6));
163       i6 += 8;
164 
165       vacc01234567 = _mm_add_epi16(vacc01234567, vxi6x01234567);
166 
167       __m128i vacc0123 = _mm_cvtepu16_epi32(vacc01234567);
168       __m128i vacc4567 = _mm_unpackhi_epi16(vacc01234567, _mm_setzero_si128());
169 
170       vacc0123 = _mm_add_epi32(vacc0123, vinit_bias);
171       vacc4567 = _mm_add_epi32(vacc4567, vinit_bias);
172 
173       __m128 vfpacc0123 = _mm_cvtepi32_ps(vacc0123);
174       __m128 vfpacc4567 = _mm_cvtepi32_ps(vacc4567);
175 
176       vfpacc0123 = _mm_mul_ps(vfpacc0123, vscale);
177       vfpacc4567 = _mm_mul_ps(vfpacc4567, vscale);
178 
179       vfpacc0123 = _mm_min_ps(vfpacc0123, voutput_max_less_zero_point);
180       vfpacc4567 = _mm_min_ps(vfpacc4567, voutput_max_less_zero_point);
181 
182       vacc0123 = _mm_cvtps_epi32(vfpacc0123);
183       vacc4567 = _mm_cvtps_epi32(vfpacc4567);
184 
185       __m128i vout01234567 = _mm_adds_epi16(_mm_packs_epi32(vacc0123, vacc4567), voutput_zero_point);
186 
187       __m128i vout0123456701234567 = _mm_packus_epi16(vout01234567, vout01234567);
188       vout0123456701234567 = _mm_max_epu8(vout0123456701234567, voutput_min);
189 
190       if XNN_LIKELY(channels >= 8) {
191         _mm_storel_epi64((__m128i*) output, vout0123456701234567);
192         output += 8;
193         channels -= 8;
194       } else {
195         if (channels & 4) {
196           unaligned_store_u32(output, (uint32_t) _mm_cvtsi128_si32(vout0123456701234567));
197           vout0123456701234567 = _mm_srli_epi64(vout0123456701234567, 32);
198           output += 4;
199         }
200         if (channels & 2) {
201           unaligned_store_u16(output, (uint16_t) _mm_extract_epi16(vout0123456701234567, 0));
202           vout0123456701234567 = _mm_srli_epi32(vout0123456701234567, 16);
203           output += 2;
204         }
205         if (channels & 1) {
206           *output = (uint8_t) _mm_extract_epi8(vout0123456701234567, 0);
207           output += 1;
208         }
209         channels = 0;
210       }
211     } while (channels != 0);
212   }
213 }
214