xref: /aosp_15_r20/external/XNNPACK/src/qu8-gavgpool/gen/7x-minmax-fp32-neonv8-c8.c (revision 4bdc94577ba0e567308109d787f7fec7b531ce36)
1 // Auto-generated file. Do not edit!
2 //   Template: src/qs8-gavgpool/unipass-neon.c.in
3 //   Generator: tools/xngen
4 //
5 // Copyright 2020 Google LLC
6 //
7 // This source code is licensed under the BSD-style license found in the
8 // LICENSE file in the root directory of this source tree.
9 
10 #include <assert.h>
11 
12 #include <arm_neon.h>
13 
14 #include <xnnpack/gavgpool.h>
15 #include <xnnpack/intrinsics-polyfill.h>
16 
17 
xnn_qu8_gavgpool_minmax_fp32_ukernel_7x__neonv8_c8(size_t rows,size_t channels,const uint8_t * input,size_t input_stride,const uint8_t * zero,uint8_t * output,const union xnn_qu8_avgpool_minmax_params params[restrict XNN_MIN_ELEMENTS (1)])18 void xnn_qu8_gavgpool_minmax_fp32_ukernel_7x__neonv8_c8(
19     size_t rows,
20     size_t channels,
21     const uint8_t* input,
22     size_t input_stride,
23     const uint8_t* zero,
24     uint8_t* output,
25     const union xnn_qu8_avgpool_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_OOB_READS
26 {
27   assert(rows != 0);
28   assert(rows <= 7);
29   assert(channels != 0);
30 
31   const uint8_t* i0 = input;
32   const uint8_t* i1 = (const uint8_t*) ((uintptr_t) i0 + input_stride);
33   if XNN_UNPREDICTABLE(rows < 2) {
34     i1 = zero;
35   }
36   const uint8_t* i2 = (const uint8_t*) ((uintptr_t) i1 + input_stride);
37   if XNN_UNPREDICTABLE(rows <= 2) {
38     i2 = zero;
39   }
40   const uint8_t* i3 = (const uint8_t*) ((uintptr_t) i2 + input_stride);
41   if XNN_UNPREDICTABLE(rows < 4) {
42     i3 = zero;
43   }
44   const uint8_t* i4 = (const uint8_t*) ((uintptr_t) i3 + input_stride);
45   if XNN_UNPREDICTABLE(rows <= 4) {
46     i4 = zero;
47   }
48   const uint8_t* i5 = (const uint8_t*) ((uintptr_t) i4 + input_stride);
49   if XNN_UNPREDICTABLE(rows < 6) {
50     i5 = zero;
51   }
52   const uint8_t* i6 = (const uint8_t*) ((uintptr_t) i5 + input_stride);
53   if XNN_UNPREDICTABLE(rows <= 6) {
54     i6 = zero;
55   }
56 
57   const int32x4_t vinit_bias = vld1q_dup_s32(&params->fp32_neonv8.init_bias);
58   const float32x4_t vscale = vld1q_dup_f32(&params->fp32_neonv8.scale);
59   const int16x8_t voutput_zero_point = vld1q_dup_s16(&params->fp32_neonv8.output_zero_point);
60   const uint8x8_t voutput_min = vld1_dup_u8(&params->fp32_neonv8.output_min);
61   const uint8x8_t voutput_max = vld1_dup_u8(&params->fp32_neonv8.output_max);
62   for (; channels >= 8; channels -= 8) {
63     const uint8x8_t vi0x01234567 = vld1_u8(i0); i0 += 8;
64     const uint8x8_t vi1x01234567 = vld1_u8(i1); i1 += 8;
65 
66     const uint8x8_t vi2x01234567 = vld1_u8(i2); i2 += 8;
67     uint16x8_t vsum01234567 = vaddl_u8(vi0x01234567, vi1x01234567);
68 
69     const uint8x8_t vi3x01234567 = vld1_u8(i3); i3 += 8;
70     vsum01234567 = vaddw_u8(vsum01234567, vi2x01234567);
71     const uint8x8_t vi4x01234567 = vld1_u8(i4); i4 += 8;
72     vsum01234567 = vaddw_u8(vsum01234567, vi3x01234567);
73     const uint8x8_t vi5x01234567 = vld1_u8(i5); i5 += 8;
74     vsum01234567 = vaddw_u8(vsum01234567, vi4x01234567);
75     const uint8x8_t vi6x01234567 = vld1_u8(i6); i6 += 8;
76     vsum01234567 = vaddw_u8(vsum01234567, vi5x01234567);
77     vsum01234567 = vaddw_u8(vsum01234567, vi6x01234567);
78 
79     int32x4_t vacc0123 = vreinterpretq_s32_u32(vaddw_u16(vreinterpretq_u32_s32(vinit_bias), vget_low_u16(vsum01234567)));
80     int32x4_t vacc4567 = vreinterpretq_s32_u32(vaddw_u16(vreinterpretq_u32_s32(vinit_bias), vget_high_u16(vsum01234567)));
81 
82     float32x4_t vfpacc0123 = vcvtq_f32_s32(vacc0123);
83     float32x4_t vfpacc4567 = vcvtq_f32_s32(vacc4567);
84 
85     vfpacc0123 = vmulq_f32(vfpacc0123, vscale);
86     vfpacc4567 = vmulq_f32(vfpacc4567, vscale);
87 
88     vacc0123 = vcvtnq_s32_f32(vfpacc0123);
89     vacc4567 = vcvtnq_s32_f32(vfpacc4567);
90 
91     #if XNN_ARCH_ARM64
92       int16x8_t vacc01234567 = vqmovn_high_s32(vqmovn_s32(vacc0123), vacc4567);
93     #else  // !XNN_ARCH_ARM64
94       int16x8_t vacc01234567 = vcombine_s16(vqmovn_s32(vacc0123), vqmovn_s32(vacc4567));
95     #endif  // !XNN_ARCH_ARM64
96 
97     vacc01234567 = vqaddq_s16(vacc01234567, voutput_zero_point);
98 
99     #if XNN_ARCH_ARM64
100       uint8x8_t vout01234567 = vqmovun_s16(vacc01234567);
101     #else  // !XNN_ARCH_ARM64
102       uint8x8_t vout01234567 = vqmovun_s16(vacc01234567);
103     #endif  // !XNN_ARCH_ARM64
104 
105     vout01234567 = vmax_u8(vout01234567, voutput_min);
106 
107     vout01234567 = vmin_u8(vout01234567, voutput_max);
108 
109     vst1_u8(output, vout01234567); output += 8;
110   }
111   if XNN_UNLIKELY(channels != 0) {
112     {
113       const uint8x8_t vi0x01234567 = vld1_u8(i0); i0 += 8;
114       const uint8x8_t vi1x01234567 = vld1_u8(i1); i1 += 8;
115       const uint8x8_t vi2x01234567 = vld1_u8(i2); i2 += 8;
116       uint16x8_t vsum01234567 = vaddl_u8(vi0x01234567, vi1x01234567);
117 
118       const uint8x8_t vi3x01234567 = vld1_u8(i3); i3 += 8;
119       vsum01234567 = vaddw_u8(vsum01234567, vi2x01234567);
120       const uint8x8_t vi4x01234567 = vld1_u8(i4); i4 += 8;
121       vsum01234567 = vaddw_u8(vsum01234567, vi3x01234567);
122       const uint8x8_t vi5x01234567 = vld1_u8(i5); i5 += 8;
123       vsum01234567 = vaddw_u8(vsum01234567, vi4x01234567);
124       const uint8x8_t vi6x01234567 = vld1_u8(i6); i6 += 8;
125       vsum01234567 = vaddw_u8(vsum01234567, vi5x01234567);
126       vsum01234567 = vaddw_u8(vsum01234567, vi6x01234567);
127 
128       int32x4_t vacc0123 = vreinterpretq_s32_u32(vaddw_u16(vreinterpretq_u32_s32(vinit_bias), vget_low_u16(vsum01234567)));
129       int32x4_t vacc4567 = vreinterpretq_s32_u32(vaddw_u16(vreinterpretq_u32_s32(vinit_bias), vget_high_u16(vsum01234567)));
130 
131       float32x4_t vfpacc0123 = vcvtq_f32_s32(vacc0123);
132       float32x4_t vfpacc4567 = vcvtq_f32_s32(vacc4567);
133 
134       vfpacc0123 = vmulq_f32(vfpacc0123, vscale);
135       vfpacc4567 = vmulq_f32(vfpacc4567, vscale);
136 
137       vacc0123 = vcvtnq_s32_f32(vfpacc0123);
138       vacc4567 = vcvtnq_s32_f32(vfpacc4567);
139 
140       #if XNN_ARCH_ARM64
141         int16x8_t vacc01234567 = vqmovn_high_s32(vqmovn_s32(vacc0123), vacc4567);
142       #else
143         int16x8_t vacc01234567 = vcombine_s16(vqmovn_s32(vacc0123), vqmovn_s32(vacc4567));
144       #endif
145       vacc01234567 = vqaddq_s16(vacc01234567, voutput_zero_point);
146 
147       uint8x8_t vout01234567 = vqmovun_s16(vacc01234567);
148       vout01234567 = vmax_u8(vout01234567, voutput_min);
149       vout01234567 = vmin_u8(vout01234567, voutput_max);
150 
151       if (channels & 4) {
152         vst1_lane_u32((void*) output, vreinterpret_u32_u8(vout01234567), 0); output += 4;
153         vout01234567 = vext_u8(vout01234567, vout01234567, 4);
154       }
155       if (channels & 2) {
156         vst1_lane_u16((void*) output, vreinterpret_u16_u8(vout01234567), 0); output += 2;
157         vout01234567 = vext_u8(vout01234567, vout01234567, 2);
158       }
159       if (channels & 1) {
160         vst1_lane_u8(output, vout01234567, 0);
161       }
162     }
163   }
164 }
165