xref: /aosp_15_r20/external/XNNPACK/src/qu8-gavgpool/gen/7p7x-minmax-fp32-sse41-c8.c (revision 4bdc94577ba0e567308109d787f7fec7b531ce36)
1 // Auto-generated file. Do not edit!
2 //   Template: src/qs8-gavgpool/multipass-sse4.c.in
3 //   Generator: tools/xngen
4 //
5 // Copyright 2020 Google LLC
6 //
7 // This source code is licensed under the BSD-style license found in the
8 // LICENSE file in the root directory of this source tree.
9 
10 #include <assert.h>
11 
12 #include <smmintrin.h>
13 
14 #include <xnnpack/gavgpool.h>
15 #include <xnnpack/math.h>
16 #include <xnnpack/unaligned.h>
17 
18 
xnn_qu8_gavgpool_minmax_fp32_ukernel_7p7x__sse41_c8(size_t rows,size_t channels,const uint8_t * input,size_t input_stride,const uint8_t * zero,int32_t * buffer,uint8_t * output,const union xnn_qu8_avgpool_minmax_params params[restrict XNN_MIN_ELEMENTS (1)])19 void xnn_qu8_gavgpool_minmax_fp32_ukernel_7p7x__sse41_c8(
20     size_t rows,
21     size_t channels,
22     const uint8_t* input,
23     size_t input_stride,
24     const uint8_t* zero,
25     int32_t* buffer,
26     uint8_t* output,
27     const union xnn_qu8_avgpool_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_OOB_READS
28 {
29   assert(rows > 7);
30   assert(channels != 0);
31 
32   const uint8_t* i0 = input;
33   const uint8_t* i1 = (const uint8_t*) ((uintptr_t) i0 + input_stride);
34   const uint8_t* i2 = (const uint8_t*) ((uintptr_t) i1 + input_stride);
35   const uint8_t* i3 = (const uint8_t*) ((uintptr_t) i2 + input_stride);
36   const uint8_t* i4 = (const uint8_t*) ((uintptr_t) i3 + input_stride);
37   const uint8_t* i5 = (const uint8_t*) ((uintptr_t) i4 + input_stride);
38   const uint8_t* i6 = (const uint8_t*) ((uintptr_t) i5 + input_stride);
39   const size_t input_increment = 7 * input_stride - round_up_po2(channels, 8) * sizeof(uint8_t);
40 
41   const __m128i vinit_bias = _mm_load_si128((const __m128i*) params->fp32_sse4.init_bias);
42   int32_t* b = buffer;
43   size_t c = channels;
44   for (; c != 0; c = doz(c, 8)) {
45     const __m128i vxi0x01234567 = _mm_cvtepu8_epi16(_mm_loadl_epi64((const __m128i*) i0));
46     i0 += 8;
47     const __m128i vxi1x01234567 = _mm_cvtepu8_epi16(_mm_loadl_epi64((const __m128i*) i1));
48     i1 += 8;
49 
50     __m128i vacc01234567 = _mm_add_epi16(vxi0x01234567, vxi1x01234567);
51     const __m128i vxi2x01234567 = _mm_cvtepu8_epi16(_mm_loadl_epi64((const __m128i*) i2));
52     i2 += 8;
53 
54     vacc01234567 = _mm_add_epi16(vacc01234567, vxi2x01234567);
55     const __m128i vxi3x01234567 = _mm_cvtepu8_epi16(_mm_loadl_epi64((const __m128i*) i3));
56     i3 += 8;
57     vacc01234567 = _mm_add_epi16(vacc01234567, vxi3x01234567);
58     const __m128i vxi4x01234567 = _mm_cvtepu8_epi16(_mm_loadl_epi64((const __m128i*) i4));
59     i4 += 8;
60     vacc01234567 = _mm_add_epi16(vacc01234567, vxi4x01234567);
61     const __m128i vxi5x01234567 = _mm_cvtepu8_epi16(_mm_loadl_epi64((const __m128i*) i5));
62     i5 += 8;
63     vacc01234567 = _mm_add_epi16(vacc01234567, vxi5x01234567);
64     const __m128i vxi6x01234567 = _mm_cvtepu8_epi16(_mm_loadl_epi64((const __m128i*) i6));
65     i6 += 8;
66 
67     vacc01234567 = _mm_add_epi16(vacc01234567, vxi6x01234567);
68 
69     const __m128i vzero = _mm_setzero_si128();
70     __m128i vacc0123 = _mm_cvtepu16_epi32(vacc01234567);
71     __m128i vacc4567 = _mm_unpackhi_epi16(vacc01234567, vzero);
72 
73     vacc0123 = _mm_add_epi32(vacc0123, vinit_bias);
74     vacc4567 = _mm_add_epi32(vacc4567, vinit_bias);
75 
76     _mm_store_si128((__m128i*) b, vacc0123);
77     _mm_store_si128((__m128i*) (b + 4), vacc4567);
78     b += 8;
79   }
80 
81   for (rows -= 7; rows > 7; rows -= 7) {
82     i0 = (const uint8_t*) ((uintptr_t) i0 + input_increment);
83     i1 = (const uint8_t*) ((uintptr_t) i1 + input_increment);
84     i2 = (const uint8_t*) ((uintptr_t) i2 + input_increment);
85     i3 = (const uint8_t*) ((uintptr_t) i3 + input_increment);
86     i4 = (const uint8_t*) ((uintptr_t) i4 + input_increment);
87     i5 = (const uint8_t*) ((uintptr_t) i5 + input_increment);
88     i6 = (const uint8_t*) ((uintptr_t) i6 + input_increment);
89 
90     int32_t* b = buffer;
91     size_t c = channels;
92     for (; c != 0; c = doz(c, 8)) {
93       const __m128i vxi0x01234567 = _mm_cvtepu8_epi16(_mm_loadl_epi64((const __m128i*) i0));
94       i0 += 8;
95       const __m128i vxi1x01234567 = _mm_cvtepu8_epi16(_mm_loadl_epi64((const __m128i*) i1));
96       i1 += 8;
97 
98       __m128i vacc01234567 = _mm_add_epi16(vxi0x01234567, vxi1x01234567);
99       const __m128i vxi2x01234567 = _mm_cvtepu8_epi16(_mm_loadl_epi64((const __m128i*) i2));
100       i2 += 8;
101 
102       vacc01234567 = _mm_add_epi16(vacc01234567, vxi2x01234567);
103       const __m128i vxi3x01234567 = _mm_cvtepu8_epi16(_mm_loadl_epi64((const __m128i*) i3));
104       i3 += 8;
105       vacc01234567 = _mm_add_epi16(vacc01234567, vxi3x01234567);
106       const __m128i vxi4x01234567 = _mm_cvtepu8_epi16(_mm_loadl_epi64((const __m128i*) i4));
107       i4 += 8;
108       vacc01234567 = _mm_add_epi16(vacc01234567, vxi4x01234567);
109       const __m128i vxi5x01234567 = _mm_cvtepu8_epi16(_mm_loadl_epi64((const __m128i*) i5));
110       i5 += 8;
111       vacc01234567 = _mm_add_epi16(vacc01234567, vxi5x01234567);
112       const __m128i vxi6x01234567 = _mm_cvtepu8_epi16(_mm_loadl_epi64((const __m128i*) i6));
113       i6 += 8;
114 
115       vacc01234567 = _mm_add_epi16(vacc01234567, vxi6x01234567);
116 
117       const __m128i vzero = _mm_setzero_si128();
118       __m128i vacc0123 = _mm_cvtepu16_epi32(vacc01234567);
119       __m128i vacc4567 = _mm_unpackhi_epi16(vacc01234567, vzero);
120 
121       vacc0123 = _mm_add_epi32(vacc0123, _mm_load_si128((const __m128i*) b));
122       vacc4567 = _mm_add_epi32(vacc4567, _mm_load_si128((const __m128i*) (b + 4)));
123 
124       _mm_store_si128((__m128i*) b, vacc0123);
125       _mm_store_si128((__m128i*) (b + 4), vacc4567);
126       b += 8;
127     }
128   }
129 
130   i0 = (const uint8_t*) ((uintptr_t) i0 + input_increment);
131   i1 = (const uint8_t*) ((uintptr_t) i1 + input_increment);
132   if XNN_UNPREDICTABLE(rows < 2) {
133     i1 = zero;
134   }
135   i2 = (const uint8_t*) ((uintptr_t) i2 + input_increment);
136   if XNN_UNPREDICTABLE(rows <= 2) {
137     i2 = zero;
138   }
139   i3 = (const uint8_t*) ((uintptr_t) i3 + input_increment);
140   if XNN_UNPREDICTABLE(rows < 4) {
141     i3 = zero;
142   }
143   i4 = (const uint8_t*) ((uintptr_t) i4 + input_increment);
144   if XNN_UNPREDICTABLE(rows <= 4) {
145     i4 = zero;
146   }
147   i5 = (const uint8_t*) ((uintptr_t) i5 + input_increment);
148   if XNN_UNPREDICTABLE(rows < 6) {
149     i5 = zero;
150   }
151   i6 = (const uint8_t*) ((uintptr_t) i6 + input_increment);
152   if XNN_UNPREDICTABLE(rows <= 6) {
153     i6 = zero;
154   }
155 
156   const __m128 vscale = _mm_load_ps(params->fp32_sse4.scale);
157   const __m128 voutput_max_less_zero_point = _mm_load_ps(params->fp32_sse4.output_max_less_zero_point);
158   const __m128i voutput_zero_point = _mm_load_si128((const __m128i*) params->fp32_sse4.output_zero_point);
159   const __m128i voutput_min = _mm_load_si128((const __m128i*) params->fp32_sse4.output_min);
160   for (; channels >= 8; channels -= 8) {
161     const __m128i vxi0x01234567 = _mm_cvtepu8_epi16(_mm_loadl_epi64((const __m128i*) i0));
162     i0 += 8;
163     const __m128i vxi1x01234567 = _mm_cvtepu8_epi16(_mm_loadl_epi64((const __m128i*) i1));
164     i1 += 8;
165 
166     __m128i vacc01234567 = _mm_add_epi16(vxi0x01234567, vxi1x01234567);
167     const __m128i vxi2x01234567 = _mm_cvtepu8_epi16(_mm_loadl_epi64((const __m128i*) i2));
168     i2 += 8;
169 
170     vacc01234567 = _mm_add_epi16(vacc01234567, vxi2x01234567);
171     const __m128i vxi3x01234567 = _mm_cvtepu8_epi16(_mm_loadl_epi64((const __m128i*) i3));
172     i3 += 8;
173     vacc01234567 = _mm_add_epi16(vacc01234567, vxi3x01234567);
174     const __m128i vxi4x01234567 = _mm_cvtepu8_epi16(_mm_loadl_epi64((const __m128i*) i4));
175     i4 += 8;
176     vacc01234567 = _mm_add_epi16(vacc01234567, vxi4x01234567);
177     const __m128i vxi5x01234567 = _mm_cvtepu8_epi16(_mm_loadl_epi64((const __m128i*) i5));
178     i5 += 8;
179     vacc01234567 = _mm_add_epi16(vacc01234567, vxi5x01234567);
180     const __m128i vxi6x01234567 = _mm_cvtepu8_epi16(_mm_loadl_epi64((const __m128i*) i6));
181     i6 += 8;
182 
183     vacc01234567 = _mm_add_epi16(vacc01234567, vxi6x01234567);
184 
185     const __m128i vzero = _mm_setzero_si128();
186     __m128i vacc0123 = _mm_cvtepu16_epi32(vacc01234567);
187     __m128i vacc4567 = _mm_unpackhi_epi16(vacc01234567, vzero);
188 
189     vacc0123 = _mm_add_epi32(vacc0123, _mm_load_si128((const __m128i*) buffer));
190     vacc4567 = _mm_add_epi32(vacc4567, _mm_load_si128((const __m128i*) (buffer + 4)));
191     buffer += 8;
192 
193     __m128 vfpacc0123 = _mm_cvtepi32_ps(vacc0123);
194     __m128 vfpacc4567 = _mm_cvtepi32_ps(vacc4567);
195 
196     vfpacc0123 = _mm_mul_ps(vfpacc0123, vscale);
197     vfpacc4567 = _mm_mul_ps(vfpacc4567, vscale);
198 
199     vfpacc0123 = _mm_min_ps(vfpacc0123, voutput_max_less_zero_point);
200     vfpacc4567 = _mm_min_ps(vfpacc4567, voutput_max_less_zero_point);
201 
202     vacc0123 = _mm_cvtps_epi32(vfpacc0123);
203     vacc4567 = _mm_cvtps_epi32(vfpacc4567);
204 
205     __m128i vout01234567 = _mm_adds_epi16(_mm_packs_epi32(vacc0123, vacc4567), voutput_zero_point);
206 
207     __m128i vout0123456701234567 = _mm_packus_epi16(vout01234567, vout01234567);
208 
209     vout0123456701234567 = _mm_max_epu8(vout0123456701234567, voutput_min);
210 
211     _mm_storel_epi64((__m128i*) output, vout0123456701234567);
212     output += 8;
213   }
214   if XNN_UNLIKELY(channels != 0) {
215     {
216       const __m128i vxi0x01234567 = _mm_cvtepu8_epi16(_mm_loadl_epi64((const __m128i*) i0));
217       i0 += 8;
218       const __m128i vxi1x01234567 = _mm_cvtepu8_epi16(_mm_loadl_epi64((const __m128i*) i1));
219       i1 += 8;
220 
221       __m128i vacc01234567 = _mm_add_epi16(vxi0x01234567, vxi1x01234567);
222       const __m128i vxi2x01234567 = _mm_cvtepu8_epi16(_mm_loadl_epi64((const __m128i*) i2));
223       i2 += 8;
224 
225       vacc01234567 = _mm_add_epi16(vacc01234567, vxi2x01234567);
226       const __m128i vxi3x01234567 = _mm_cvtepu8_epi16(_mm_loadl_epi64((const __m128i*) i3));
227       i3 += 8;
228       vacc01234567 = _mm_add_epi16(vacc01234567, vxi3x01234567);
229       const __m128i vxi4x01234567 = _mm_cvtepu8_epi16(_mm_loadl_epi64((const __m128i*) i4));
230       i4 += 8;
231       vacc01234567 = _mm_add_epi16(vacc01234567, vxi4x01234567);
232       const __m128i vxi5x01234567 = _mm_cvtepu8_epi16(_mm_loadl_epi64((const __m128i*) i5));
233       i5 += 8;
234       vacc01234567 = _mm_add_epi16(vacc01234567, vxi5x01234567);
235       const __m128i vxi6x01234567 = _mm_cvtepu8_epi16(_mm_loadl_epi64((const __m128i*) i6));
236       i6 += 8;
237 
238       vacc01234567 = _mm_add_epi16(vacc01234567, vxi6x01234567);
239 
240       __m128i vacc0123 = _mm_cvtepu16_epi32(vacc01234567);
241       __m128i vacc4567 = _mm_unpackhi_epi16(vacc01234567, _mm_setzero_si128());
242 
243       vacc0123 = _mm_add_epi32(vacc0123, _mm_load_si128((const __m128i*) buffer));
244       vacc4567 = _mm_add_epi32(vacc4567, _mm_load_si128((const __m128i*) (buffer + 4)));
245       buffer += 8;
246 
247       __m128 vfpacc0123 = _mm_cvtepi32_ps(vacc0123);
248       __m128 vfpacc4567 = _mm_cvtepi32_ps(vacc4567);
249 
250       vfpacc0123 = _mm_mul_ps(vfpacc0123, vscale);
251       vfpacc4567 = _mm_mul_ps(vfpacc4567, vscale);
252 
253       vfpacc0123 = _mm_min_ps(vfpacc0123, voutput_max_less_zero_point);
254       vfpacc4567 = _mm_min_ps(vfpacc4567, voutput_max_less_zero_point);
255 
256       vacc0123 = _mm_cvtps_epi32(vfpacc0123);
257       vacc4567 = _mm_cvtps_epi32(vfpacc4567);
258 
259       __m128i vout01234567 = _mm_adds_epi16(_mm_packs_epi32(vacc0123, vacc4567), voutput_zero_point);
260 
261       __m128i vout0123456701234567 = _mm_packus_epi16(vout01234567, vout01234567);
262       vout0123456701234567 = _mm_max_epu8(vout0123456701234567, voutput_min);
263 
264       if (channels & 4) {
265         unaligned_store_u32(output, (uint32_t) _mm_cvtsi128_si32(vout0123456701234567));
266         vout0123456701234567 = _mm_srli_epi64(vout0123456701234567, 32);
267         output += 4;
268       }
269       if (channels & 2) {
270         unaligned_store_u16(output, (uint16_t) _mm_extract_epi16(vout0123456701234567, 0));
271         vout0123456701234567 = _mm_srli_epi32(vout0123456701234567, 16);
272         output += 2;
273       }
274       if (channels & 1) {
275         *output = (uint8_t) _mm_extract_epi8(vout0123456701234567, 0);
276       }
277     }
278   }
279 }
280