xref: /aosp_15_r20/external/XNNPACK/src/qu8-gavgpool/gen/7p7x-minmax-fp32-neon-c16.c (revision 4bdc94577ba0e567308109d787f7fec7b531ce36) 
1 // Auto-generated file. Do not edit!
2 //   Template: src/qs8-gavgpool/multipass-neon.c.in
3 //   Generator: tools/xngen
4 //
5 // Copyright 2020 Google LLC
6 //
7 // This source code is licensed under the BSD-style license found in the
8 // LICENSE file in the root directory of this source tree.
9 
10 #include <assert.h>
11 
12 #include <arm_neon.h>
13 
14 #include <xnnpack/gavgpool.h>
15 #include <xnnpack/math.h>
16 
17 
xnn_qu8_gavgpool_minmax_fp32_ukernel_7p7x__neon_c16(size_t rows,size_t channels,const uint8_t * input,size_t input_stride,const uint8_t * zero,int32_t * buffer,uint8_t * output,const union xnn_qu8_avgpool_minmax_params params[restrict XNN_MIN_ELEMENTS (1)])18 void xnn_qu8_gavgpool_minmax_fp32_ukernel_7p7x__neon_c16(
19     size_t rows,
20     size_t channels,
21     const uint8_t* input,
22     size_t input_stride,
23     const uint8_t* zero,
24     int32_t* buffer,
25     uint8_t* output,
26     const union xnn_qu8_avgpool_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_OOB_READS
27 {
28   assert(rows > 7);
29   assert(channels != 0);
30 
31   const uint8_t* i0 = input;
32   const uint8_t* i1 = (const uint8_t*) ((uintptr_t) i0 + input_stride);
33   const uint8_t* i2 = (const uint8_t*) ((uintptr_t) i1 + input_stride);
34   const uint8_t* i3 = (const uint8_t*) ((uintptr_t) i2 + input_stride);
35   const uint8_t* i4 = (const uint8_t*) ((uintptr_t) i3 + input_stride);
36   const uint8_t* i5 = (const uint8_t*) ((uintptr_t) i4 + input_stride);
37   const uint8_t* i6 = (const uint8_t*) ((uintptr_t) i5 + input_stride);
38   const size_t input_increment = 7 * input_stride - round_up_po2(channels, 16) * sizeof(uint8_t);
39 
40   const int32x4_t vinit_bias = vld1q_dup_s32(&params->fp32_neon.init_bias);
41   int32_t* b = buffer;
42   size_t c = channels;
43   for (; c != 0; c = doz(c, 16)) {
44     const uint8x8_t vi0x01234567 = vld1_u8(i0); i0 += 8;
45     const uint8x8_t vi0x89ABCDEF = vld1_u8(i0); i0 += 8;
46     const uint8x8_t vi1x01234567 = vld1_u8(i1); i1 += 8;
47     const uint8x8_t vi1x89ABCDEF = vld1_u8(i1); i1 += 8;
48 
49     const uint8x8_t vi2x01234567 = vld1_u8(i2); i2 += 8;
50     uint16x8_t vsum01234567 = vaddl_u8(vi0x01234567, vi1x01234567);
51     const uint8x8_t vi2x89ABCDEF = vld1_u8(i2); i2 += 8;
52     uint16x8_t vsum89ABCDEF = vaddl_u8(vi0x89ABCDEF, vi1x89ABCDEF);
53 
54     const uint8x8_t vi3x01234567 = vld1_u8(i3); i3 += 8;
55     vsum01234567 = vaddw_u8(vsum01234567, vi2x01234567);
56     const uint8x8_t vi3x89ABCDEF = vld1_u8(i3); i3 += 8;
57     vsum89ABCDEF = vaddw_u8(vsum89ABCDEF, vi2x89ABCDEF);
58     const uint8x8_t vi4x01234567 = vld1_u8(i4); i4 += 8;
59     vsum01234567 = vaddw_u8(vsum01234567, vi3x01234567);
60     const uint8x8_t vi4x89ABCDEF = vld1_u8(i4); i4 += 8;
61     vsum89ABCDEF = vaddw_u8(vsum89ABCDEF, vi3x89ABCDEF);
62     const uint8x8_t vi5x01234567 = vld1_u8(i5); i5 += 8;
63     vsum01234567 = vaddw_u8(vsum01234567, vi4x01234567);
64     const uint8x8_t vi5x89ABCDEF = vld1_u8(i5); i5 += 8;
65     vsum89ABCDEF = vaddw_u8(vsum89ABCDEF, vi4x89ABCDEF);
66     const uint8x8_t vi6x01234567 = vld1_u8(i6); i6 += 8;
67     vsum01234567 = vaddw_u8(vsum01234567, vi5x01234567);
68     const uint8x8_t vi6x89ABCDEF = vld1_u8(i6); i6 += 8;
69     vsum89ABCDEF = vaddw_u8(vsum89ABCDEF, vi5x89ABCDEF);
70     vsum01234567 = vaddw_u8(vsum01234567, vi6x01234567);
71     vsum89ABCDEF = vaddw_u8(vsum89ABCDEF, vi6x89ABCDEF);
72 
73     const int32x4_t vacc0123 = vreinterpretq_s32_u32(vaddw_u16(vreinterpretq_u32_s32(vinit_bias), vget_low_u16(vsum01234567)));
74     const int32x4_t vacc4567 = vreinterpretq_s32_u32(vaddw_u16(vreinterpretq_u32_s32(vinit_bias), vget_high_u16(vsum01234567)));
75     const int32x4_t vacc89AB = vreinterpretq_s32_u32(vaddw_u16(vreinterpretq_u32_s32(vinit_bias), vget_low_u16(vsum89ABCDEF)));
76     const int32x4_t vaccCDEF = vreinterpretq_s32_u32(vaddw_u16(vreinterpretq_u32_s32(vinit_bias), vget_high_u16(vsum89ABCDEF)));
77 
78     vst1q_s32(b, vacc0123); b += 4;
79     vst1q_s32(b, vacc4567); b += 4;
80     vst1q_s32(b, vacc89AB); b += 4;
81     vst1q_s32(b, vaccCDEF); b += 4;
82   }
83 
84   for (rows -= 7; rows > 7; rows -= 7) {
85     i0 = (const uint8_t*) ((uintptr_t) i0 + input_increment);
86     i1 = (const uint8_t*) ((uintptr_t) i1 + input_increment);
87     i2 = (const uint8_t*) ((uintptr_t) i2 + input_increment);
88     i3 = (const uint8_t*) ((uintptr_t) i3 + input_increment);
89     i4 = (const uint8_t*) ((uintptr_t) i4 + input_increment);
90     i5 = (const uint8_t*) ((uintptr_t) i5 + input_increment);
91     i6 = (const uint8_t*) ((uintptr_t) i6 + input_increment);
92 
93     int32_t* b = buffer;
94     size_t c = channels;
95     for (; c != 0; c = doz(c, 16)) {
96       const uint8x8_t vi0x01234567 = vld1_u8(i0); i0 += 8;
97       const uint8x8_t vi0x89ABCDEF = vld1_u8(i0); i0 += 8;
98       const uint8x8_t vi1x01234567 = vld1_u8(i1); i1 += 8;
99       const uint8x8_t vi1x89ABCDEF = vld1_u8(i1); i1 += 8;
100 
101       const uint8x8_t vi2x01234567 = vld1_u8(i2); i2 += 8;
102       uint16x8_t vsum01234567 = vaddl_u8(vi0x01234567, vi1x01234567);
103       const uint8x8_t vi2x89ABCDEF = vld1_u8(i2); i2 += 8;
104       uint16x8_t vsum89ABCDEF = vaddl_u8(vi0x89ABCDEF, vi1x89ABCDEF);
105 
106       const uint8x8_t vi3x01234567 = vld1_u8(i3); i3 += 8;
107       vsum01234567 = vaddw_u8(vsum01234567, vi2x01234567);
108       const uint8x8_t vi3x89ABCDEF = vld1_u8(i3); i3 += 8;
109       vsum89ABCDEF = vaddw_u8(vsum89ABCDEF, vi2x89ABCDEF);
110       const uint8x8_t vi4x01234567 = vld1_u8(i4); i4 += 8;
111       vsum01234567 = vaddw_u8(vsum01234567, vi3x01234567);
112       const uint8x8_t vi4x89ABCDEF = vld1_u8(i4); i4 += 8;
113       vsum89ABCDEF = vaddw_u8(vsum89ABCDEF, vi3x89ABCDEF);
114       const uint8x8_t vi5x01234567 = vld1_u8(i5); i5 += 8;
115       vsum01234567 = vaddw_u8(vsum01234567, vi4x01234567);
116       const uint8x8_t vi5x89ABCDEF = vld1_u8(i5); i5 += 8;
117       vsum89ABCDEF = vaddw_u8(vsum89ABCDEF, vi4x89ABCDEF);
118       const uint8x8_t vi6x01234567 = vld1_u8(i6); i6 += 8;
119       vsum01234567 = vaddw_u8(vsum01234567, vi5x01234567);
120       const uint8x8_t vi6x89ABCDEF = vld1_u8(i6); i6 += 8;
121       vsum89ABCDEF = vaddw_u8(vsum89ABCDEF, vi5x89ABCDEF);
122       int32x4_t vacc0123 = vld1q_s32(b);
123       int32x4_t vacc4567 = vld1q_s32(b + 4);
124       vsum01234567 = vaddw_u8(vsum01234567, vi6x01234567);
125       int32x4_t vacc89AB = vld1q_s32(b + 8);
126       int32x4_t vaccCDEF = vld1q_s32(b + 12);
127       vsum89ABCDEF = vaddw_u8(vsum89ABCDEF, vi6x89ABCDEF);
128 
129       vacc0123 = vreinterpretq_s32_u32(vaddw_u16(vreinterpretq_u32_s32(vacc0123), vget_low_u16(vsum01234567)));
130       vacc4567 = vreinterpretq_s32_u32(vaddw_u16(vreinterpretq_u32_s32(vacc4567), vget_high_u16(vsum01234567)));
131       vacc89AB = vreinterpretq_s32_u32(vaddw_u16(vreinterpretq_u32_s32(vacc89AB), vget_low_u16(vsum89ABCDEF)));
132       vaccCDEF = vreinterpretq_s32_u32(vaddw_u16(vreinterpretq_u32_s32(vaccCDEF), vget_high_u16(vsum89ABCDEF)));
133 
134       vst1q_s32(b, vacc0123); b += 4;
135       vst1q_s32(b, vacc4567); b += 4;
136       vst1q_s32(b, vacc89AB); b += 4;
137       vst1q_s32(b, vaccCDEF); b += 4;
138     }
139   }
140 
141   i0 = (const uint8_t*) ((uintptr_t) i0 + input_increment);
142   i1 = (const uint8_t*) ((uintptr_t) i1 + input_increment);
143   if XNN_UNPREDICTABLE(rows < 2) {
144     i1 = zero;
145   }
146   i2 = (const uint8_t*) ((uintptr_t) i2 + input_increment);
147   if XNN_UNPREDICTABLE(rows <= 2) {
148     i2 = zero;
149   }
150   i3 = (const uint8_t*) ((uintptr_t) i3 + input_increment);
151   if XNN_UNPREDICTABLE(rows < 4) {
152     i3 = zero;
153   }
154   i4 = (const uint8_t*) ((uintptr_t) i4 + input_increment);
155   if XNN_UNPREDICTABLE(rows <= 4) {
156     i4 = zero;
157   }
158   i5 = (const uint8_t*) ((uintptr_t) i5 + input_increment);
159   if XNN_UNPREDICTABLE(rows < 6) {
160     i5 = zero;
161   }
162   i6 = (const uint8_t*) ((uintptr_t) i6 + input_increment);
163   if XNN_UNPREDICTABLE(rows <= 6) {
164     i6 = zero;
165   }
166 
167   const float32x4_t vscale = vld1q_dup_f32(&params->fp32_neon.scale);
168   const float32x4_t vmagic_bias = vld1q_dup_f32(&params->fp32_neon.magic_bias);
169   const int32x4_t vmagic_bias_less_output_zero_point = vld1q_dup_s32(&params->fp32_neon.magic_bias_less_output_zero_point);
170   const uint8x16_t voutput_min = vld1q_dup_u8(&params->fp32_neon.output_min);
171   const uint8x16_t voutput_max = vld1q_dup_u8(&params->fp32_neon.output_max);
172   for (; channels >= 16; channels -= 16) {
173     const uint8x8_t vi0x01234567 = vld1_u8(i0); i0 += 8;
174     const uint8x8_t vi0x89ABCDEF = vld1_u8(i0); i0 += 8;
175     const uint8x8_t vi1x01234567 = vld1_u8(i1); i1 += 8;
176     const uint8x8_t vi1x89ABCDEF = vld1_u8(i1); i1 += 8;
177 
178     const uint8x8_t vi2x01234567 = vld1_u8(i2); i2 += 8;
179     uint16x8_t vsum01234567 = vaddl_u8(vi0x01234567, vi1x01234567);
180     const uint8x8_t vi2x89ABCDEF = vld1_u8(i2); i2 += 8;
181     uint16x8_t vsum89ABCDEF = vaddl_u8(vi0x89ABCDEF, vi1x89ABCDEF);
182 
183     const uint8x8_t vi3x01234567 = vld1_u8(i3); i3 += 8;
184     vsum01234567 = vaddw_u8(vsum01234567, vi2x01234567);
185     const uint8x8_t vi3x89ABCDEF = vld1_u8(i3); i3 += 8;
186     vsum89ABCDEF = vaddw_u8(vsum89ABCDEF, vi2x89ABCDEF);
187     const uint8x8_t vi4x01234567 = vld1_u8(i4); i4 += 8;
188     vsum01234567 = vaddw_u8(vsum01234567, vi3x01234567);
189     const uint8x8_t vi4x89ABCDEF = vld1_u8(i4); i4 += 8;
190     vsum89ABCDEF = vaddw_u8(vsum89ABCDEF, vi3x89ABCDEF);
191     const uint8x8_t vi5x01234567 = vld1_u8(i5); i5 += 8;
192     vsum01234567 = vaddw_u8(vsum01234567, vi4x01234567);
193     const uint8x8_t vi5x89ABCDEF = vld1_u8(i5); i5 += 8;
194     vsum89ABCDEF = vaddw_u8(vsum89ABCDEF, vi4x89ABCDEF);
195     const uint8x8_t vi6x01234567 = vld1_u8(i6); i6 += 8;
196     vsum01234567 = vaddw_u8(vsum01234567, vi5x01234567);
197     const uint8x8_t vi6x89ABCDEF = vld1_u8(i6); i6 += 8;
198     vsum89ABCDEF = vaddw_u8(vsum89ABCDEF, vi5x89ABCDEF);
199     int32x4_t vacc0123 = vld1q_s32(buffer); buffer += 4;
200     int32x4_t vacc4567 = vld1q_s32(buffer); buffer += 4;
201     vsum01234567 = vaddw_u8(vsum01234567, vi6x01234567);
202     int32x4_t vacc89AB = vld1q_s32(buffer); buffer += 4;
203     int32x4_t vaccCDEF = vld1q_s32(buffer); buffer += 4;
204     vsum89ABCDEF = vaddw_u8(vsum89ABCDEF, vi6x89ABCDEF);
205 
206     vacc0123 = vreinterpretq_s32_u32(vaddw_u16(vreinterpretq_u32_s32(vacc0123), vget_low_u16(vsum01234567)));
207     vacc4567 = vreinterpretq_s32_u32(vaddw_u16(vreinterpretq_u32_s32(vacc4567), vget_high_u16(vsum01234567)));
208     vacc89AB = vreinterpretq_s32_u32(vaddw_u16(vreinterpretq_u32_s32(vacc89AB), vget_low_u16(vsum89ABCDEF)));
209     vaccCDEF = vreinterpretq_s32_u32(vaddw_u16(vreinterpretq_u32_s32(vaccCDEF), vget_high_u16(vsum89ABCDEF)));
210 
211     float32x4_t vfpacc0123 = vcvtq_f32_s32(vacc0123);
212     float32x4_t vfpacc4567 = vcvtq_f32_s32(vacc4567);
213     float32x4_t vfpacc89AB = vcvtq_f32_s32(vacc89AB);
214     float32x4_t vfpaccCDEF = vcvtq_f32_s32(vaccCDEF);
215 
216     vfpacc0123 = vmulq_f32(vfpacc0123, vscale);
217     vfpacc4567 = vmulq_f32(vfpacc4567, vscale);
218     vfpacc89AB = vmulq_f32(vfpacc89AB, vscale);
219     vfpaccCDEF = vmulq_f32(vfpaccCDEF, vscale);
220 
221     vacc0123 = vreinterpretq_s32_f32(vaddq_f32(vfpacc0123, vmagic_bias));
222     vacc4567 = vreinterpretq_s32_f32(vaddq_f32(vfpacc4567, vmagic_bias));
223     vacc89AB = vreinterpretq_s32_f32(vaddq_f32(vfpacc89AB, vmagic_bias));
224     vaccCDEF = vreinterpretq_s32_f32(vaddq_f32(vfpaccCDEF, vmagic_bias));
225 
226     vacc0123 = vqsubq_s32(vacc0123, vmagic_bias_less_output_zero_point);
227     vacc4567 = vqsubq_s32(vacc4567, vmagic_bias_less_output_zero_point);
228     vacc89AB = vqsubq_s32(vacc89AB, vmagic_bias_less_output_zero_point);
229     vaccCDEF = vqsubq_s32(vaccCDEF, vmagic_bias_less_output_zero_point);
230 
231     #if XNN_ARCH_ARM64
232       int16x8_t vacc01234567 = vqmovn_high_s32(vqmovn_s32(vacc0123), vacc4567);
233       int16x8_t vacc89ABCDEF = vqmovn_high_s32(vqmovn_s32(vacc89AB), vaccCDEF);
234     #else  // !XNN_ARCH_ARM64
235       int16x8_t vacc01234567 = vcombine_s16(vqmovn_s32(vacc0123), vqmovn_s32(vacc4567));
236       int16x8_t vacc89ABCDEF = vcombine_s16(vqmovn_s32(vacc89AB), vqmovn_s32(vaccCDEF));
237     #endif  // !XNN_ARCH_ARM64
238 
239 
240     #if XNN_ARCH_ARM64
241       uint8x16_t vout0123456789ABCDEF = vqmovun_high_s16(vqmovun_s16(vacc01234567), vacc89ABCDEF);
242     #else  // !XNN_ARCH_ARM64
243       uint8x16_t vout0123456789ABCDEF = vcombine_u8(vqmovun_s16(vacc01234567), vqmovun_s16(vacc89ABCDEF));
244     #endif  // !XNN_ARCH_ARM64
245 
246     vout0123456789ABCDEF = vmaxq_u8(vout0123456789ABCDEF, voutput_min);
247 
248     vout0123456789ABCDEF = vminq_u8(vout0123456789ABCDEF, voutput_max);
249 
250     vst1q_u8(output, vout0123456789ABCDEF); output += 16;
251   }
252   if XNN_UNLIKELY(channels != 0) {
253     do {
254       const uint8x8_t vi0x01234567 = vld1_u8(i0); i0 += 8;
255       const uint8x8_t vi1x01234567 = vld1_u8(i1); i1 += 8;
256       const uint8x8_t vi2x01234567 = vld1_u8(i2); i2 += 8;
257       uint16x8_t vsum01234567 = vaddl_u8(vi0x01234567, vi1x01234567);
258 
259       const uint8x8_t vi3x01234567 = vld1_u8(i3); i3 += 8;
260       vsum01234567 = vaddw_u8(vsum01234567, vi2x01234567);
261       const uint8x8_t vi4x01234567 = vld1_u8(i4); i4 += 8;
262       vsum01234567 = vaddw_u8(vsum01234567, vi3x01234567);
263       const uint8x8_t vi5x01234567 = vld1_u8(i5); i5 += 8;
264       vsum01234567 = vaddw_u8(vsum01234567, vi4x01234567);
265       const uint8x8_t vi6x01234567 = vld1_u8(i6); i6 += 8;
266       vsum01234567 = vaddw_u8(vsum01234567, vi5x01234567);
267       int32x4_t vacc0123 = vld1q_s32(buffer); buffer += 4;
268       int32x4_t vacc4567 = vld1q_s32(buffer); buffer += 4;
269       vsum01234567 = vaddw_u8(vsum01234567, vi6x01234567);
270 
271       vacc0123 = vreinterpretq_s32_u32(vaddw_u16(vreinterpretq_u32_s32(vacc0123), vget_low_u16(vsum01234567)));
272       vacc4567 = vreinterpretq_s32_u32(vaddw_u16(vreinterpretq_u32_s32(vacc4567), vget_high_u16(vsum01234567)));
273 
274       float32x4_t vfpacc0123 = vcvtq_f32_s32(vacc0123);
275       float32x4_t vfpacc4567 = vcvtq_f32_s32(vacc4567);
276 
277       vfpacc0123 = vmulq_f32(vfpacc0123, vscale);
278       vfpacc4567 = vmulq_f32(vfpacc4567, vscale);
279 
280       vacc0123 = vreinterpretq_s32_f32(vaddq_f32(vfpacc0123, vmagic_bias));
281       vacc4567 = vreinterpretq_s32_f32(vaddq_f32(vfpacc4567, vmagic_bias));
282 
283       vacc0123 = vqsubq_s32(vacc0123, vmagic_bias_less_output_zero_point);
284       vacc4567 = vqsubq_s32(vacc4567, vmagic_bias_less_output_zero_point);
285 
286       #if XNN_ARCH_ARM64
287         int16x8_t vacc01234567 = vqmovn_high_s32(vqmovn_s32(vacc0123), vacc4567);
288       #else
289         int16x8_t vacc01234567 = vcombine_s16(vqmovn_s32(vacc0123), vqmovn_s32(vacc4567));
290       #endif
291 
292       uint8x8_t vout01234567 = vqmovun_s16(vacc01234567);
293       vout01234567 = vmax_u8(vout01234567, vget_low_u8(voutput_min));
294       vout01234567 = vmin_u8(vout01234567, vget_low_u8(voutput_max));
295 
296       if XNN_LIKELY(channels >= 8) {
297         vst1_u8(output, vout01234567); output += 8;
298         channels -= 8;
299       } else {
300         if (channels & 4) {
301           vst1_lane_u32((void*) output, vreinterpret_u32_u8(vout01234567), 0); output += 4;
302           vout01234567 = vext_u8(vout01234567, vout01234567, 4);
303         }
304         if (channels & 2) {
305           vst1_lane_u16((void*) output, vreinterpret_u16_u8(vout01234567), 0); output += 2;
306           vout01234567 = vext_u8(vout01234567, vout01234567, 2);
307         }
308         if (channels & 1) {
309           vst1_lane_u8(output, vout01234567, 0); output += 1;
310         }
311         channels = 0;
312       }
313     } while (channels != 0);
314   }
315 }
316