xref: /aosp_15_r20/external/XNNPACK/src/qs8-igemm/gen/4x8c4s2-minmax-rndnu-neon-mull.c (revision 4bdc94577ba0e567308109d787f7fec7b531ce36)
1 // Auto-generated file. Do not edit!
2 //   Template: src/qs8-igemm/c4-neon-mull-shuffle.c.in
3 //   Generator: tools/xngen
4 //
5 // Copyright 2021 Google LLC
6 //
7 // This source code is licensed under the BSD-style license found in the
8 // LICENSE file in the root directory of this source tree.
9 
10 #include <assert.h>
11 
12 #include <arm_neon.h>
13 
14 #include <xnnpack/gemm.h>
15 #include <xnnpack/math.h>
16 
17 
xnn_qs8_igemm_minmax_rndnu_ukernel_4x8c4s2__neon_mull(size_t mr,size_t nc,size_t kc,size_t ks,const int8_t ** restrict a,const void * restrict w,int8_t * restrict c,size_t cm_stride,size_t cn_stride,size_t a_offset,const int8_t * zero,const union xnn_qs8_conv_minmax_params params[restrict XNN_MIN_ELEMENTS (1)])18 void xnn_qs8_igemm_minmax_rndnu_ukernel_4x8c4s2__neon_mull(
19     size_t mr,
20     size_t nc,
21     size_t kc,
22     size_t ks,
23     const int8_t** restrict a,
24     const void* restrict w,
25     int8_t* restrict c,
26     size_t cm_stride,
27     size_t cn_stride,
28     size_t a_offset,
29     const int8_t* zero,
30     const union xnn_qs8_conv_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_OOB_READS
31 {
32   assert(mr != 0);
33   assert(mr <= 4);
34   assert(nc != 0);
35   assert(kc != 0);
36   assert(ks != 0);
37   assert(ks % (4 * sizeof(void*)) == 0);
38   assert(a_offset % sizeof(int8_t) == 0);
39   assert(a != NULL);
40   assert(w != NULL);
41   assert(c != NULL);
42 
43   int8_t* c0 = c;
44   int8_t* c1 = (int8_t*) ((uintptr_t) c0 + cm_stride);
45   if XNN_UNPREDICTABLE(mr < 2) {
46     c1 = c0;
47   }
48   int8_t* c2 = (int8_t*) ((uintptr_t) c1 + cm_stride);
49   if XNN_UNPREDICTABLE(mr <= 2) {
50     c2 = c1;
51   }
52   int8_t* c3 = (int8_t*) ((uintptr_t) c2 + cm_stride);
53   if XNN_UNPREDICTABLE(mr != 4) {
54     c3 = c2;
55   }
56 
57   kc = round_up_po2(kc, 8 * sizeof(int8_t));
58   do {
59     int32x4_t vacc0x01 = vreinterpretq_s32_u64(vmovl_u32(vld1_u32(w))); w = (const int32_t*) w + 2;
60     int32x4_t vacc0x23 = vreinterpretq_s32_u64(vmovl_u32(vld1_u32(w))); w = (const int32_t*) w + 2;
61     int32x4_t vacc0x45 = vreinterpretq_s32_u64(vmovl_u32(vld1_u32(w))); w = (const int32_t*) w + 2;
62     int32x4_t vacc0x67 = vreinterpretq_s32_u64(vmovl_u32(vld1_u32(w))); w = (const int32_t*) w + 2;
63     int32x4_t vacc1x01 = vacc0x01;
64     int32x4_t vacc1x23 = vacc0x23;
65     int32x4_t vacc1x45 = vacc0x45;
66     int32x4_t vacc1x67 = vacc0x67;
67     int32x4_t vacc2x01 = vacc0x01;
68     int32x4_t vacc2x23 = vacc0x23;
69     int32x4_t vacc2x45 = vacc0x45;
70     int32x4_t vacc2x67 = vacc0x67;
71     int32x4_t vacc3x01 = vacc0x01;
72     int32x4_t vacc3x23 = vacc0x23;
73     int32x4_t vacc3x45 = vacc0x45;
74     int32x4_t vacc3x67 = vacc0x67;
75 
76     size_t p = ks;
77     do {
78       const int8_t* restrict a0 = a[0];
79       if XNN_UNPREDICTABLE(a0 != zero) {
80         a0 = (const int8_t*) ((uintptr_t) a0 + a_offset);
81       }
82       const int8_t* restrict a1 = a[1];
83       if XNN_UNPREDICTABLE(a1 != zero) {
84         a1 = (const int8_t*) ((uintptr_t) a1 + a_offset);
85       }
86       const int8_t* restrict a2 = a[2];
87       if XNN_UNPREDICTABLE(a2 != zero) {
88         a2 = (const int8_t*) ((uintptr_t) a2 + a_offset);
89       }
90       const int8_t* restrict a3 = a[3];
91       if XNN_UNPREDICTABLE(a3 != zero) {
92         a3 = (const int8_t*) ((uintptr_t) a3 + a_offset);
93       }
94       a += 4;
95 
96       size_t k = kc;
97       do {
98         int8x8_t va0x0 = vld1_s8(a0); a0 += 8;
99         int8x8_t va1x0 = vld1_s8(a1); a1 += 8;
100         int8x8_t va2x0 = vld1_s8(a2); a2 += 8;
101         int8x8_t va3x0 = vld1_s8(a3); a3 += 8;
102 
103         const int8x8_t vb01c0x0 = vld1_s8(w); w = (const int8_t*) w + 8;
104         const int8x8_t vb23c0x0 = vld1_s8(w); w = (const int8_t*) w + 8;
105         const int8x8_t vb45c0x0 = vld1_s8(w); w = (const int8_t*) w + 8;
106         const int8x8_t vb67c0x0 = vld1_s8(w); w = (const int8_t*) w + 8;
107         const int8x8_t vb01c1x0 = vld1_s8(w); w = (const int8_t*) w + 8;
108         const int8x8_t vb23c1x0 = vld1_s8(w); w = (const int8_t*) w + 8;
109         const int8x8_t vb45c1x0 = vld1_s8(w); w = (const int8_t*) w + 8;
110         const int8x8_t vb67c1x0 = vld1_s8(w); w = (const int8_t*) w + 8;
111 
112         int16x8_t vprod0x01c0 = vmull_s8(vb01c0x0, va0x0);
113         int16x8_t vprod1x01c0 = vmull_s8(vb01c0x0, va1x0);
114         int16x8_t vprod2x01c0 = vmull_s8(vb01c0x0, va2x0);
115         int16x8_t vprod3x01c0 = vmull_s8(vb01c0x0, va3x0);
116         vacc0x01 = vpadalq_s16(vacc0x01, vprod0x01c0);
117         vacc1x01 = vpadalq_s16(vacc1x01, vprod1x01c0);
118         vacc2x01 = vpadalq_s16(vacc2x01, vprod2x01c0);
119         vacc3x01 = vpadalq_s16(vacc3x01, vprod3x01c0);
120         int16x8_t vprod0x23c0 = vmull_s8(vb23c0x0, va0x0);
121         int16x8_t vprod1x23c0 = vmull_s8(vb23c0x0, va1x0);
122         int16x8_t vprod2x23c0 = vmull_s8(vb23c0x0, va2x0);
123         int16x8_t vprod3x23c0 = vmull_s8(vb23c0x0, va3x0);
124         vacc0x23 = vpadalq_s16(vacc0x23, vprod0x23c0);
125         vacc1x23 = vpadalq_s16(vacc1x23, vprod1x23c0);
126         vacc2x23 = vpadalq_s16(vacc2x23, vprod2x23c0);
127         vacc3x23 = vpadalq_s16(vacc3x23, vprod3x23c0);
128         int16x8_t vprod0x45c0 = vmull_s8(vb45c0x0, va0x0);
129         int16x8_t vprod1x45c0 = vmull_s8(vb45c0x0, va1x0);
130         int16x8_t vprod2x45c0 = vmull_s8(vb45c0x0, va2x0);
131         int16x8_t vprod3x45c0 = vmull_s8(vb45c0x0, va3x0);
132         vacc0x45 = vpadalq_s16(vacc0x45, vprod0x45c0);
133         vacc1x45 = vpadalq_s16(vacc1x45, vprod1x45c0);
134         vacc2x45 = vpadalq_s16(vacc2x45, vprod2x45c0);
135         vacc3x45 = vpadalq_s16(vacc3x45, vprod3x45c0);
136         int16x8_t vprod0x67c0 = vmull_s8(vb67c0x0, va0x0);
137         int16x8_t vprod1x67c0 = vmull_s8(vb67c0x0, va1x0);
138         int16x8_t vprod2x67c0 = vmull_s8(vb67c0x0, va2x0);
139         int16x8_t vprod3x67c0 = vmull_s8(vb67c0x0, va3x0);
140         vacc0x67 = vpadalq_s16(vacc0x67, vprod0x67c0);
141         vacc1x67 = vpadalq_s16(vacc1x67, vprod1x67c0);
142         vacc2x67 = vpadalq_s16(vacc2x67, vprod2x67c0);
143         vacc3x67 = vpadalq_s16(vacc3x67, vprod3x67c0);
144         va0x0 = vext_s8(va0x0, va0x0, 4);
145         va1x0 = vext_s8(va1x0, va1x0, 4);
146         va2x0 = vext_s8(va2x0, va2x0, 4);
147         va3x0 = vext_s8(va3x0, va3x0, 4);
148         int16x8_t vprod0x01c1 = vmull_s8(vb01c1x0, va0x0);
149         int16x8_t vprod1x01c1 = vmull_s8(vb01c1x0, va1x0);
150         int16x8_t vprod2x01c1 = vmull_s8(vb01c1x0, va2x0);
151         int16x8_t vprod3x01c1 = vmull_s8(vb01c1x0, va3x0);
152         vacc0x01 = vpadalq_s16(vacc0x01, vprod0x01c1);
153         vacc1x01 = vpadalq_s16(vacc1x01, vprod1x01c1);
154         vacc2x01 = vpadalq_s16(vacc2x01, vprod2x01c1);
155         vacc3x01 = vpadalq_s16(vacc3x01, vprod3x01c1);
156         int16x8_t vprod0x23c1 = vmull_s8(vb23c1x0, va0x0);
157         int16x8_t vprod1x23c1 = vmull_s8(vb23c1x0, va1x0);
158         int16x8_t vprod2x23c1 = vmull_s8(vb23c1x0, va2x0);
159         int16x8_t vprod3x23c1 = vmull_s8(vb23c1x0, va3x0);
160         vacc0x23 = vpadalq_s16(vacc0x23, vprod0x23c1);
161         vacc1x23 = vpadalq_s16(vacc1x23, vprod1x23c1);
162         vacc2x23 = vpadalq_s16(vacc2x23, vprod2x23c1);
163         vacc3x23 = vpadalq_s16(vacc3x23, vprod3x23c1);
164         int16x8_t vprod0x45c1 = vmull_s8(vb45c1x0, va0x0);
165         int16x8_t vprod1x45c1 = vmull_s8(vb45c1x0, va1x0);
166         int16x8_t vprod2x45c1 = vmull_s8(vb45c1x0, va2x0);
167         int16x8_t vprod3x45c1 = vmull_s8(vb45c1x0, va3x0);
168         vacc0x45 = vpadalq_s16(vacc0x45, vprod0x45c1);
169         vacc1x45 = vpadalq_s16(vacc1x45, vprod1x45c1);
170         vacc2x45 = vpadalq_s16(vacc2x45, vprod2x45c1);
171         vacc3x45 = vpadalq_s16(vacc3x45, vprod3x45c1);
172         int16x8_t vprod0x67c1 = vmull_s8(vb67c1x0, va0x0);
173         int16x8_t vprod1x67c1 = vmull_s8(vb67c1x0, va1x0);
174         int16x8_t vprod2x67c1 = vmull_s8(vb67c1x0, va2x0);
175         int16x8_t vprod3x67c1 = vmull_s8(vb67c1x0, va3x0);
176         vacc0x67 = vpadalq_s16(vacc0x67, vprod0x67c1);
177         vacc1x67 = vpadalq_s16(vacc1x67, vprod1x67c1);
178         vacc2x67 = vpadalq_s16(vacc2x67, vprod2x67c1);
179         vacc3x67 = vpadalq_s16(vacc3x67, vprod3x67c1);
180 
181         k -= 8 * sizeof(int8_t);
182       } while (k != 0);
183 
184       p -= 4 * sizeof(void*);
185     } while (p != 0);
186 
187 #if XNN_ARCH_ARM64
188     int32x4_t vacc0x0123 = vpaddq_s32(vacc0x01, vacc0x23);
189     int32x4_t vacc0x4567 = vpaddq_s32(vacc0x45, vacc0x67);
190     int32x4_t vacc1x0123 = vpaddq_s32(vacc1x01, vacc1x23);
191     int32x4_t vacc1x4567 = vpaddq_s32(vacc1x45, vacc1x67);
192     int32x4_t vacc2x0123 = vpaddq_s32(vacc2x01, vacc2x23);
193     int32x4_t vacc2x4567 = vpaddq_s32(vacc2x45, vacc2x67);
194     int32x4_t vacc3x0123 = vpaddq_s32(vacc3x01, vacc3x23);
195     int32x4_t vacc3x4567 = vpaddq_s32(vacc3x45, vacc3x67);
196 #else
197     const int32x2_t vsum0x01 = vpadd_s32(vget_low_s32(vacc0x01), vget_high_s32(vacc0x01));
198     const int32x2_t vsum0x23 = vpadd_s32(vget_low_s32(vacc0x23), vget_high_s32(vacc0x23));
199     int32x4_t vacc0x0123 = vcombine_s32(vsum0x01, vsum0x23);
200     const int32x2_t vsum0x45 = vpadd_s32(vget_low_s32(vacc0x45), vget_high_s32(vacc0x45));
201     const int32x2_t vsum0x67 = vpadd_s32(vget_low_s32(vacc0x67), vget_high_s32(vacc0x67));
202     int32x4_t vacc0x4567 = vcombine_s32(vsum0x45, vsum0x67);
203     const int32x2_t vsum1x01 = vpadd_s32(vget_low_s32(vacc1x01), vget_high_s32(vacc1x01));
204     const int32x2_t vsum1x23 = vpadd_s32(vget_low_s32(vacc1x23), vget_high_s32(vacc1x23));
205     int32x4_t vacc1x0123 = vcombine_s32(vsum1x01, vsum1x23);
206     const int32x2_t vsum1x45 = vpadd_s32(vget_low_s32(vacc1x45), vget_high_s32(vacc1x45));
207     const int32x2_t vsum1x67 = vpadd_s32(vget_low_s32(vacc1x67), vget_high_s32(vacc1x67));
208     int32x4_t vacc1x4567 = vcombine_s32(vsum1x45, vsum1x67);
209     const int32x2_t vsum2x01 = vpadd_s32(vget_low_s32(vacc2x01), vget_high_s32(vacc2x01));
210     const int32x2_t vsum2x23 = vpadd_s32(vget_low_s32(vacc2x23), vget_high_s32(vacc2x23));
211     int32x4_t vacc2x0123 = vcombine_s32(vsum2x01, vsum2x23);
212     const int32x2_t vsum2x45 = vpadd_s32(vget_low_s32(vacc2x45), vget_high_s32(vacc2x45));
213     const int32x2_t vsum2x67 = vpadd_s32(vget_low_s32(vacc2x67), vget_high_s32(vacc2x67));
214     int32x4_t vacc2x4567 = vcombine_s32(vsum2x45, vsum2x67);
215     const int32x2_t vsum3x01 = vpadd_s32(vget_low_s32(vacc3x01), vget_high_s32(vacc3x01));
216     const int32x2_t vsum3x23 = vpadd_s32(vget_low_s32(vacc3x23), vget_high_s32(vacc3x23));
217     int32x4_t vacc3x0123 = vcombine_s32(vsum3x01, vsum3x23);
218     const int32x2_t vsum3x45 = vpadd_s32(vget_low_s32(vacc3x45), vget_high_s32(vacc3x45));
219     const int32x2_t vsum3x67 = vpadd_s32(vget_low_s32(vacc3x67), vget_high_s32(vacc3x67));
220     int32x4_t vacc3x4567 = vcombine_s32(vsum3x45, vsum3x67);
221 #endif
222 
223     const int32x4_t vright_pre_shift = vld1q_dup_s32(&params->rndnu_neon.right_pre_shift);
224     const int32x4_t vmultiplier = vld1q_dup_s32(&params->rndnu_neon.multiplier);
225     const int32x4_t vright_post_shift = vld1q_dup_s32(&params->rndnu_neon.right_post_shift);
226 
227     vacc0x0123 = vqshlq_s32(vacc0x0123, vright_pre_shift);
228     vacc0x4567 = vqshlq_s32(vacc0x4567, vright_pre_shift);
229     vacc1x0123 = vqshlq_s32(vacc1x0123, vright_pre_shift);
230     vacc1x4567 = vqshlq_s32(vacc1x4567, vright_pre_shift);
231     vacc2x0123 = vqshlq_s32(vacc2x0123, vright_pre_shift);
232     vacc2x4567 = vqshlq_s32(vacc2x4567, vright_pre_shift);
233     vacc3x0123 = vqshlq_s32(vacc3x0123, vright_pre_shift);
234     vacc3x4567 = vqshlq_s32(vacc3x4567, vright_pre_shift);
235 
236     vacc0x0123 = vqdmulhq_s32(vacc0x0123, vmultiplier);
237     vacc0x4567 = vqdmulhq_s32(vacc0x4567, vmultiplier);
238     vacc1x0123 = vqdmulhq_s32(vacc1x0123, vmultiplier);
239     vacc1x4567 = vqdmulhq_s32(vacc1x4567, vmultiplier);
240     vacc2x0123 = vqdmulhq_s32(vacc2x0123, vmultiplier);
241     vacc2x4567 = vqdmulhq_s32(vacc2x4567, vmultiplier);
242     vacc3x0123 = vqdmulhq_s32(vacc3x0123, vmultiplier);
243     vacc3x4567 = vqdmulhq_s32(vacc3x4567, vmultiplier);
244 
245     vacc0x0123 = vrshlq_s32(vacc0x0123, vright_post_shift);
246     vacc0x4567 = vrshlq_s32(vacc0x4567, vright_post_shift);
247     vacc1x0123 = vrshlq_s32(vacc1x0123, vright_post_shift);
248     vacc1x4567 = vrshlq_s32(vacc1x4567, vright_post_shift);
249     vacc2x0123 = vrshlq_s32(vacc2x0123, vright_post_shift);
250     vacc2x4567 = vrshlq_s32(vacc2x4567, vright_post_shift);
251     vacc3x0123 = vrshlq_s32(vacc3x0123, vright_post_shift);
252     vacc3x4567 = vrshlq_s32(vacc3x4567, vright_post_shift);
253 
254     const int16x8_t voutput_zero_point = vld1q_dup_s16(&params->rndnu_neon.output_zero_point);
255 #if XNN_ARCH_ARM64
256     int16x8_t vacc0x01234567 = vqmovn_high_s32(vqmovn_s32(vacc0x0123), vacc0x4567);
257     int16x8_t vacc1x01234567 = vqmovn_high_s32(vqmovn_s32(vacc1x0123), vacc1x4567);
258     int16x8_t vacc2x01234567 = vqmovn_high_s32(vqmovn_s32(vacc2x0123), vacc2x4567);
259     int16x8_t vacc3x01234567 = vqmovn_high_s32(vqmovn_s32(vacc3x0123), vacc3x4567);
260 
261     vacc0x01234567 = vqaddq_s16(vacc0x01234567, voutput_zero_point);
262     vacc1x01234567 = vqaddq_s16(vacc1x01234567, voutput_zero_point);
263     vacc2x01234567 = vqaddq_s16(vacc2x01234567, voutput_zero_point);
264     vacc3x01234567 = vqaddq_s16(vacc3x01234567, voutput_zero_point);
265 
266     int8x16_t vout0x01234567_1x01234567 = vqmovn_high_s16(vqmovn_s16(vacc0x01234567), vacc1x01234567);
267     int8x16_t vout2x01234567_3x01234567 = vqmovn_high_s16(vqmovn_s16(vacc2x01234567), vacc3x01234567);
268 #else
269     int16x8_t vacc0x01234567 = vcombine_s16(vqmovn_s32(vacc0x0123), vqmovn_s32(vacc0x4567));
270     int16x8_t vacc1x01234567 = vcombine_s16(vqmovn_s32(vacc1x0123), vqmovn_s32(vacc1x4567));
271     int16x8_t vacc2x01234567 = vcombine_s16(vqmovn_s32(vacc2x0123), vqmovn_s32(vacc2x4567));
272     int16x8_t vacc3x01234567 = vcombine_s16(vqmovn_s32(vacc3x0123), vqmovn_s32(vacc3x4567));
273 
274     vacc0x01234567 = vqaddq_s16(vacc0x01234567, voutput_zero_point);
275     vacc1x01234567 = vqaddq_s16(vacc1x01234567, voutput_zero_point);
276     vacc2x01234567 = vqaddq_s16(vacc2x01234567, voutput_zero_point);
277     vacc3x01234567 = vqaddq_s16(vacc3x01234567, voutput_zero_point);
278 
279     int8x16_t vout0x01234567_1x01234567 = vcombine_s8(vqmovn_s16(vacc0x01234567), vqmovn_s16(vacc1x01234567));
280     int8x16_t vout2x01234567_3x01234567 = vcombine_s8(vqmovn_s16(vacc2x01234567), vqmovn_s16(vacc3x01234567));
281 #endif
282 
283     const int8x16_t voutput_min = vld1q_dup_s8(&params->rndnu_neon.output_min);
284     vout0x01234567_1x01234567 = vmaxq_s8(vout0x01234567_1x01234567, voutput_min);
285     vout2x01234567_3x01234567 = vmaxq_s8(vout2x01234567_3x01234567, voutput_min);
286 
287     const int8x16_t voutput_max = vld1q_dup_s8(&params->rndnu_neon.output_max);
288     vout0x01234567_1x01234567 = vminq_s8(vout0x01234567_1x01234567, voutput_max);
289     vout2x01234567_3x01234567 = vminq_s8(vout2x01234567_3x01234567, voutput_max);
290 
291     if (nc >= 8) {
292       vst1_s8(c3 + 0, vget_high_s8(vout2x01234567_3x01234567));
293       vst1_s8(c2 + 0, vget_low_s8(vout2x01234567_3x01234567));
294       vst1_s8(c1 + 0, vget_high_s8(vout0x01234567_1x01234567));
295       vst1_s8(c0 + 0, vget_low_s8(vout0x01234567_1x01234567));
296 
297       c3 = (int8_t*) ((uintptr_t) c3 + cn_stride);
298       c2 = (int8_t*) ((uintptr_t) c2 + cn_stride);
299       c1 = (int8_t*) ((uintptr_t) c1 + cn_stride);
300       c0 = (int8_t*) ((uintptr_t) c0 + cn_stride);
301 
302       a = (const int8_t**restrict) ((uintptr_t) a - ks);
303 
304       nc -= 8;
305     } else {
306       if (nc & 4) {
307         vst1q_lane_u32((void*) c3, vreinterpretq_u32_s8(vout2x01234567_3x01234567), 2); c3 += 4;
308         vst1q_lane_u32((void*) c2, vreinterpretq_u32_s8(vout2x01234567_3x01234567), 0); c2 += 4;
309         vst1q_lane_u32((void*) c1, vreinterpretq_u32_s8(vout0x01234567_1x01234567), 2); c1 += 4;
310         vst1q_lane_u32((void*) c0, vreinterpretq_u32_s8(vout0x01234567_1x01234567), 0); c0 += 4;
311         vout2x01234567_3x01234567 = vextq_s8(vout2x01234567_3x01234567, vout2x01234567_3x01234567, 4);
312         vout0x01234567_1x01234567 = vextq_s8(vout0x01234567_1x01234567, vout0x01234567_1x01234567, 4);
313       }
314       if (nc & 2) {
315         vst1q_lane_u16((void*) c3, vreinterpretq_u16_s8(vout2x01234567_3x01234567), 4); c3 += 2;
316         vst1q_lane_u16((void*) c2, vreinterpretq_u16_s8(vout2x01234567_3x01234567), 0); c2 += 2;
317         vst1q_lane_u16((void*) c1, vreinterpretq_u16_s8(vout0x01234567_1x01234567), 4); c1 += 2;
318         vst1q_lane_u16((void*) c0, vreinterpretq_u16_s8(vout0x01234567_1x01234567), 0); c0 += 2;
319         vout2x01234567_3x01234567 = vextq_s8(vout2x01234567_3x01234567, vout2x01234567_3x01234567, 2);
320         vout0x01234567_1x01234567 = vextq_s8(vout0x01234567_1x01234567, vout0x01234567_1x01234567, 2);
321       }
322       if (nc & 1) {
323         vst1q_lane_s8(c3, vout2x01234567_3x01234567, 8);
324         vst1q_lane_s8(c2, vout2x01234567_3x01234567, 0);
325         vst1q_lane_s8(c1, vout0x01234567_1x01234567, 8);
326         vst1q_lane_s8(c0, vout0x01234567_1x01234567, 0);
327       }
328 
329       nc = 0;
330     }
331   } while (nc != 0);
332 }
333