1 // Auto-generated file. Do not edit!
2 // Template: src/qs8-igemm/c8-neon-mull.c.in
3 // Generator: tools/xngen
4 //
5 // Copyright 2021 Google LLC
6 //
7 // This source code is licensed under the BSD-style license found in the
8 // LICENSE file in the root directory of this source tree.
9
10 #include <assert.h>
11
12 #include <arm_neon.h>
13
14 #include <xnnpack/igemm.h>
15 #include <xnnpack/math.h>
16
17
xnn_qs8_igemm_minmax_rndnu_ukernel_2x8c8__neon_mull(size_t mr,size_t nc,size_t kc,size_t ks,const int8_t ** restrict a,const void * restrict w,int8_t * restrict c,size_t cm_stride,size_t cn_stride,size_t a_offset,const int8_t * zero,const union xnn_qs8_conv_minmax_params params[restrict XNN_MIN_ELEMENTS (1)])18 void xnn_qs8_igemm_minmax_rndnu_ukernel_2x8c8__neon_mull(
19 size_t mr,
20 size_t nc,
21 size_t kc,
22 size_t ks,
23 const int8_t** restrict a,
24 const void* restrict w,
25 int8_t* restrict c,
26 size_t cm_stride,
27 size_t cn_stride,
28 size_t a_offset,
29 const int8_t* zero,
30 const union xnn_qs8_conv_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_OOB_READS
31 {
32 assert(mr != 0);
33 assert(mr <= 2);
34 assert(nc != 0);
35 assert(kc != 0);
36 assert(ks != 0);
37 assert(ks % (2 * sizeof(void*)) == 0);
38 assert(a_offset % sizeof(int8_t) == 0);
39 assert(a != NULL);
40 assert(w != NULL);
41 assert(c != NULL);
42
43 kc = round_up_po2(kc, 8 * sizeof(int8_t));
44 int8_t* c0 = c;
45 int8_t* c1 = (int8_t*) ((uintptr_t) c0 + cm_stride);
46 if XNN_UNPREDICTABLE(mr != 2) {
47 c1 = c0;
48 }
49
50 do {
51 int32x4_t vacc0x0 = vld1q_lane_s32(w, vmovq_n_s32(0), 0); w = (const void*) ((uintptr_t) w + sizeof(int32_t));
52 int32x4_t vacc0x1 = vld1q_lane_s32(w, vmovq_n_s32(0), 0); w = (const void*) ((uintptr_t) w + sizeof(int32_t));
53 int32x4_t vacc0x2 = vld1q_lane_s32(w, vmovq_n_s32(0), 0); w = (const void*) ((uintptr_t) w + sizeof(int32_t));
54 int32x4_t vacc0x3 = vld1q_lane_s32(w, vmovq_n_s32(0), 0); w = (const void*) ((uintptr_t) w + sizeof(int32_t));
55 int32x4_t vacc0x4 = vld1q_lane_s32(w, vmovq_n_s32(0), 0); w = (const void*) ((uintptr_t) w + sizeof(int32_t));
56 int32x4_t vacc0x5 = vld1q_lane_s32(w, vmovq_n_s32(0), 0); w = (const void*) ((uintptr_t) w + sizeof(int32_t));
57 int32x4_t vacc0x6 = vld1q_lane_s32(w, vmovq_n_s32(0), 0); w = (const void*) ((uintptr_t) w + sizeof(int32_t));
58 int32x4_t vacc0x7 = vld1q_lane_s32(w, vmovq_n_s32(0), 0); w = (const void*) ((uintptr_t) w + sizeof(int32_t));
59 int32x4_t vacc1x0 = vacc0x0;
60 int32x4_t vacc1x1 = vacc0x1;
61 int32x4_t vacc1x2 = vacc0x2;
62 int32x4_t vacc1x3 = vacc0x3;
63 int32x4_t vacc1x4 = vacc0x4;
64 int32x4_t vacc1x5 = vacc0x5;
65 int32x4_t vacc1x6 = vacc0x6;
66 int32x4_t vacc1x7 = vacc0x7;
67
68 size_t p = ks;
69 do {
70 const int8_t* restrict a0 = a[0];
71 if XNN_UNPREDICTABLE(a0 != zero) {
72 a0 = (const int8_t*) ((uintptr_t) a0 + a_offset);
73 }
74 const int8_t* restrict a1 = a[1];
75 if XNN_UNPREDICTABLE(a1 != zero) {
76 a1 = (const int8_t*) ((uintptr_t) a1 + a_offset);
77 }
78 a += 2;
79
80 size_t k = kc;
81
82 // Handle 8 bytes at a time using MUL.
83 while (k != 0) {
84 const int8x8_t va0 = vld1_s8(a0); a0 += 8;
85 const int8x8_t va1 = vld1_s8(a1); a1 += 8;
86
87 const int8x8_t vb0 = vld1_s8(w); w = (const void*) ((uintptr_t) w + 8 * sizeof(int8_t));
88 const int16x8_t vprod0x0 = vmull_s8(vb0, va0);
89 const int16x8_t vprod1x0 = vmull_s8(vb0, va1);
90 vacc0x0 = vpadalq_s16(vacc0x0, vprod0x0);
91 vacc1x0 = vpadalq_s16(vacc1x0, vprod1x0);
92 const int8x8_t vb1 = vld1_s8(w); w = (const void*) ((uintptr_t) w + 8 * sizeof(int8_t));
93 const int16x8_t vprod0x1 = vmull_s8(vb1, va0);
94 const int16x8_t vprod1x1 = vmull_s8(vb1, va1);
95 vacc0x1 = vpadalq_s16(vacc0x1, vprod0x1);
96 vacc1x1 = vpadalq_s16(vacc1x1, vprod1x1);
97 const int8x8_t vb2 = vld1_s8(w); w = (const void*) ((uintptr_t) w + 8 * sizeof(int8_t));
98 const int16x8_t vprod0x2 = vmull_s8(vb2, va0);
99 const int16x8_t vprod1x2 = vmull_s8(vb2, va1);
100 vacc0x2 = vpadalq_s16(vacc0x2, vprod0x2);
101 vacc1x2 = vpadalq_s16(vacc1x2, vprod1x2);
102 const int8x8_t vb3 = vld1_s8(w); w = (const void*) ((uintptr_t) w + 8 * sizeof(int8_t));
103 const int16x8_t vprod0x3 = vmull_s8(vb3, va0);
104 const int16x8_t vprod1x3 = vmull_s8(vb3, va1);
105 vacc0x3 = vpadalq_s16(vacc0x3, vprod0x3);
106 vacc1x3 = vpadalq_s16(vacc1x3, vprod1x3);
107 const int8x8_t vb4 = vld1_s8(w); w = (const void*) ((uintptr_t) w + 8 * sizeof(int8_t));
108 const int16x8_t vprod0x4 = vmull_s8(vb4, va0);
109 const int16x8_t vprod1x4 = vmull_s8(vb4, va1);
110 vacc0x4 = vpadalq_s16(vacc0x4, vprod0x4);
111 vacc1x4 = vpadalq_s16(vacc1x4, vprod1x4);
112 const int8x8_t vb5 = vld1_s8(w); w = (const void*) ((uintptr_t) w + 8 * sizeof(int8_t));
113 const int16x8_t vprod0x5 = vmull_s8(vb5, va0);
114 const int16x8_t vprod1x5 = vmull_s8(vb5, va1);
115 vacc0x5 = vpadalq_s16(vacc0x5, vprod0x5);
116 vacc1x5 = vpadalq_s16(vacc1x5, vprod1x5);
117 const int8x8_t vb6 = vld1_s8(w); w = (const void*) ((uintptr_t) w + 8 * sizeof(int8_t));
118 const int16x8_t vprod0x6 = vmull_s8(vb6, va0);
119 const int16x8_t vprod1x6 = vmull_s8(vb6, va1);
120 vacc0x6 = vpadalq_s16(vacc0x6, vprod0x6);
121 vacc1x6 = vpadalq_s16(vacc1x6, vprod1x6);
122 const int8x8_t vb7 = vld1_s8(w); w = (const void*) ((uintptr_t) w + 8 * sizeof(int8_t));
123 const int16x8_t vprod0x7 = vmull_s8(vb7, va0);
124 const int16x8_t vprod1x7 = vmull_s8(vb7, va1);
125 vacc0x7 = vpadalq_s16(vacc0x7, vprod0x7);
126 vacc1x7 = vpadalq_s16(vacc1x7, vprod1x7);
127
128 k -= 8 * sizeof(int8_t);
129 }
130
131 p -= 2 * sizeof(void*);
132 } while (p != 0);
133
134 #if XNN_ARCH_ARM64
135 const int32x4_t vsum0x01 = vpaddq_s32(vacc0x0, vacc0x1);
136 const int32x4_t vsum0x23 = vpaddq_s32(vacc0x2, vacc0x3);
137 const int32x4_t vsum0x45 = vpaddq_s32(vacc0x4, vacc0x5);
138 const int32x4_t vsum0x67 = vpaddq_s32(vacc0x6, vacc0x7);
139 const int32x4_t vsum1x01 = vpaddq_s32(vacc1x0, vacc1x1);
140 const int32x4_t vsum1x23 = vpaddq_s32(vacc1x2, vacc1x3);
141 const int32x4_t vsum1x45 = vpaddq_s32(vacc1x4, vacc1x5);
142 const int32x4_t vsum1x67 = vpaddq_s32(vacc1x6, vacc1x7);
143
144 int32x4_t vacc0x0123 = vpaddq_s32(vsum0x01, vsum0x23);
145 int32x4_t vacc0x4567 = vpaddq_s32(vsum0x45, vsum0x67);
146 int32x4_t vacc1x0123 = vpaddq_s32(vsum1x01, vsum1x23);
147 int32x4_t vacc1x4567 = vpaddq_s32(vsum1x45, vsum1x67);
148 #else
149 const int32x2_t vpsum0x0 = vadd_s32(vget_low_s32(vacc0x0), vget_high_s32(vacc0x0));
150 const int32x2_t vpsum0x1 = vadd_s32(vget_low_s32(vacc0x1), vget_high_s32(vacc0x1));
151 const int32x2_t vpsum0x2 = vadd_s32(vget_low_s32(vacc0x2), vget_high_s32(vacc0x2));
152 const int32x2_t vpsum0x3 = vadd_s32(vget_low_s32(vacc0x3), vget_high_s32(vacc0x3));
153 const int32x2_t vsum0x01 = vpadd_s32(vpsum0x0, vpsum0x1);
154 const int32x2_t vsum0x23 = vpadd_s32(vpsum0x2, vpsum0x3);
155 int32x4_t vacc0x0123 = vcombine_s32(vsum0x01, vsum0x23 );
156 const int32x2_t vpsum0x4 = vadd_s32(vget_low_s32(vacc0x4), vget_high_s32(vacc0x4));
157 const int32x2_t vpsum0x5 = vadd_s32(vget_low_s32(vacc0x5), vget_high_s32(vacc0x5));
158 const int32x2_t vpsum0x6 = vadd_s32(vget_low_s32(vacc0x6), vget_high_s32(vacc0x6));
159 const int32x2_t vpsum0x7 = vadd_s32(vget_low_s32(vacc0x7), vget_high_s32(vacc0x7));
160 const int32x2_t vsum0x45 = vpadd_s32(vpsum0x4, vpsum0x5);
161 const int32x2_t vsum0x67 = vpadd_s32(vpsum0x6, vpsum0x7);
162 int32x4_t vacc0x4567 = vcombine_s32(vsum0x45, vsum0x67 );
163 const int32x2_t vpsum1x0 = vadd_s32(vget_low_s32(vacc1x0), vget_high_s32(vacc1x0));
164 const int32x2_t vpsum1x1 = vadd_s32(vget_low_s32(vacc1x1), vget_high_s32(vacc1x1));
165 const int32x2_t vpsum1x2 = vadd_s32(vget_low_s32(vacc1x2), vget_high_s32(vacc1x2));
166 const int32x2_t vpsum1x3 = vadd_s32(vget_low_s32(vacc1x3), vget_high_s32(vacc1x3));
167 const int32x2_t vsum1x01 = vpadd_s32(vpsum1x0, vpsum1x1);
168 const int32x2_t vsum1x23 = vpadd_s32(vpsum1x2, vpsum1x3);
169 int32x4_t vacc1x0123 = vcombine_s32(vsum1x01, vsum1x23 );
170 const int32x2_t vpsum1x4 = vadd_s32(vget_low_s32(vacc1x4), vget_high_s32(vacc1x4));
171 const int32x2_t vpsum1x5 = vadd_s32(vget_low_s32(vacc1x5), vget_high_s32(vacc1x5));
172 const int32x2_t vpsum1x6 = vadd_s32(vget_low_s32(vacc1x6), vget_high_s32(vacc1x6));
173 const int32x2_t vpsum1x7 = vadd_s32(vget_low_s32(vacc1x7), vget_high_s32(vacc1x7));
174 const int32x2_t vsum1x45 = vpadd_s32(vpsum1x4, vpsum1x5);
175 const int32x2_t vsum1x67 = vpadd_s32(vpsum1x6, vpsum1x7);
176 int32x4_t vacc1x4567 = vcombine_s32(vsum1x45, vsum1x67 );
177 #endif
178
179 const int32x4_t vright_pre_shift = vld1q_dup_s32(¶ms->rndnu_neon.right_pre_shift);
180 const int32x4_t vmultiplier = vld1q_dup_s32(¶ms->rndnu_neon.multiplier);
181 const int32x4_t vright_post_shift = vld1q_dup_s32(¶ms->rndnu_neon.right_post_shift);
182
183 vacc0x0123 = vqshlq_s32(vacc0x0123, vright_pre_shift);
184 vacc0x4567 = vqshlq_s32(vacc0x4567, vright_pre_shift);
185 vacc1x0123 = vqshlq_s32(vacc1x0123, vright_pre_shift);
186 vacc1x4567 = vqshlq_s32(vacc1x4567, vright_pre_shift);
187
188 vacc0x0123 = vqdmulhq_s32(vacc0x0123, vmultiplier);
189 vacc0x4567 = vqdmulhq_s32(vacc0x4567, vmultiplier);
190 vacc1x0123 = vqdmulhq_s32(vacc1x0123, vmultiplier);
191 vacc1x4567 = vqdmulhq_s32(vacc1x4567, vmultiplier);
192
193 vacc0x0123 = vrshlq_s32(vacc0x0123, vright_post_shift);
194 vacc0x4567 = vrshlq_s32(vacc0x4567, vright_post_shift);
195 vacc1x0123 = vrshlq_s32(vacc1x0123, vright_post_shift);
196 vacc1x4567 = vrshlq_s32(vacc1x4567, vright_post_shift);
197
198 const int16x8_t voutput_zero_point = vld1q_dup_s16(¶ms->rndnu_neon.output_zero_point);
199 #if XNN_ARCH_ARM64
200 int16x8_t vacc0x01234567 = vqmovn_high_s32(vqmovn_s32(vacc0x0123), vacc0x4567);
201 int16x8_t vacc1x01234567 = vqmovn_high_s32(vqmovn_s32(vacc1x0123), vacc1x4567);
202
203 vacc0x01234567 = vqaddq_s16(vacc0x01234567, voutput_zero_point);
204 vacc1x01234567 = vqaddq_s16(vacc1x01234567, voutput_zero_point);
205
206 int8x16_t vout0x01234567_1x01234567 = vqmovn_high_s16(vqmovn_s16(vacc0x01234567), vacc1x01234567);
207 #else
208 int16x8_t vacc0x01234567 = vcombine_s16(vqmovn_s32(vacc0x0123), vqmovn_s32(vacc0x4567));
209 int16x8_t vacc1x01234567 = vcombine_s16(vqmovn_s32(vacc1x0123), vqmovn_s32(vacc1x4567));
210
211 vacc0x01234567 = vqaddq_s16(vacc0x01234567, voutput_zero_point);
212 vacc1x01234567 = vqaddq_s16(vacc1x01234567, voutput_zero_point);
213
214 int8x16_t vout0x01234567_1x01234567 = vcombine_s8(vqmovn_s16(vacc0x01234567), vqmovn_s16(vacc1x01234567));
215 #endif
216
217 const int8x16_t voutput_min = vld1q_dup_s8(¶ms->rndnu_neon.output_min);
218 vout0x01234567_1x01234567 = vmaxq_s8(vout0x01234567_1x01234567, voutput_min);
219
220 const int8x16_t voutput_max = vld1q_dup_s8(¶ms->rndnu_neon.output_max);
221 vout0x01234567_1x01234567 = vminq_s8(vout0x01234567_1x01234567, voutput_max);
222
223 if (nc >= 8) {
224 vst1_s8(c1 + 0, vget_high_s8(vout0x01234567_1x01234567));
225 vst1_s8(c0 + 0, vget_low_s8(vout0x01234567_1x01234567));
226
227 c1 = (int8_t*) ((uintptr_t) c1 + cn_stride);
228 c0 = (int8_t*) ((uintptr_t) c0 + cn_stride);
229
230 a = (const int8_t**restrict) ((uintptr_t) a - ks);
231
232 nc -= 8;
233 } else {
234 if (nc & 4) {
235 vst1q_lane_u32((void*) c1, vreinterpretq_u32_s8(vout0x01234567_1x01234567), 2); c1 += 4;
236 vst1q_lane_u32((void*) c0, vreinterpretq_u32_s8(vout0x01234567_1x01234567), 0); c0 += 4;
237 vout0x01234567_1x01234567 = vextq_s8(vout0x01234567_1x01234567, vout0x01234567_1x01234567, 4);
238 }
239 if (nc & 2) {
240 vst1q_lane_u16((void*) c1, vreinterpretq_u16_s8(vout0x01234567_1x01234567), 4); c1 += 2;
241 vst1q_lane_u16((void*) c0, vreinterpretq_u16_s8(vout0x01234567_1x01234567), 0); c0 += 2;
242 vout0x01234567_1x01234567 = vextq_s8(vout0x01234567_1x01234567, vout0x01234567_1x01234567, 2);
243 }
244 if (nc & 1) {
245 vst1q_lane_s8(c1, vout0x01234567_1x01234567, 8);
246 vst1q_lane_s8(c0, vout0x01234567_1x01234567, 0);
247 }
248
249 nc = 0;
250 }
251 } while (nc != 0);
252 }
253