xref: /aosp_15_r20/external/XNNPACK/src/qs8-igemm/gen/2x16c4s2-minmax-rndnu-neon-mull.c (revision 4bdc94577ba0e567308109d787f7fec7b531ce36)
1 // Auto-generated file. Do not edit!
2 //   Template: src/qs8-igemm/c4-neon-mull-shuffle.c.in
3 //   Generator: tools/xngen
4 //
5 // Copyright 2021 Google LLC
6 //
7 // This source code is licensed under the BSD-style license found in the
8 // LICENSE file in the root directory of this source tree.
9 
10 #include <assert.h>
11 
12 #include <arm_neon.h>
13 
14 #include <xnnpack/gemm.h>
15 #include <xnnpack/math.h>
16 
17 
xnn_qs8_igemm_minmax_rndnu_ukernel_2x16c4s2__neon_mull(size_t mr,size_t nc,size_t kc,size_t ks,const int8_t ** restrict a,const void * restrict w,int8_t * restrict c,size_t cm_stride,size_t cn_stride,size_t a_offset,const int8_t * zero,const union xnn_qs8_conv_minmax_params params[restrict XNN_MIN_ELEMENTS (1)])18 void xnn_qs8_igemm_minmax_rndnu_ukernel_2x16c4s2__neon_mull(
19     size_t mr,
20     size_t nc,
21     size_t kc,
22     size_t ks,
23     const int8_t** restrict a,
24     const void* restrict w,
25     int8_t* restrict c,
26     size_t cm_stride,
27     size_t cn_stride,
28     size_t a_offset,
29     const int8_t* zero,
30     const union xnn_qs8_conv_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_OOB_READS
31 {
32   assert(mr != 0);
33   assert(mr <= 2);
34   assert(nc != 0);
35   assert(kc != 0);
36   assert(ks != 0);
37   assert(ks % (2 * sizeof(void*)) == 0);
38   assert(a_offset % sizeof(int8_t) == 0);
39   assert(a != NULL);
40   assert(w != NULL);
41   assert(c != NULL);
42 
43   int8_t* c0 = c;
44   int8_t* c1 = (int8_t*) ((uintptr_t) c0 + cm_stride);
45   if XNN_UNPREDICTABLE(mr != 2) {
46     c1 = c0;
47   }
48 
49   kc = round_up_po2(kc, 8 * sizeof(int8_t));
50   do {
51     int32x4_t vacc0x01 = vreinterpretq_s32_u64(vmovl_u32(vld1_u32(w))); w = (const int32_t*) w + 2;
52     int32x4_t vacc0x23 = vreinterpretq_s32_u64(vmovl_u32(vld1_u32(w))); w = (const int32_t*) w + 2;
53     int32x4_t vacc0x45 = vreinterpretq_s32_u64(vmovl_u32(vld1_u32(w))); w = (const int32_t*) w + 2;
54     int32x4_t vacc0x67 = vreinterpretq_s32_u64(vmovl_u32(vld1_u32(w))); w = (const int32_t*) w + 2;
55     int32x4_t vacc0x89 = vreinterpretq_s32_u64(vmovl_u32(vld1_u32(w))); w = (const int32_t*) w + 2;
56     int32x4_t vacc0xAB = vreinterpretq_s32_u64(vmovl_u32(vld1_u32(w))); w = (const int32_t*) w + 2;
57     int32x4_t vacc0xCD = vreinterpretq_s32_u64(vmovl_u32(vld1_u32(w))); w = (const int32_t*) w + 2;
58     int32x4_t vacc0xEF = vreinterpretq_s32_u64(vmovl_u32(vld1_u32(w))); w = (const int32_t*) w + 2;
59     int32x4_t vacc1x01 = vacc0x01;
60     int32x4_t vacc1x23 = vacc0x23;
61     int32x4_t vacc1x45 = vacc0x45;
62     int32x4_t vacc1x67 = vacc0x67;
63     int32x4_t vacc1x89 = vacc0x89;
64     int32x4_t vacc1xAB = vacc0xAB;
65     int32x4_t vacc1xCD = vacc0xCD;
66     int32x4_t vacc1xEF = vacc0xEF;
67 
68     size_t p = ks;
69     do {
70       const int8_t* restrict a0 = a[0];
71       if XNN_UNPREDICTABLE(a0 != zero) {
72         a0 = (const int8_t*) ((uintptr_t) a0 + a_offset);
73       }
74       const int8_t* restrict a1 = a[1];
75       if XNN_UNPREDICTABLE(a1 != zero) {
76         a1 = (const int8_t*) ((uintptr_t) a1 + a_offset);
77       }
78       a += 2;
79 
80       size_t k = kc;
81       do {
82         int8x8_t va0x0 = vld1_s8(a0); a0 += 8;
83         int8x8_t va1x0 = vld1_s8(a1); a1 += 8;
84 
85         const int8x8_t vb01c0x0 = vld1_s8(w); w = (const int8_t*) w + 8;
86         const int8x8_t vb23c0x0 = vld1_s8(w); w = (const int8_t*) w + 8;
87         const int8x8_t vb45c0x0 = vld1_s8(w); w = (const int8_t*) w + 8;
88         const int8x8_t vb67c0x0 = vld1_s8(w); w = (const int8_t*) w + 8;
89         const int8x8_t vb89c0x0 = vld1_s8(w); w = (const int8_t*) w + 8;
90         const int8x8_t vbABc0x0 = vld1_s8(w); w = (const int8_t*) w + 8;
91         const int8x8_t vbCDc0x0 = vld1_s8(w); w = (const int8_t*) w + 8;
92         const int8x8_t vbEFc0x0 = vld1_s8(w); w = (const int8_t*) w + 8;
93         const int8x8_t vb01c1x0 = vld1_s8(w); w = (const int8_t*) w + 8;
94         const int8x8_t vb23c1x0 = vld1_s8(w); w = (const int8_t*) w + 8;
95         const int8x8_t vb45c1x0 = vld1_s8(w); w = (const int8_t*) w + 8;
96         const int8x8_t vb67c1x0 = vld1_s8(w); w = (const int8_t*) w + 8;
97         const int8x8_t vb89c1x0 = vld1_s8(w); w = (const int8_t*) w + 8;
98         const int8x8_t vbABc1x0 = vld1_s8(w); w = (const int8_t*) w + 8;
99         const int8x8_t vbCDc1x0 = vld1_s8(w); w = (const int8_t*) w + 8;
100         const int8x8_t vbEFc1x0 = vld1_s8(w); w = (const int8_t*) w + 8;
101 
102         int16x8_t vprod0x01c0 = vmull_s8(vb01c0x0, va0x0);
103         int16x8_t vprod1x01c0 = vmull_s8(vb01c0x0, va1x0);
104         vacc0x01 = vpadalq_s16(vacc0x01, vprod0x01c0);
105         vacc1x01 = vpadalq_s16(vacc1x01, vprod1x01c0);
106         int16x8_t vprod0x23c0 = vmull_s8(vb23c0x0, va0x0);
107         int16x8_t vprod1x23c0 = vmull_s8(vb23c0x0, va1x0);
108         vacc0x23 = vpadalq_s16(vacc0x23, vprod0x23c0);
109         vacc1x23 = vpadalq_s16(vacc1x23, vprod1x23c0);
110         int16x8_t vprod0x45c0 = vmull_s8(vb45c0x0, va0x0);
111         int16x8_t vprod1x45c0 = vmull_s8(vb45c0x0, va1x0);
112         vacc0x45 = vpadalq_s16(vacc0x45, vprod0x45c0);
113         vacc1x45 = vpadalq_s16(vacc1x45, vprod1x45c0);
114         int16x8_t vprod0x67c0 = vmull_s8(vb67c0x0, va0x0);
115         int16x8_t vprod1x67c0 = vmull_s8(vb67c0x0, va1x0);
116         vacc0x67 = vpadalq_s16(vacc0x67, vprod0x67c0);
117         vacc1x67 = vpadalq_s16(vacc1x67, vprod1x67c0);
118         int16x8_t vprod0x89c0 = vmull_s8(vb89c0x0, va0x0);
119         int16x8_t vprod1x89c0 = vmull_s8(vb89c0x0, va1x0);
120         vacc0x89 = vpadalq_s16(vacc0x89, vprod0x89c0);
121         vacc1x89 = vpadalq_s16(vacc1x89, vprod1x89c0);
122         int16x8_t vprod0xABc0 = vmull_s8(vbABc0x0, va0x0);
123         int16x8_t vprod1xABc0 = vmull_s8(vbABc0x0, va1x0);
124         vacc0xAB = vpadalq_s16(vacc0xAB, vprod0xABc0);
125         vacc1xAB = vpadalq_s16(vacc1xAB, vprod1xABc0);
126         int16x8_t vprod0xCDc0 = vmull_s8(vbCDc0x0, va0x0);
127         int16x8_t vprod1xCDc0 = vmull_s8(vbCDc0x0, va1x0);
128         vacc0xCD = vpadalq_s16(vacc0xCD, vprod0xCDc0);
129         vacc1xCD = vpadalq_s16(vacc1xCD, vprod1xCDc0);
130         int16x8_t vprod0xEFc0 = vmull_s8(vbEFc0x0, va0x0);
131         int16x8_t vprod1xEFc0 = vmull_s8(vbEFc0x0, va1x0);
132         vacc0xEF = vpadalq_s16(vacc0xEF, vprod0xEFc0);
133         vacc1xEF = vpadalq_s16(vacc1xEF, vprod1xEFc0);
134         va0x0 = vext_s8(va0x0, va0x0, 4);
135         va1x0 = vext_s8(va1x0, va1x0, 4);
136         int16x8_t vprod0x01c1 = vmull_s8(vb01c1x0, va0x0);
137         int16x8_t vprod1x01c1 = vmull_s8(vb01c1x0, va1x0);
138         vacc0x01 = vpadalq_s16(vacc0x01, vprod0x01c1);
139         vacc1x01 = vpadalq_s16(vacc1x01, vprod1x01c1);
140         int16x8_t vprod0x23c1 = vmull_s8(vb23c1x0, va0x0);
141         int16x8_t vprod1x23c1 = vmull_s8(vb23c1x0, va1x0);
142         vacc0x23 = vpadalq_s16(vacc0x23, vprod0x23c1);
143         vacc1x23 = vpadalq_s16(vacc1x23, vprod1x23c1);
144         int16x8_t vprod0x45c1 = vmull_s8(vb45c1x0, va0x0);
145         int16x8_t vprod1x45c1 = vmull_s8(vb45c1x0, va1x0);
146         vacc0x45 = vpadalq_s16(vacc0x45, vprod0x45c1);
147         vacc1x45 = vpadalq_s16(vacc1x45, vprod1x45c1);
148         int16x8_t vprod0x67c1 = vmull_s8(vb67c1x0, va0x0);
149         int16x8_t vprod1x67c1 = vmull_s8(vb67c1x0, va1x0);
150         vacc0x67 = vpadalq_s16(vacc0x67, vprod0x67c1);
151         vacc1x67 = vpadalq_s16(vacc1x67, vprod1x67c1);
152         int16x8_t vprod0x89c1 = vmull_s8(vb89c1x0, va0x0);
153         int16x8_t vprod1x89c1 = vmull_s8(vb89c1x0, va1x0);
154         vacc0x89 = vpadalq_s16(vacc0x89, vprod0x89c1);
155         vacc1x89 = vpadalq_s16(vacc1x89, vprod1x89c1);
156         int16x8_t vprod0xABc1 = vmull_s8(vbABc1x0, va0x0);
157         int16x8_t vprod1xABc1 = vmull_s8(vbABc1x0, va1x0);
158         vacc0xAB = vpadalq_s16(vacc0xAB, vprod0xABc1);
159         vacc1xAB = vpadalq_s16(vacc1xAB, vprod1xABc1);
160         int16x8_t vprod0xCDc1 = vmull_s8(vbCDc1x0, va0x0);
161         int16x8_t vprod1xCDc1 = vmull_s8(vbCDc1x0, va1x0);
162         vacc0xCD = vpadalq_s16(vacc0xCD, vprod0xCDc1);
163         vacc1xCD = vpadalq_s16(vacc1xCD, vprod1xCDc1);
164         int16x8_t vprod0xEFc1 = vmull_s8(vbEFc1x0, va0x0);
165         int16x8_t vprod1xEFc1 = vmull_s8(vbEFc1x0, va1x0);
166         vacc0xEF = vpadalq_s16(vacc0xEF, vprod0xEFc1);
167         vacc1xEF = vpadalq_s16(vacc1xEF, vprod1xEFc1);
168 
169         k -= 8 * sizeof(int8_t);
170       } while (k != 0);
171 
172       p -= 2 * sizeof(void*);
173     } while (p != 0);
174 
175 #if XNN_ARCH_ARM64
176     int32x4_t vacc0x0123 = vpaddq_s32(vacc0x01, vacc0x23);
177     int32x4_t vacc0x4567 = vpaddq_s32(vacc0x45, vacc0x67);
178     int32x4_t vacc0x89AB = vpaddq_s32(vacc0x89, vacc0xAB);
179     int32x4_t vacc0xCDEF = vpaddq_s32(vacc0xCD, vacc0xEF);
180     int32x4_t vacc1x0123 = vpaddq_s32(vacc1x01, vacc1x23);
181     int32x4_t vacc1x4567 = vpaddq_s32(vacc1x45, vacc1x67);
182     int32x4_t vacc1x89AB = vpaddq_s32(vacc1x89, vacc1xAB);
183     int32x4_t vacc1xCDEF = vpaddq_s32(vacc1xCD, vacc1xEF);
184 #else
185     const int32x2_t vsum0x01 = vpadd_s32(vget_low_s32(vacc0x01), vget_high_s32(vacc0x01));
186     const int32x2_t vsum0x23 = vpadd_s32(vget_low_s32(vacc0x23), vget_high_s32(vacc0x23));
187     int32x4_t vacc0x0123 = vcombine_s32(vsum0x01, vsum0x23);
188     const int32x2_t vsum0x45 = vpadd_s32(vget_low_s32(vacc0x45), vget_high_s32(vacc0x45));
189     const int32x2_t vsum0x67 = vpadd_s32(vget_low_s32(vacc0x67), vget_high_s32(vacc0x67));
190     int32x4_t vacc0x4567 = vcombine_s32(vsum0x45, vsum0x67);
191     const int32x2_t vsum0x89 = vpadd_s32(vget_low_s32(vacc0x89), vget_high_s32(vacc0x89));
192     const int32x2_t vsum0xAB = vpadd_s32(vget_low_s32(vacc0xAB), vget_high_s32(vacc0xAB));
193     int32x4_t vacc0x89AB = vcombine_s32(vsum0x89, vsum0xAB);
194     const int32x2_t vsum0xCD = vpadd_s32(vget_low_s32(vacc0xCD), vget_high_s32(vacc0xCD));
195     const int32x2_t vsum0xEF = vpadd_s32(vget_low_s32(vacc0xEF), vget_high_s32(vacc0xEF));
196     int32x4_t vacc0xCDEF = vcombine_s32(vsum0xCD, vsum0xEF);
197     const int32x2_t vsum1x01 = vpadd_s32(vget_low_s32(vacc1x01), vget_high_s32(vacc1x01));
198     const int32x2_t vsum1x23 = vpadd_s32(vget_low_s32(vacc1x23), vget_high_s32(vacc1x23));
199     int32x4_t vacc1x0123 = vcombine_s32(vsum1x01, vsum1x23);
200     const int32x2_t vsum1x45 = vpadd_s32(vget_low_s32(vacc1x45), vget_high_s32(vacc1x45));
201     const int32x2_t vsum1x67 = vpadd_s32(vget_low_s32(vacc1x67), vget_high_s32(vacc1x67));
202     int32x4_t vacc1x4567 = vcombine_s32(vsum1x45, vsum1x67);
203     const int32x2_t vsum1x89 = vpadd_s32(vget_low_s32(vacc1x89), vget_high_s32(vacc1x89));
204     const int32x2_t vsum1xAB = vpadd_s32(vget_low_s32(vacc1xAB), vget_high_s32(vacc1xAB));
205     int32x4_t vacc1x89AB = vcombine_s32(vsum1x89, vsum1xAB);
206     const int32x2_t vsum1xCD = vpadd_s32(vget_low_s32(vacc1xCD), vget_high_s32(vacc1xCD));
207     const int32x2_t vsum1xEF = vpadd_s32(vget_low_s32(vacc1xEF), vget_high_s32(vacc1xEF));
208     int32x4_t vacc1xCDEF = vcombine_s32(vsum1xCD, vsum1xEF);
209 #endif
210 
211     const int32x4_t vright_pre_shift = vld1q_dup_s32(&params->rndnu_neon.right_pre_shift);
212     const int32x4_t vmultiplier = vld1q_dup_s32(&params->rndnu_neon.multiplier);
213     const int32x4_t vright_post_shift = vld1q_dup_s32(&params->rndnu_neon.right_post_shift);
214 
215     vacc0x0123 = vqshlq_s32(vacc0x0123, vright_pre_shift);
216     vacc0x4567 = vqshlq_s32(vacc0x4567, vright_pre_shift);
217     vacc0x89AB = vqshlq_s32(vacc0x89AB, vright_pre_shift);
218     vacc0xCDEF = vqshlq_s32(vacc0xCDEF, vright_pre_shift);
219     vacc1x0123 = vqshlq_s32(vacc1x0123, vright_pre_shift);
220     vacc1x4567 = vqshlq_s32(vacc1x4567, vright_pre_shift);
221     vacc1x89AB = vqshlq_s32(vacc1x89AB, vright_pre_shift);
222     vacc1xCDEF = vqshlq_s32(vacc1xCDEF, vright_pre_shift);
223 
224     vacc0x0123 = vqdmulhq_s32(vacc0x0123, vmultiplier);
225     vacc0x4567 = vqdmulhq_s32(vacc0x4567, vmultiplier);
226     vacc0x89AB = vqdmulhq_s32(vacc0x89AB, vmultiplier);
227     vacc0xCDEF = vqdmulhq_s32(vacc0xCDEF, vmultiplier);
228     vacc1x0123 = vqdmulhq_s32(vacc1x0123, vmultiplier);
229     vacc1x4567 = vqdmulhq_s32(vacc1x4567, vmultiplier);
230     vacc1x89AB = vqdmulhq_s32(vacc1x89AB, vmultiplier);
231     vacc1xCDEF = vqdmulhq_s32(vacc1xCDEF, vmultiplier);
232 
233     vacc0x0123 = vrshlq_s32(vacc0x0123, vright_post_shift);
234     vacc0x4567 = vrshlq_s32(vacc0x4567, vright_post_shift);
235     vacc0x89AB = vrshlq_s32(vacc0x89AB, vright_post_shift);
236     vacc0xCDEF = vrshlq_s32(vacc0xCDEF, vright_post_shift);
237     vacc1x0123 = vrshlq_s32(vacc1x0123, vright_post_shift);
238     vacc1x4567 = vrshlq_s32(vacc1x4567, vright_post_shift);
239     vacc1x89AB = vrshlq_s32(vacc1x89AB, vright_post_shift);
240     vacc1xCDEF = vrshlq_s32(vacc1xCDEF, vright_post_shift);
241 
242     const int16x8_t voutput_zero_point = vld1q_dup_s16(&params->rndnu_neon.output_zero_point);
243 #if XNN_ARCH_ARM64
244     int16x8_t vacc0x01234567 = vqmovn_high_s32(vqmovn_s32(vacc0x0123), vacc0x4567);
245     int16x8_t vacc0x89ABCDEF = vqmovn_high_s32(vqmovn_s32(vacc0x89AB), vacc0xCDEF);
246     int16x8_t vacc1x01234567 = vqmovn_high_s32(vqmovn_s32(vacc1x0123), vacc1x4567);
247     int16x8_t vacc1x89ABCDEF = vqmovn_high_s32(vqmovn_s32(vacc1x89AB), vacc1xCDEF);
248 
249     vacc0x01234567 = vqaddq_s16(vacc0x01234567, voutput_zero_point);
250     vacc0x89ABCDEF = vqaddq_s16(vacc0x89ABCDEF, voutput_zero_point);
251     vacc1x01234567 = vqaddq_s16(vacc1x01234567, voutput_zero_point);
252     vacc1x89ABCDEF = vqaddq_s16(vacc1x89ABCDEF, voutput_zero_point);
253 
254     int8x16_t vout0x0123456789ABCDEF = vqmovn_high_s16(vqmovn_s16(vacc0x01234567), vacc0x89ABCDEF);
255     int8x16_t vout1x0123456789ABCDEF = vqmovn_high_s16(vqmovn_s16(vacc1x01234567), vacc1x89ABCDEF);
256 #else
257     int16x8_t vacc0x01234567 = vcombine_s16(vqmovn_s32(vacc0x0123), vqmovn_s32(vacc0x4567));
258     int16x8_t vacc0x89ABCDEF = vcombine_s16(vqmovn_s32(vacc0x89AB), vqmovn_s32(vacc0xCDEF));
259     int16x8_t vacc1x01234567 = vcombine_s16(vqmovn_s32(vacc1x0123), vqmovn_s32(vacc1x4567));
260     int16x8_t vacc1x89ABCDEF = vcombine_s16(vqmovn_s32(vacc1x89AB), vqmovn_s32(vacc1xCDEF));
261 
262     vacc0x01234567 = vqaddq_s16(vacc0x01234567, voutput_zero_point);
263     vacc0x89ABCDEF = vqaddq_s16(vacc0x89ABCDEF, voutput_zero_point);
264     vacc1x01234567 = vqaddq_s16(vacc1x01234567, voutput_zero_point);
265     vacc1x89ABCDEF = vqaddq_s16(vacc1x89ABCDEF, voutput_zero_point);
266 
267     int8x16_t vout0x0123456789ABCDEF = vcombine_s8(vqmovn_s16(vacc0x01234567), vqmovn_s16(vacc0x89ABCDEF));
268     int8x16_t vout1x0123456789ABCDEF = vcombine_s8(vqmovn_s16(vacc1x01234567), vqmovn_s16(vacc1x89ABCDEF));
269 #endif
270 
271     const int8x16_t voutput_min = vld1q_dup_s8(&params->rndnu_neon.output_min);
272     vout0x0123456789ABCDEF = vmaxq_s8(vout0x0123456789ABCDEF, voutput_min);
273     vout1x0123456789ABCDEF = vmaxq_s8(vout1x0123456789ABCDEF, voutput_min);
274 
275     const int8x16_t voutput_max = vld1q_dup_s8(&params->rndnu_neon.output_max);
276     vout0x0123456789ABCDEF = vminq_s8(vout0x0123456789ABCDEF, voutput_max);
277     vout1x0123456789ABCDEF = vminq_s8(vout1x0123456789ABCDEF, voutput_max);
278 
279     if (nc >= 16) {
280       vst1q_s8(c1 + 0, vout1x0123456789ABCDEF);
281       vst1q_s8(c0 + 0, vout0x0123456789ABCDEF);
282 
283       c1 = (int8_t*) ((uintptr_t) c1 + cn_stride);
284       c0 = (int8_t*) ((uintptr_t) c0 + cn_stride);
285 
286       a = (const int8_t**restrict) ((uintptr_t) a - ks);
287 
288       nc -= 16;
289     } else {
290       int8x16_t vout0x01234567_1x01234567 = vcombine_s8(vget_low_s8(vout0x0123456789ABCDEF), vget_low_s8(vout1x0123456789ABCDEF));
291       if (nc & 8) {
292         vst1_s8(c1, vget_high_s8(vout0x01234567_1x01234567)); c1 += 8;
293         vst1_s8(c0, vget_low_s8(vout0x01234567_1x01234567)); c0 += 8;
294         vout0x01234567_1x01234567 = vcombine_s8(vget_high_s8(vout0x0123456789ABCDEF), vget_high_s8(vout1x0123456789ABCDEF));
295       }
296       if (nc & 4) {
297         vst1q_lane_u32((void*) c1, vreinterpretq_u32_s8(vout0x01234567_1x01234567), 2); c1 += 4;
298         vst1q_lane_u32((void*) c0, vreinterpretq_u32_s8(vout0x01234567_1x01234567), 0); c0 += 4;
299         vout0x01234567_1x01234567 = vextq_s8(vout0x01234567_1x01234567, vout0x01234567_1x01234567, 4);
300       }
301       if (nc & 2) {
302         vst1q_lane_u16((void*) c1, vreinterpretq_u16_s8(vout0x01234567_1x01234567), 4); c1 += 2;
303         vst1q_lane_u16((void*) c0, vreinterpretq_u16_s8(vout0x01234567_1x01234567), 0); c0 += 2;
304         vout0x01234567_1x01234567 = vextq_s8(vout0x01234567_1x01234567, vout0x01234567_1x01234567, 2);
305       }
306       if (nc & 1) {
307         vst1q_lane_s8(c1, vout0x01234567_1x01234567, 8);
308         vst1q_lane_s8(c0, vout0x01234567_1x01234567, 0);
309       }
310 
311       nc = 0;
312     }
313   } while (nc != 0);
314 }
315