1 // Auto-generated file. Do not edit!
2 // Template: src/qs8-igemm/c8-neon-mull.c.in
3 // Generator: tools/xngen
4 //
5 // Copyright 2021 Google LLC
6 //
7 // This source code is licensed under the BSD-style license found in the
8 // LICENSE file in the root directory of this source tree.
9
10 #include <assert.h>
11
12 #include <arm_neon.h>
13
14 #include <xnnpack/igemm.h>
15 #include <xnnpack/math.h>
16
17
xnn_qs8_igemm_minmax_rndnu_ukernel_1x8c8__neon_mull(size_t mr,size_t nc,size_t kc,size_t ks,const int8_t ** restrict a,const void * restrict w,int8_t * restrict c,size_t cm_stride,size_t cn_stride,size_t a_offset,const int8_t * zero,const union xnn_qs8_conv_minmax_params params[restrict XNN_MIN_ELEMENTS (1)])18 void xnn_qs8_igemm_minmax_rndnu_ukernel_1x8c8__neon_mull(
19 size_t mr,
20 size_t nc,
21 size_t kc,
22 size_t ks,
23 const int8_t** restrict a,
24 const void* restrict w,
25 int8_t* restrict c,
26 size_t cm_stride,
27 size_t cn_stride,
28 size_t a_offset,
29 const int8_t* zero,
30 const union xnn_qs8_conv_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_OOB_READS
31 {
32 assert(mr != 0);
33 assert(mr <= 1);
34 assert(nc != 0);
35 assert(kc != 0);
36 assert(ks != 0);
37 assert(ks % (1 * sizeof(void*)) == 0);
38 assert(a_offset % sizeof(int8_t) == 0);
39 assert(a != NULL);
40 assert(w != NULL);
41 assert(c != NULL);
42
43 kc = round_up_po2(kc, 8 * sizeof(int8_t));
44 int8_t* c0 = c;
45
46 do {
47 int32x4_t vacc0x0 = vld1q_lane_s32(w, vmovq_n_s32(0), 0); w = (const void*) ((uintptr_t) w + sizeof(int32_t));
48 int32x4_t vacc0x1 = vld1q_lane_s32(w, vmovq_n_s32(0), 0); w = (const void*) ((uintptr_t) w + sizeof(int32_t));
49 int32x4_t vacc0x2 = vld1q_lane_s32(w, vmovq_n_s32(0), 0); w = (const void*) ((uintptr_t) w + sizeof(int32_t));
50 int32x4_t vacc0x3 = vld1q_lane_s32(w, vmovq_n_s32(0), 0); w = (const void*) ((uintptr_t) w + sizeof(int32_t));
51 int32x4_t vacc0x4 = vld1q_lane_s32(w, vmovq_n_s32(0), 0); w = (const void*) ((uintptr_t) w + sizeof(int32_t));
52 int32x4_t vacc0x5 = vld1q_lane_s32(w, vmovq_n_s32(0), 0); w = (const void*) ((uintptr_t) w + sizeof(int32_t));
53 int32x4_t vacc0x6 = vld1q_lane_s32(w, vmovq_n_s32(0), 0); w = (const void*) ((uintptr_t) w + sizeof(int32_t));
54 int32x4_t vacc0x7 = vld1q_lane_s32(w, vmovq_n_s32(0), 0); w = (const void*) ((uintptr_t) w + sizeof(int32_t));
55
56 size_t p = ks;
57 do {
58 const int8_t* restrict a0 = a[0];
59 if XNN_UNPREDICTABLE(a0 != zero) {
60 a0 = (const int8_t*) ((uintptr_t) a0 + a_offset);
61 }
62 a += 1;
63
64 size_t k = kc;
65
66 // Handle 8 bytes at a time using MUL.
67 while (k != 0) {
68 const int8x8_t va0 = vld1_s8(a0); a0 += 8;
69
70 const int8x8_t vb0 = vld1_s8(w); w = (const void*) ((uintptr_t) w + 8 * sizeof(int8_t));
71 const int16x8_t vprod0x0 = vmull_s8(vb0, va0);
72 vacc0x0 = vpadalq_s16(vacc0x0, vprod0x0);
73 const int8x8_t vb1 = vld1_s8(w); w = (const void*) ((uintptr_t) w + 8 * sizeof(int8_t));
74 const int16x8_t vprod0x1 = vmull_s8(vb1, va0);
75 vacc0x1 = vpadalq_s16(vacc0x1, vprod0x1);
76 const int8x8_t vb2 = vld1_s8(w); w = (const void*) ((uintptr_t) w + 8 * sizeof(int8_t));
77 const int16x8_t vprod0x2 = vmull_s8(vb2, va0);
78 vacc0x2 = vpadalq_s16(vacc0x2, vprod0x2);
79 const int8x8_t vb3 = vld1_s8(w); w = (const void*) ((uintptr_t) w + 8 * sizeof(int8_t));
80 const int16x8_t vprod0x3 = vmull_s8(vb3, va0);
81 vacc0x3 = vpadalq_s16(vacc0x3, vprod0x3);
82 const int8x8_t vb4 = vld1_s8(w); w = (const void*) ((uintptr_t) w + 8 * sizeof(int8_t));
83 const int16x8_t vprod0x4 = vmull_s8(vb4, va0);
84 vacc0x4 = vpadalq_s16(vacc0x4, vprod0x4);
85 const int8x8_t vb5 = vld1_s8(w); w = (const void*) ((uintptr_t) w + 8 * sizeof(int8_t));
86 const int16x8_t vprod0x5 = vmull_s8(vb5, va0);
87 vacc0x5 = vpadalq_s16(vacc0x5, vprod0x5);
88 const int8x8_t vb6 = vld1_s8(w); w = (const void*) ((uintptr_t) w + 8 * sizeof(int8_t));
89 const int16x8_t vprod0x6 = vmull_s8(vb6, va0);
90 vacc0x6 = vpadalq_s16(vacc0x6, vprod0x6);
91 const int8x8_t vb7 = vld1_s8(w); w = (const void*) ((uintptr_t) w + 8 * sizeof(int8_t));
92 const int16x8_t vprod0x7 = vmull_s8(vb7, va0);
93 vacc0x7 = vpadalq_s16(vacc0x7, vprod0x7);
94
95 k -= 8 * sizeof(int8_t);
96 }
97
98 p -= 1 * sizeof(void*);
99 } while (p != 0);
100
101 #if XNN_ARCH_ARM64
102 const int32x4_t vsum0x01 = vpaddq_s32(vacc0x0, vacc0x1);
103 const int32x4_t vsum0x23 = vpaddq_s32(vacc0x2, vacc0x3);
104 const int32x4_t vsum0x45 = vpaddq_s32(vacc0x4, vacc0x5);
105 const int32x4_t vsum0x67 = vpaddq_s32(vacc0x6, vacc0x7);
106
107 int32x4_t vacc0x0123 = vpaddq_s32(vsum0x01, vsum0x23);
108 int32x4_t vacc0x4567 = vpaddq_s32(vsum0x45, vsum0x67);
109 #else
110 const int32x2_t vpsum0x0 = vadd_s32(vget_low_s32(vacc0x0), vget_high_s32(vacc0x0));
111 const int32x2_t vpsum0x1 = vadd_s32(vget_low_s32(vacc0x1), vget_high_s32(vacc0x1));
112 const int32x2_t vpsum0x2 = vadd_s32(vget_low_s32(vacc0x2), vget_high_s32(vacc0x2));
113 const int32x2_t vpsum0x3 = vadd_s32(vget_low_s32(vacc0x3), vget_high_s32(vacc0x3));
114 const int32x2_t vsum0x01 = vpadd_s32(vpsum0x0, vpsum0x1);
115 const int32x2_t vsum0x23 = vpadd_s32(vpsum0x2, vpsum0x3);
116 int32x4_t vacc0x0123 = vcombine_s32(vsum0x01, vsum0x23 );
117 const int32x2_t vpsum0x4 = vadd_s32(vget_low_s32(vacc0x4), vget_high_s32(vacc0x4));
118 const int32x2_t vpsum0x5 = vadd_s32(vget_low_s32(vacc0x5), vget_high_s32(vacc0x5));
119 const int32x2_t vpsum0x6 = vadd_s32(vget_low_s32(vacc0x6), vget_high_s32(vacc0x6));
120 const int32x2_t vpsum0x7 = vadd_s32(vget_low_s32(vacc0x7), vget_high_s32(vacc0x7));
121 const int32x2_t vsum0x45 = vpadd_s32(vpsum0x4, vpsum0x5);
122 const int32x2_t vsum0x67 = vpadd_s32(vpsum0x6, vpsum0x7);
123 int32x4_t vacc0x4567 = vcombine_s32(vsum0x45, vsum0x67 );
124 #endif
125
126 const int32x4_t vright_pre_shift = vld1q_dup_s32(¶ms->rndnu_neon.right_pre_shift);
127 const int32x4_t vmultiplier = vld1q_dup_s32(¶ms->rndnu_neon.multiplier);
128 const int32x4_t vright_post_shift = vld1q_dup_s32(¶ms->rndnu_neon.right_post_shift);
129
130 vacc0x0123 = vqshlq_s32(vacc0x0123, vright_pre_shift);
131 vacc0x4567 = vqshlq_s32(vacc0x4567, vright_pre_shift);
132
133 vacc0x0123 = vqdmulhq_s32(vacc0x0123, vmultiplier);
134 vacc0x4567 = vqdmulhq_s32(vacc0x4567, vmultiplier);
135
136 vacc0x0123 = vrshlq_s32(vacc0x0123, vright_post_shift);
137 vacc0x4567 = vrshlq_s32(vacc0x4567, vright_post_shift);
138
139 const int16x8_t voutput_zero_point = vld1q_dup_s16(¶ms->rndnu_neon.output_zero_point);
140 #if XNN_ARCH_ARM64
141 int16x8_t vacc0x01234567 = vqmovn_high_s32(vqmovn_s32(vacc0x0123), vacc0x4567);
142
143 vacc0x01234567 = vqaddq_s16(vacc0x01234567, voutput_zero_point);
144
145 int8x8_t vout0x01234567 = vqmovn_s16(vacc0x01234567);
146 #else
147 int16x8_t vacc0x01234567 = vcombine_s16(vqmovn_s32(vacc0x0123), vqmovn_s32(vacc0x4567));
148
149 vacc0x01234567 = vqaddq_s16(vacc0x01234567, voutput_zero_point);
150
151 int8x8_t vout0x01234567 = vqmovn_s16(vacc0x01234567);
152 #endif
153
154 const int8x8_t voutput_min = vld1_dup_s8(¶ms->rndnu_neon.output_min);
155 vout0x01234567 = vmax_s8(vout0x01234567, voutput_min);
156
157 const int8x8_t voutput_max = vld1_dup_s8(¶ms->rndnu_neon.output_max);
158 vout0x01234567 = vmin_s8(vout0x01234567, voutput_max);
159
160 if (nc >= 8) {
161 vst1_s8(c0 + 0, vout0x01234567);
162
163 c0 = (int8_t*) ((uintptr_t) c0 + cn_stride);
164
165 a = (const int8_t**restrict) ((uintptr_t) a - ks);
166
167 nc -= 8;
168 } else {
169 if (nc & 4) {
170 vst1_lane_u32((void*) c0, vreinterpret_u32_s8(vout0x01234567), 0); c0 += 4;
171 vout0x01234567 = vext_s8(vout0x01234567, vout0x01234567, 4);
172 }
173 if (nc & 2) {
174 vst1_lane_u16((void*) c0, vreinterpret_u16_s8(vout0x01234567), 0); c0 += 2;
175 vout0x01234567 = vext_s8(vout0x01234567, vout0x01234567, 2);
176 }
177 if (nc & 1) {
178 vst1_lane_s8(c0, vout0x01234567, 0);
179 }
180
181 nc = 0;
182 }
183 } while (nc != 0);
184 }
185