xref: /aosp_15_r20/external/XNNPACK/src/qs8-igemm/gen/1x8c16-minmax-rndnu-neon-mlal.c (revision 4bdc94577ba0e567308109d787f7fec7b531ce36)
1 // Auto-generated file. Do not edit!
2 //   Template: src/qs8-igemm/c16-neon-mlal.c.in
3 //   Generator: tools/xngen
4 //
5 // Copyright 2021 Google LLC
6 //
7 // This source code is licensed under the BSD-style license found in the
8 // LICENSE file in the root directory of this source tree.
9 
10 #include <assert.h>
11 
12 #include <arm_neon.h>
13 
14 #include <xnnpack/gemm.h>
15 #include <xnnpack/math.h>
16 
17 
xnn_qs8_igemm_minmax_rndnu_ukernel_1x8c16__neon_mlal(size_t mr,size_t nc,size_t kc,size_t ks,const int8_t ** restrict a,const void * restrict w,int8_t * restrict c,size_t cm_stride,size_t cn_stride,size_t a_offset,const int8_t * zero,const union xnn_qs8_conv_minmax_params params[restrict XNN_MIN_ELEMENTS (1)])18 void xnn_qs8_igemm_minmax_rndnu_ukernel_1x8c16__neon_mlal(
19     size_t mr,
20     size_t nc,
21     size_t kc,
22     size_t ks,
23     const int8_t** restrict a,
24     const void* restrict w,
25     int8_t* restrict c,
26     size_t cm_stride,
27     size_t cn_stride,
28     size_t a_offset,
29     const int8_t* zero,
30     const union xnn_qs8_conv_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_OOB_READS
31 {
32   assert(mr != 0);
33   assert(mr <= 1);
34   assert(nc != 0);
35   assert(kc != 0);
36   assert(ks != 0);
37   assert(ks % (1 * sizeof(void*)) == 0);
38   assert(a_offset % sizeof(int8_t) == 0);
39   assert(a != NULL);
40   assert(w != NULL);
41   assert(c != NULL);
42 
43   kc = round_up_po2(kc, 16 * sizeof(int8_t));
44   int8_t* c0 = c;
45 
46   do {
47     int32x4_t vacc0x0 = vld1q_lane_s32(w, vmovq_n_s32(0), 0); w = (const void*) ((uintptr_t) w + sizeof(int32_t));
48     int32x4_t vacc0x1 = vld1q_lane_s32(w, vmovq_n_s32(0), 0); w = (const void*) ((uintptr_t) w + sizeof(int32_t));
49     int32x4_t vacc0x2 = vld1q_lane_s32(w, vmovq_n_s32(0), 0); w = (const void*) ((uintptr_t) w + sizeof(int32_t));
50     int32x4_t vacc0x3 = vld1q_lane_s32(w, vmovq_n_s32(0), 0); w = (const void*) ((uintptr_t) w + sizeof(int32_t));
51     int32x4_t vacc0x4 = vld1q_lane_s32(w, vmovq_n_s32(0), 0); w = (const void*) ((uintptr_t) w + sizeof(int32_t));
52     int32x4_t vacc0x5 = vld1q_lane_s32(w, vmovq_n_s32(0), 0); w = (const void*) ((uintptr_t) w + sizeof(int32_t));
53     int32x4_t vacc0x6 = vld1q_lane_s32(w, vmovq_n_s32(0), 0); w = (const void*) ((uintptr_t) w + sizeof(int32_t));
54     int32x4_t vacc0x7 = vld1q_lane_s32(w, vmovq_n_s32(0), 0); w = (const void*) ((uintptr_t) w + sizeof(int32_t));
55 
56     size_t p = ks;
57     do {
58       const int8_t* restrict a0 = a[0];
59       if XNN_UNPREDICTABLE(a0 != zero) {
60         a0 = (const int8_t*) ((uintptr_t) a0 + a_offset);
61       }
62       a += 1;
63 
64       // KC loop of 16 with up to 15 remainder
65       size_t k = kc;
66       while (k != 0) {
67         const int8x16_t va0 = vld1q_s8(a0); a0 += 16;
68 
69         const int8x16_t vb0 = vld1q_s8(w); w = (const void*) ((uintptr_t) w + 16 * sizeof(int8_t));
70         const int8x16_t vb1 = vld1q_s8(w); w = (const void*) ((uintptr_t) w + 16 * sizeof(int8_t));
71         const int8x16_t vb2 = vld1q_s8(w); w = (const void*) ((uintptr_t) w + 16 * sizeof(int8_t));
72         const int8x16_t vb3 = vld1q_s8(w); w = (const void*) ((uintptr_t) w + 16 * sizeof(int8_t));
73         const int8x16_t vb4 = vld1q_s8(w); w = (const void*) ((uintptr_t) w + 16 * sizeof(int8_t));
74         const int8x16_t vb5 = vld1q_s8(w); w = (const void*) ((uintptr_t) w + 16 * sizeof(int8_t));
75         const int8x16_t vb6 = vld1q_s8(w); w = (const void*) ((uintptr_t) w + 16 * sizeof(int8_t));
76         const int8x16_t vb7 = vld1q_s8(w); w = (const void*) ((uintptr_t) w + 16 * sizeof(int8_t));
77 
78         int16x8_t vprod0x0 = vmull_s8(vget_low_s8(vb0), vget_low_s8(va0));
79         vprod0x0 = vmlal_s8(vprod0x0, vget_high_s8(vb0), vget_high_s8(va0));
80         vacc0x0 = vpadalq_s16(vacc0x0, vprod0x0);
81         int16x8_t vprod0x1 = vmull_s8(vget_low_s8(vb1), vget_low_s8(va0));
82         vprod0x1 = vmlal_s8(vprod0x1, vget_high_s8(vb1), vget_high_s8(va0));
83         vacc0x1 = vpadalq_s16(vacc0x1, vprod0x1);
84         int16x8_t vprod0x2 = vmull_s8(vget_low_s8(vb2), vget_low_s8(va0));
85         vprod0x2 = vmlal_s8(vprod0x2, vget_high_s8(vb2), vget_high_s8(va0));
86         vacc0x2 = vpadalq_s16(vacc0x2, vprod0x2);
87         int16x8_t vprod0x3 = vmull_s8(vget_low_s8(vb3), vget_low_s8(va0));
88         vprod0x3 = vmlal_s8(vprod0x3, vget_high_s8(vb3), vget_high_s8(va0));
89         vacc0x3 = vpadalq_s16(vacc0x3, vprod0x3);
90         int16x8_t vprod0x4 = vmull_s8(vget_low_s8(vb4), vget_low_s8(va0));
91         vprod0x4 = vmlal_s8(vprod0x4, vget_high_s8(vb4), vget_high_s8(va0));
92         vacc0x4 = vpadalq_s16(vacc0x4, vprod0x4);
93         int16x8_t vprod0x5 = vmull_s8(vget_low_s8(vb5), vget_low_s8(va0));
94         vprod0x5 = vmlal_s8(vprod0x5, vget_high_s8(vb5), vget_high_s8(va0));
95         vacc0x5 = vpadalq_s16(vacc0x5, vprod0x5);
96         int16x8_t vprod0x6 = vmull_s8(vget_low_s8(vb6), vget_low_s8(va0));
97         vprod0x6 = vmlal_s8(vprod0x6, vget_high_s8(vb6), vget_high_s8(va0));
98         vacc0x6 = vpadalq_s16(vacc0x6, vprod0x6);
99         int16x8_t vprod0x7 = vmull_s8(vget_low_s8(vb7), vget_low_s8(va0));
100         vprod0x7 = vmlal_s8(vprod0x7, vget_high_s8(vb7), vget_high_s8(va0));
101         vacc0x7 = vpadalq_s16(vacc0x7, vprod0x7);
102 
103         k -= 16 * sizeof(int8_t);
104       }
105 
106       p -= 1 * sizeof(void*);
107     } while (p != 0);
108 
109 #if XNN_ARCH_ARM64
110     const int32x4_t vsum0x01 = vpaddq_s32(vacc0x0, vacc0x1);
111     const int32x4_t vsum0x23 = vpaddq_s32(vacc0x2, vacc0x3);
112     const int32x4_t vsum0x45 = vpaddq_s32(vacc0x4, vacc0x5);
113     const int32x4_t vsum0x67 = vpaddq_s32(vacc0x6, vacc0x7);
114     int32x4_t vacc0x0123 = vpaddq_s32(vsum0x01, vsum0x23);
115     int32x4_t vacc0x4567 = vpaddq_s32(vsum0x45, vsum0x67);
116 #else
117     const int32x2_t vpsum0x0 = vadd_s32(vget_low_s32(vacc0x0), vget_high_s32(vacc0x0));
118     const int32x2_t vpsum0x1 = vadd_s32(vget_low_s32(vacc0x1), vget_high_s32(vacc0x1));
119     const int32x2_t vpsum0x2 = vadd_s32(vget_low_s32(vacc0x2), vget_high_s32(vacc0x2));
120     const int32x2_t vpsum0x3 = vadd_s32(vget_low_s32(vacc0x3), vget_high_s32(vacc0x3));
121     const int32x2_t vsum0x01 = vpadd_s32(vpsum0x0, vpsum0x1);
122     const int32x2_t vsum0x23 = vpadd_s32(vpsum0x2, vpsum0x3);
123     int32x4_t vacc0x0123 = vcombine_s32(vsum0x01, vsum0x23 );
124     const int32x2_t vpsum0x4 = vadd_s32(vget_low_s32(vacc0x4), vget_high_s32(vacc0x4));
125     const int32x2_t vpsum0x5 = vadd_s32(vget_low_s32(vacc0x5), vget_high_s32(vacc0x5));
126     const int32x2_t vpsum0x6 = vadd_s32(vget_low_s32(vacc0x6), vget_high_s32(vacc0x6));
127     const int32x2_t vpsum0x7 = vadd_s32(vget_low_s32(vacc0x7), vget_high_s32(vacc0x7));
128     const int32x2_t vsum0x45 = vpadd_s32(vpsum0x4, vpsum0x5);
129     const int32x2_t vsum0x67 = vpadd_s32(vpsum0x6, vpsum0x7);
130     int32x4_t vacc0x4567 = vcombine_s32(vsum0x45, vsum0x67 );
131 #endif
132 
133     const int32x4_t vright_pre_shift = vld1q_dup_s32(&params->rndnu_neon.right_pre_shift);
134     const int32x4_t vmultiplier = vld1q_dup_s32(&params->rndnu_neon.multiplier);
135     const int32x4_t vright_post_shift = vld1q_dup_s32(&params->rndnu_neon.right_post_shift);
136 
137     vacc0x0123 = vqshlq_s32(vacc0x0123, vright_pre_shift);
138     vacc0x4567 = vqshlq_s32(vacc0x4567, vright_pre_shift);
139 
140     vacc0x0123 = vqdmulhq_s32(vacc0x0123, vmultiplier);
141     vacc0x4567 = vqdmulhq_s32(vacc0x4567, vmultiplier);
142 
143     vacc0x0123 = vrshlq_s32(vacc0x0123, vright_post_shift);
144     vacc0x4567 = vrshlq_s32(vacc0x4567, vright_post_shift);
145 
146     const int16x8_t voutput_zero_point = vld1q_dup_s16(&params->rndnu_neon.output_zero_point);
147 #if XNN_ARCH_ARM64
148     const int16x8_t vacc0x01234567 = vqaddq_s16(vqmovn_high_s32(vqmovn_s32(vacc0x0123), vacc0x4567), voutput_zero_point);
149     int8x8_t vout0x01234567 = vqmovn_s16(vacc0x01234567);
150 #else
151     const int16x8_t vacc0x01234567 = vqaddq_s16(vcombine_s16(vqmovn_s32(vacc0x0123), vqmovn_s32(vacc0x4567)), voutput_zero_point);
152 
153     int8x8_t vout0x01234567 = vqmovn_s16(vacc0x01234567);
154 #endif
155     const int8x8_t voutput_min = vld1_dup_s8(&params->rndnu_neon.output_min);
156     const int8x8_t voutput_max = vld1_dup_s8(&params->rndnu_neon.output_max);
157 
158     vout0x01234567 = vmax_s8(vout0x01234567, voutput_min);
159 
160     vout0x01234567 = vmin_s8(vout0x01234567, voutput_max);
161 
162     if (nc >= 8) {
163       vst1_s8(c0 + 0, vout0x01234567);
164 
165       c0 = (int8_t*) ((uintptr_t) c0 + cn_stride);
166 
167       a = (const int8_t**restrict) ((uintptr_t) a - ks);
168 
169       nc -= 8;
170     } else {
171       if (nc & 4) {
172         vst1_lane_u32((void*) c0, vreinterpret_u32_s8(vout0x01234567), 0); c0 += 4;
173         vout0x01234567 = vext_s8(vout0x01234567, vout0x01234567, 4);
174       }
175       if (nc & 2) {
176         vst1_lane_u16((void*) c0, vreinterpret_u16_s8(vout0x01234567), 0); c0 += 2;
177         vout0x01234567 = vext_s8(vout0x01234567, vout0x01234567, 2);
178       }
179       if (nc & 1) {
180         vst1_lane_s8(c0, vout0x01234567, 0);
181       }
182 
183       nc = 0;
184     }
185   } while (nc != 0);
186 }
187