1 // Auto-generated file. Do not edit!
2 // Template: src/qs8-igemm/c4-neon-mull-shuffle.c.in
3 // Generator: tools/xngen
4 //
5 // Copyright 2021 Google LLC
6 //
7 // This source code is licensed under the BSD-style license found in the
8 // LICENSE file in the root directory of this source tree.
9
10 #include <assert.h>
11
12 #include <arm_neon.h>
13
14 #include <xnnpack/gemm.h>
15 #include <xnnpack/math.h>
16
17
xnn_qs8_igemm_minmax_rndnu_ukernel_1x16c4s2__neon_mull(size_t mr,size_t nc,size_t kc,size_t ks,const int8_t ** restrict a,const void * restrict w,int8_t * restrict c,size_t cm_stride,size_t cn_stride,size_t a_offset,const int8_t * zero,const union xnn_qs8_conv_minmax_params params[restrict XNN_MIN_ELEMENTS (1)])18 void xnn_qs8_igemm_minmax_rndnu_ukernel_1x16c4s2__neon_mull(
19 size_t mr,
20 size_t nc,
21 size_t kc,
22 size_t ks,
23 const int8_t** restrict a,
24 const void* restrict w,
25 int8_t* restrict c,
26 size_t cm_stride,
27 size_t cn_stride,
28 size_t a_offset,
29 const int8_t* zero,
30 const union xnn_qs8_conv_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_OOB_READS
31 {
32 assert(mr != 0);
33 assert(mr <= 1);
34 assert(nc != 0);
35 assert(kc != 0);
36 assert(ks != 0);
37 assert(ks % (1 * sizeof(void*)) == 0);
38 assert(a_offset % sizeof(int8_t) == 0);
39 assert(a != NULL);
40 assert(w != NULL);
41 assert(c != NULL);
42
43 int8_t* c0 = c;
44
45 kc = round_up_po2(kc, 8 * sizeof(int8_t));
46 do {
47 int32x4_t vacc0x01 = vreinterpretq_s32_u64(vmovl_u32(vld1_u32(w))); w = (const int32_t*) w + 2;
48 int32x4_t vacc0x23 = vreinterpretq_s32_u64(vmovl_u32(vld1_u32(w))); w = (const int32_t*) w + 2;
49 int32x4_t vacc0x45 = vreinterpretq_s32_u64(vmovl_u32(vld1_u32(w))); w = (const int32_t*) w + 2;
50 int32x4_t vacc0x67 = vreinterpretq_s32_u64(vmovl_u32(vld1_u32(w))); w = (const int32_t*) w + 2;
51 int32x4_t vacc0x89 = vreinterpretq_s32_u64(vmovl_u32(vld1_u32(w))); w = (const int32_t*) w + 2;
52 int32x4_t vacc0xAB = vreinterpretq_s32_u64(vmovl_u32(vld1_u32(w))); w = (const int32_t*) w + 2;
53 int32x4_t vacc0xCD = vreinterpretq_s32_u64(vmovl_u32(vld1_u32(w))); w = (const int32_t*) w + 2;
54 int32x4_t vacc0xEF = vreinterpretq_s32_u64(vmovl_u32(vld1_u32(w))); w = (const int32_t*) w + 2;
55
56 size_t p = ks;
57 do {
58 const int8_t* restrict a0 = a[0];
59 if XNN_UNPREDICTABLE(a0 != zero) {
60 a0 = (const int8_t*) ((uintptr_t) a0 + a_offset);
61 }
62 a += 1;
63
64 size_t k = kc;
65 do {
66 int8x8_t va0x0 = vld1_s8(a0); a0 += 8;
67
68 const int8x8_t vb01c0x0 = vld1_s8(w); w = (const int8_t*) w + 8;
69 const int8x8_t vb23c0x0 = vld1_s8(w); w = (const int8_t*) w + 8;
70 const int8x8_t vb45c0x0 = vld1_s8(w); w = (const int8_t*) w + 8;
71 const int8x8_t vb67c0x0 = vld1_s8(w); w = (const int8_t*) w + 8;
72 const int8x8_t vb89c0x0 = vld1_s8(w); w = (const int8_t*) w + 8;
73 const int8x8_t vbABc0x0 = vld1_s8(w); w = (const int8_t*) w + 8;
74 const int8x8_t vbCDc0x0 = vld1_s8(w); w = (const int8_t*) w + 8;
75 const int8x8_t vbEFc0x0 = vld1_s8(w); w = (const int8_t*) w + 8;
76 const int8x8_t vb01c1x0 = vld1_s8(w); w = (const int8_t*) w + 8;
77 const int8x8_t vb23c1x0 = vld1_s8(w); w = (const int8_t*) w + 8;
78 const int8x8_t vb45c1x0 = vld1_s8(w); w = (const int8_t*) w + 8;
79 const int8x8_t vb67c1x0 = vld1_s8(w); w = (const int8_t*) w + 8;
80 const int8x8_t vb89c1x0 = vld1_s8(w); w = (const int8_t*) w + 8;
81 const int8x8_t vbABc1x0 = vld1_s8(w); w = (const int8_t*) w + 8;
82 const int8x8_t vbCDc1x0 = vld1_s8(w); w = (const int8_t*) w + 8;
83 const int8x8_t vbEFc1x0 = vld1_s8(w); w = (const int8_t*) w + 8;
84
85 int16x8_t vprod0x01c0 = vmull_s8(vb01c0x0, va0x0);
86 vacc0x01 = vpadalq_s16(vacc0x01, vprod0x01c0);
87 int16x8_t vprod0x23c0 = vmull_s8(vb23c0x0, va0x0);
88 vacc0x23 = vpadalq_s16(vacc0x23, vprod0x23c0);
89 int16x8_t vprod0x45c0 = vmull_s8(vb45c0x0, va0x0);
90 vacc0x45 = vpadalq_s16(vacc0x45, vprod0x45c0);
91 int16x8_t vprod0x67c0 = vmull_s8(vb67c0x0, va0x0);
92 vacc0x67 = vpadalq_s16(vacc0x67, vprod0x67c0);
93 int16x8_t vprod0x89c0 = vmull_s8(vb89c0x0, va0x0);
94 vacc0x89 = vpadalq_s16(vacc0x89, vprod0x89c0);
95 int16x8_t vprod0xABc0 = vmull_s8(vbABc0x0, va0x0);
96 vacc0xAB = vpadalq_s16(vacc0xAB, vprod0xABc0);
97 int16x8_t vprod0xCDc0 = vmull_s8(vbCDc0x0, va0x0);
98 vacc0xCD = vpadalq_s16(vacc0xCD, vprod0xCDc0);
99 int16x8_t vprod0xEFc0 = vmull_s8(vbEFc0x0, va0x0);
100 vacc0xEF = vpadalq_s16(vacc0xEF, vprod0xEFc0);
101 va0x0 = vext_s8(va0x0, va0x0, 4);
102 int16x8_t vprod0x01c1 = vmull_s8(vb01c1x0, va0x0);
103 vacc0x01 = vpadalq_s16(vacc0x01, vprod0x01c1);
104 int16x8_t vprod0x23c1 = vmull_s8(vb23c1x0, va0x0);
105 vacc0x23 = vpadalq_s16(vacc0x23, vprod0x23c1);
106 int16x8_t vprod0x45c1 = vmull_s8(vb45c1x0, va0x0);
107 vacc0x45 = vpadalq_s16(vacc0x45, vprod0x45c1);
108 int16x8_t vprod0x67c1 = vmull_s8(vb67c1x0, va0x0);
109 vacc0x67 = vpadalq_s16(vacc0x67, vprod0x67c1);
110 int16x8_t vprod0x89c1 = vmull_s8(vb89c1x0, va0x0);
111 vacc0x89 = vpadalq_s16(vacc0x89, vprod0x89c1);
112 int16x8_t vprod0xABc1 = vmull_s8(vbABc1x0, va0x0);
113 vacc0xAB = vpadalq_s16(vacc0xAB, vprod0xABc1);
114 int16x8_t vprod0xCDc1 = vmull_s8(vbCDc1x0, va0x0);
115 vacc0xCD = vpadalq_s16(vacc0xCD, vprod0xCDc1);
116 int16x8_t vprod0xEFc1 = vmull_s8(vbEFc1x0, va0x0);
117 vacc0xEF = vpadalq_s16(vacc0xEF, vprod0xEFc1);
118
119 k -= 8 * sizeof(int8_t);
120 } while (k != 0);
121
122 p -= 1 * sizeof(void*);
123 } while (p != 0);
124
125 #if XNN_ARCH_ARM64
126 int32x4_t vacc0x0123 = vpaddq_s32(vacc0x01, vacc0x23);
127 int32x4_t vacc0x4567 = vpaddq_s32(vacc0x45, vacc0x67);
128 int32x4_t vacc0x89AB = vpaddq_s32(vacc0x89, vacc0xAB);
129 int32x4_t vacc0xCDEF = vpaddq_s32(vacc0xCD, vacc0xEF);
130 #else
131 const int32x2_t vsum0x01 = vpadd_s32(vget_low_s32(vacc0x01), vget_high_s32(vacc0x01));
132 const int32x2_t vsum0x23 = vpadd_s32(vget_low_s32(vacc0x23), vget_high_s32(vacc0x23));
133 int32x4_t vacc0x0123 = vcombine_s32(vsum0x01, vsum0x23);
134 const int32x2_t vsum0x45 = vpadd_s32(vget_low_s32(vacc0x45), vget_high_s32(vacc0x45));
135 const int32x2_t vsum0x67 = vpadd_s32(vget_low_s32(vacc0x67), vget_high_s32(vacc0x67));
136 int32x4_t vacc0x4567 = vcombine_s32(vsum0x45, vsum0x67);
137 const int32x2_t vsum0x89 = vpadd_s32(vget_low_s32(vacc0x89), vget_high_s32(vacc0x89));
138 const int32x2_t vsum0xAB = vpadd_s32(vget_low_s32(vacc0xAB), vget_high_s32(vacc0xAB));
139 int32x4_t vacc0x89AB = vcombine_s32(vsum0x89, vsum0xAB);
140 const int32x2_t vsum0xCD = vpadd_s32(vget_low_s32(vacc0xCD), vget_high_s32(vacc0xCD));
141 const int32x2_t vsum0xEF = vpadd_s32(vget_low_s32(vacc0xEF), vget_high_s32(vacc0xEF));
142 int32x4_t vacc0xCDEF = vcombine_s32(vsum0xCD, vsum0xEF);
143 #endif
144
145 const int32x4_t vright_pre_shift = vld1q_dup_s32(¶ms->rndnu_neon.right_pre_shift);
146 const int32x4_t vmultiplier = vld1q_dup_s32(¶ms->rndnu_neon.multiplier);
147 const int32x4_t vright_post_shift = vld1q_dup_s32(¶ms->rndnu_neon.right_post_shift);
148
149 vacc0x0123 = vqshlq_s32(vacc0x0123, vright_pre_shift);
150 vacc0x4567 = vqshlq_s32(vacc0x4567, vright_pre_shift);
151 vacc0x89AB = vqshlq_s32(vacc0x89AB, vright_pre_shift);
152 vacc0xCDEF = vqshlq_s32(vacc0xCDEF, vright_pre_shift);
153
154 vacc0x0123 = vqdmulhq_s32(vacc0x0123, vmultiplier);
155 vacc0x4567 = vqdmulhq_s32(vacc0x4567, vmultiplier);
156 vacc0x89AB = vqdmulhq_s32(vacc0x89AB, vmultiplier);
157 vacc0xCDEF = vqdmulhq_s32(vacc0xCDEF, vmultiplier);
158
159 vacc0x0123 = vrshlq_s32(vacc0x0123, vright_post_shift);
160 vacc0x4567 = vrshlq_s32(vacc0x4567, vright_post_shift);
161 vacc0x89AB = vrshlq_s32(vacc0x89AB, vright_post_shift);
162 vacc0xCDEF = vrshlq_s32(vacc0xCDEF, vright_post_shift);
163
164 const int16x8_t voutput_zero_point = vld1q_dup_s16(¶ms->rndnu_neon.output_zero_point);
165 #if XNN_ARCH_ARM64
166 int16x8_t vacc0x01234567 = vqmovn_high_s32(vqmovn_s32(vacc0x0123), vacc0x4567);
167 int16x8_t vacc0x89ABCDEF = vqmovn_high_s32(vqmovn_s32(vacc0x89AB), vacc0xCDEF);
168
169 vacc0x01234567 = vqaddq_s16(vacc0x01234567, voutput_zero_point);
170 vacc0x89ABCDEF = vqaddq_s16(vacc0x89ABCDEF, voutput_zero_point);
171
172 int8x16_t vout0x0123456789ABCDEF = vqmovn_high_s16(vqmovn_s16(vacc0x01234567), vacc0x89ABCDEF);
173 #else
174 int16x8_t vacc0x01234567 = vcombine_s16(vqmovn_s32(vacc0x0123), vqmovn_s32(vacc0x4567));
175 int16x8_t vacc0x89ABCDEF = vcombine_s16(vqmovn_s32(vacc0x89AB), vqmovn_s32(vacc0xCDEF));
176
177 vacc0x01234567 = vqaddq_s16(vacc0x01234567, voutput_zero_point);
178 vacc0x89ABCDEF = vqaddq_s16(vacc0x89ABCDEF, voutput_zero_point);
179
180 int8x16_t vout0x0123456789ABCDEF = vcombine_s8(vqmovn_s16(vacc0x01234567), vqmovn_s16(vacc0x89ABCDEF));
181 #endif
182
183 const int8x16_t voutput_min = vld1q_dup_s8(¶ms->rndnu_neon.output_min);
184 vout0x0123456789ABCDEF = vmaxq_s8(vout0x0123456789ABCDEF, voutput_min);
185
186 const int8x16_t voutput_max = vld1q_dup_s8(¶ms->rndnu_neon.output_max);
187 vout0x0123456789ABCDEF = vminq_s8(vout0x0123456789ABCDEF, voutput_max);
188
189 if (nc >= 16) {
190 vst1q_s8(c0 + 0, vout0x0123456789ABCDEF);
191
192 c0 = (int8_t*) ((uintptr_t) c0 + cn_stride);
193
194 a = (const int8_t**restrict) ((uintptr_t) a - ks);
195
196 nc -= 16;
197 } else {
198 int8x8_t vout0x01234567 = vget_low_s8(vout0x0123456789ABCDEF);
199 if (nc & 8) {
200 vst1_s8(c0, vout0x01234567); c0 += 8;
201 vout0x01234567 = vget_high_s8(vout0x0123456789ABCDEF);
202 }
203 if (nc & 4) {
204 vst1_lane_u32((void*) c0, vreinterpret_u32_s8(vout0x01234567), 0); c0 += 4;
205 vout0x01234567 = vext_s8(vout0x01234567, vout0x01234567, 4);
206 }
207 if (nc & 2) {
208 vst1_lane_u16((void*) c0, vreinterpret_u16_s8(vout0x01234567), 0); c0 += 2;
209 vout0x01234567 = vext_s8(vout0x01234567, vout0x01234567, 2);
210 }
211 if (nc & 1) {
212 vst1_lane_s8(c0, vout0x01234567, 0);
213 }
214
215 nc = 0;
216 }
217 } while (nc != 0);
218 }
219