xref: /aosp_15_r20/external/XNNPACK/src/qs8-gemm/gen/1x8c8-xw-minmax-fp32-avx2.c (revision 4bdc94577ba0e567308109d787f7fec7b531ce36)
1 // Auto-generated file. Do not edit!
2 //   Template: src/qs8-gemm/MRx8c8-avx2.c.in
3 //   Generator: tools/xngen
4 //
5 // Copyright 2020 Google LLC
6 //
7 // This source code is licensed under the BSD-style license found in the
8 // LICENSE file in the root directory of this source tree.
9 
10 #include <assert.h>
11 
12 #include <immintrin.h>
13 
14 #include <xnnpack/gemm.h>
15 #include <xnnpack/intrinsics-polyfill.h>
16 #include <xnnpack/math.h>
17 #include <xnnpack/unaligned.h>
18 
19 
xnn_qs8_gemm_xw_minmax_fp32_ukernel_1x8c8__avx2(size_t mr,size_t nc,size_t kc,const int8_t * restrict a,size_t a_stride,const void * restrict w,int8_t * restrict c,size_t cm_stride,size_t cn_stride,const union xnn_qs8_conv_minmax_params params[restrict XNN_MIN_ELEMENTS (1)])20 void xnn_qs8_gemm_xw_minmax_fp32_ukernel_1x8c8__avx2(
21     size_t mr,
22     size_t nc,
23     size_t kc,
24     const int8_t* restrict a,
25     size_t a_stride,
26     const void* restrict w,
27     int8_t* restrict c,
28     size_t cm_stride,
29     size_t cn_stride,
30     const union xnn_qs8_conv_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_OOB_READS
31 {
32   assert(mr != 0);
33   assert(mr <= 1);
34   assert(nc != 0);
35   assert(kc != 0);
36   assert(kc % sizeof(int8_t) == 0);
37   assert(a != NULL);
38   assert(w != NULL);
39   assert(c != NULL);
40 
41   kc = round_up_po2(kc, 8);
42   const int8_t* a0 = a;
43   int8_t* c0 = c;
44 
45   do {
46     const __m128i vbias0x0 = _mm_cvtsi32_si128(((const int*) w)[0]);
47     const __m128i vbias0x1 = _mm_cvtsi32_si128(((const int*) w)[1]);
48     __m256i vacc0x01 = _mm256_inserti128_si256(_mm256_castsi128_si256(vbias0x0), vbias0x1, 1);
49     const __m128i vbias0x2 = _mm_cvtsi32_si128(((const int*) w)[2]);
50     const __m128i vbias0x3 = _mm_cvtsi32_si128(((const int*) w)[3]);
51     __m256i vacc0x23 = _mm256_inserti128_si256(_mm256_castsi128_si256(vbias0x2), vbias0x3, 1);
52     const __m128i vbias0x4 = _mm_cvtsi32_si128(((const int*) w)[4]);
53     const __m128i vbias0x5 = _mm_cvtsi32_si128(((const int*) w)[5]);
54     __m256i vacc0x45 = _mm256_inserti128_si256(_mm256_castsi128_si256(vbias0x4), vbias0x5, 1);
55     const __m128i vbias0x6 = _mm_cvtsi32_si128(((const int*) w)[6]);
56     const __m128i vbias0x7 = _mm_cvtsi32_si128(((const int*) w)[7]);
57     __m256i vacc0x67 = _mm256_inserti128_si256(_mm256_castsi128_si256(vbias0x6), vbias0x7, 1);
58     w = (const int32_t*) w + 8;
59 
60     size_t k = 0;
61     while (k < kc) {
62       const __m128i va0 = _mm_broadcastq_epi64(_mm_loadl_epi64((const __m128i*) a0));
63       const __m256i vxa0 = _mm256_cvtepi8_epi16(va0);
64       a0 += 8;
65 
66       const __m256i vxb01 = _mm256_load_si256((const __m256i*) w);
67 
68       vacc0x01 = _mm256_add_epi32(vacc0x01, _mm256_madd_epi16(vxa0, vxb01));
69       const __m256i vxb23 = _mm256_load_si256((const __m256i*) ((const int16_t*) w + 16));
70 
71       vacc0x23 = _mm256_add_epi32(vacc0x23, _mm256_madd_epi16(vxa0, vxb23));
72       const __m256i vxb45 = _mm256_load_si256((const __m256i*) ((const int16_t*) w + 32));
73 
74       vacc0x45 = _mm256_add_epi32(vacc0x45, _mm256_madd_epi16(vxa0, vxb45));
75       const __m256i vxb67 = _mm256_load_si256((const __m256i*) ((const int16_t*) w + 48));
76 
77       vacc0x67 = _mm256_add_epi32(vacc0x67, _mm256_madd_epi16(vxa0, vxb67));
78 
79       w = (const void*) ((const int16_t*) w + 64);
80       k += 8 * sizeof(int8_t);
81     }
82 
83     const __m256i vacc0x0213 = _mm256_hadd_epi32(vacc0x01, vacc0x23);
84     const __m256i vacc0x4657 = _mm256_hadd_epi32(vacc0x45, vacc0x67);
85 
86     const __m256i vacc0x02461357 = _mm256_hadd_epi32(vacc0x0213, vacc0x4657);
87 
88     const __m256i vpermute_mask = _mm256_set_epi32(7, 3, 6, 2, 5, 1, 4, 0);
89     __m256i vacc0x01234567 = _mm256_permutevar8x32_epi32(vacc0x02461357, vpermute_mask);
90 
91     __m256 vscaled0x01234567 = _mm256_cvtepi32_ps(vacc0x01234567);
92 
93     const __m256 vscale = _mm256_load_ps(params->fp32_avx2.scale);
94     vscaled0x01234567 = _mm256_mul_ps(vscaled0x01234567, vscale);
95 
96     const __m256 voutput_max_less_zero_point = _mm256_load_ps(params->fp32_avx2.output_max_less_zero_point);
97     vscaled0x01234567 = _mm256_min_ps(vscaled0x01234567, voutput_max_less_zero_point);
98 
99     vacc0x01234567 = _mm256_cvtps_epi32(vscaled0x01234567);
100 
101     const __m256i voutput_zero_point = _mm256_load_si256((const __m256i*) params->fp32_avx2.output_zero_point);
102     __m256i vacc00x01234567 = _mm256_adds_epi16(_mm256_packs_epi32(vacc0x01234567, vacc0x01234567), voutput_zero_point);
103 
104     vacc00x01234567 = _mm256_permute4x64_epi64(vacc00x01234567, _MM_SHUFFLE(3, 1, 2, 0));
105 
106     __m256i vout = _mm256_packs_epi16(vacc00x01234567, vacc00x01234567);
107 
108     vout = _mm256_max_epi8(vout, _mm256_load_si256((const __m256i*) params->fp32_avx2.output_min));
109 
110     __m128i vout_lo = _mm256_castsi256_si128(vout);
111     __m128i vout_hi = _mm256_extracti128_si256(vout, 1);
112 
113     if (nc >= 8) {
114       _mm_storel_epi64((__m128i*) c0, vout_lo);
115 
116       c0 = (int8_t*) ((uintptr_t) c0 + cn_stride);
117 
118       a0 = (const int8_t*) ((uintptr_t) a0 - kc);
119 
120       nc -= 8;
121     } else {
122       if (nc & 4) {
123         _mm_storeu_si32(c0, vout_lo);
124 
125         c0 += 4;
126 
127         vout_lo = _mm_srli_epi64(vout_lo, 32);
128         vout_hi = _mm_srli_epi64(vout_hi, 32);
129       }
130       if (nc & 2) {
131         unaligned_store_u16(c0, (uint16_t) _mm_extract_epi16(vout_lo, 0));
132 
133         c0 += 2;
134 
135         vout_lo = _mm_srli_epi32(vout_lo, 16);
136         vout_hi = _mm_srli_epi32(vout_hi, 16);
137       }
138       if (nc & 1) {
139         *c0 = (int8_t) _mm_extract_epi8(vout_lo, 0);
140       }
141 
142       nc = 0;
143     }
144   } while (nc != 0);
145 }
146