1 // Auto-generated file. Do not edit!
2 // Template: src/qs8-gemm/c4-armsimd32.c.in
3 // Generator: tools/xngen
4 //
5 // Copyright 2022 Google LLC
6 //
7 // This source code is licensed under the BSD-style license found in the
8 // LICENSE file in the root directory of this source tree.
9
10 #include <assert.h>
11
12 #include <arm_acle.h>
13
14 #include <xnnpack/intrinsics-polyfill.h>
15 #include <xnnpack/math.h>
16 #include <xnnpack/gemm.h>
17 #include <xnnpack/unaligned.h>
18
19
xnn_qs8_gemm_minmax_fp32_ukernel_1x2c4__armsimd32(size_t mr,size_t nc,size_t kc,const int8_t * restrict a,size_t a_stride,const void * restrict w,int8_t * restrict c,size_t cm_stride,size_t cn_stride,const union xnn_qs8_conv_minmax_params params[restrict XNN_MIN_ELEMENTS (1)])20 void xnn_qs8_gemm_minmax_fp32_ukernel_1x2c4__armsimd32(
21 size_t mr,
22 size_t nc,
23 size_t kc,
24 const int8_t* restrict a,
25 size_t a_stride,
26 const void* restrict w,
27 int8_t* restrict c,
28 size_t cm_stride,
29 size_t cn_stride,
30 const union xnn_qs8_conv_minmax_params params[restrict XNN_MIN_ELEMENTS(1)])
31 {
32 assert(mr != 0);
33 assert(mr <= 1);
34 assert(nc != 0);
35 assert(kc != 0);
36
37 kc = round_up_po2(kc, 4 * sizeof(int8_t));
38 const int8_t* a0 = a;
39 int8_t* c0 = c;
40
41 const float vscale = params->fp32_armsimd32.scale;
42 const float vmagic_bias = params->fp32_armsimd32.magic_bias;
43 do {
44 int32_t vacc0x0 = ((const int32_t*) w)[0];
45 int32_t vacc0x1 = ((const int32_t*) w)[1];
46 w = (const void*) ((const int32_t*) w + 2);
47
48 size_t k = kc;
49 do {
50 const int8x4_t va0 = (int8x4_t) unaligned_load_s32(a0); a0 += 4;
51
52 const int16x2_t va0c02 = __sxtb16(va0);
53 const int16x2_t va0c13 = __sxtb16(__ror(va0, 8));
54
55 const int8x4_t vb0 = *((const int8x4_t*) w); w = (const int8_t*) w + 4;
56 const int16x2_t vb0c02 = __sxtb16(vb0);
57
58 vacc0x0 = __smlad(va0c02, vb0c02, vacc0x0);
59
60 const int16x2_t vb0c13 = __sxtb16(__ror(vb0, 8));
61 vacc0x0 = __smlad(va0c13, vb0c13, vacc0x0);
62 const int8x4_t vb1 = *((const int8x4_t*) w); w = (const int8_t*) w + 4;
63 const int16x2_t vb1c02 = __sxtb16(vb1);
64
65 vacc0x1 = __smlad(va0c02, vb1c02, vacc0x1);
66
67 const int16x2_t vb1c13 = __sxtb16(__ror(vb1, 8));
68 vacc0x1 = __smlad(va0c13, vb1c13, vacc0x1);
69
70 k -= 4 * sizeof(int8_t);
71 } while (k != 0);
72
73 float vfpacc0x0 = (float) vacc0x0;
74 float vfpacc0x1 = (float) vacc0x1;
75
76 vfpacc0x0 *= vscale;
77 vfpacc0x1 *= vscale;
78
79 vfpacc0x0 += vmagic_bias;
80 vfpacc0x1 += vmagic_bias;
81
82 int32_t vout0x0 = (int32_t) float_as_uint32(vfpacc0x0);
83 int32_t vout0x1 = (int32_t) float_as_uint32(vfpacc0x1);
84
85 const int32_t vmagic_bias_less_zero_point = params->fp32_armsimd32.magic_bias_less_zero_point;
86 vout0x0 = __qsub(vout0x0, vmagic_bias_less_zero_point);
87 vout0x1 = __qsub(vout0x1, vmagic_bias_less_zero_point);
88
89 vout0x0 = __ssat(vout0x0, 8);
90 vout0x1 = __ssat(vout0x1, 8);
91
92 const uint32_t vout0 = (uint32_t) (uint8_t) vout0x0 | ((uint32_t) vout0x1 << 8);
93
94 uint32_t vout = vout0;
95
96 const int8x4_t voutput_min = (int8x4_t) params->fp32_armsimd32.output_min;
97 __ssub8((int8x4_t) vout, voutput_min);
98 vout = (uint32_t) __sel((uint8x4_t) vout, (uint8x4_t) voutput_min);
99
100 const int8x4_t voutput_max = (int8x4_t) params->fp32_armsimd32.output_max;
101 __ssub8((int8x4_t) vout, voutput_max);
102 vout = (uint32_t) __sel((uint8x4_t) voutput_max, (uint8x4_t) vout);
103
104 if XNN_LIKELY(nc >= 2) {
105 unaligned_store_u16(c0, (uint16_t) vout);
106
107 a0 = (const int8_t*) ((uintptr_t) a0 - kc);
108
109 c0 = (int8_t*) ((uintptr_t) c0 + cn_stride);
110
111 nc -= 2;
112 } else {
113 *c0 = (int8_t) vout;
114
115 nc = 0;
116 }
117 } while (nc != 0);
118 }
119