xref: /aosp_15_r20/external/XNNPACK/src/qs8-gemm/gen/1x1c4-minmax-fp32-armsimd32.c (revision 4bdc94577ba0e567308109d787f7fec7b531ce36)
1 // Auto-generated file. Do not edit!
2 //   Template: src/qs8-gemm/c4-armsimd32.c.in
3 //   Generator: tools/xngen
4 //
5 // Copyright 2022 Google LLC
6 //
7 // This source code is licensed under the BSD-style license found in the
8 // LICENSE file in the root directory of this source tree.
9 
10 #include <assert.h>
11 
12 #include <arm_acle.h>
13 
14 #include <xnnpack/intrinsics-polyfill.h>
15 #include <xnnpack/math.h>
16 #include <xnnpack/gemm.h>
17 #include <xnnpack/unaligned.h>
18 
19 
xnn_qs8_gemm_minmax_fp32_ukernel_1x1c4__armsimd32(size_t mr,size_t nc,size_t kc,const int8_t * restrict a,size_t a_stride,const void * restrict w,int8_t * restrict c,size_t cm_stride,size_t cn_stride,const union xnn_qs8_conv_minmax_params params[restrict XNN_MIN_ELEMENTS (1)])20 void xnn_qs8_gemm_minmax_fp32_ukernel_1x1c4__armsimd32(
21     size_t mr,
22     size_t nc,
23     size_t kc,
24     const int8_t* restrict a,
25     size_t a_stride,
26     const void* restrict w,
27     int8_t* restrict c,
28     size_t cm_stride,
29     size_t cn_stride,
30     const union xnn_qs8_conv_minmax_params params[restrict XNN_MIN_ELEMENTS(1)])
31 {
32   assert(mr != 0);
33   assert(mr <= 1);
34   assert(nc != 0);
35   assert(kc != 0);
36 
37   kc = round_up_po2(kc, 4 * sizeof(int8_t));
38   const int8_t* a0 = a;
39   int8_t* c0 = c;
40 
41   const float vscale = params->fp32_armsimd32.scale;
42   const float vmagic_bias = params->fp32_armsimd32.magic_bias;
43   do {
44     int32_t vacc0x0 = ((const int32_t*) w)[0];
45     w = (const void*) ((const int32_t*) w + 1);
46 
47     size_t k = kc;
48     do {
49       const int8x4_t va0 = (int8x4_t) unaligned_load_s32(a0); a0 += 4;
50 
51       const int16x2_t va0c02 = __sxtb16(va0);
52       const int16x2_t va0c13 = __sxtb16(__ror(va0, 8));
53 
54       const int8x4_t vb0 = *((const int8x4_t*) w); w = (const int8_t*) w + 4;
55       const int16x2_t vb0c02 = __sxtb16(vb0);
56 
57       vacc0x0 = __smlad(va0c02, vb0c02, vacc0x0);
58 
59       const int16x2_t vb0c13 = __sxtb16(__ror(vb0, 8));
60       vacc0x0 = __smlad(va0c13, vb0c13, vacc0x0);
61 
62       k -= 4 * sizeof(int8_t);
63     } while (k != 0);
64 
65     float vfpacc0x0 = (float) vacc0x0;
66 
67     vfpacc0x0 *= vscale;
68 
69     vfpacc0x0 += vmagic_bias;
70 
71     int32_t vout0x0 = (int32_t) float_as_uint32(vfpacc0x0);
72 
73     const int32_t vmagic_bias_less_zero_point = params->fp32_armsimd32.magic_bias_less_zero_point;
74     vout0x0 = __qsub(vout0x0, vmagic_bias_less_zero_point);
75 
76     vout0x0 = __ssat(vout0x0, 8);
77 
78     const uint32_t vout0 = (uint32_t) vout0x0;
79 
80     uint32_t vout = vout0;
81 
82     const int8x4_t voutput_min = (int8x4_t) params->fp32_armsimd32.output_min;
83     __ssub8((int8x4_t) vout, voutput_min);
84     vout = (uint32_t) __sel((uint8x4_t) vout, (uint8x4_t) voutput_min);
85 
86     const int8x4_t voutput_max = (int8x4_t) params->fp32_armsimd32.output_max;
87     __ssub8((int8x4_t) vout, voutput_max);
88     vout = (uint32_t) __sel((uint8x4_t) voutput_max, (uint8x4_t) vout);
89 
90     *c0 = (int8_t) vout;
91 
92     a0 = (const int8_t*) ((uintptr_t) a0 - kc);
93 
94     c0 = (int8_t*) ((uintptr_t) c0 + cn_stride);
95 
96     nc -= 1;
97   } while (nc != 0);
98 }
99