1 // Auto-generated file. Do not edit!
2 // Template: src/qs8-gemm/c4-neondot.c.in
3 // Generator: tools/xngen
4 //
5 // Copyright 2020 Google LLC
6 //
7 // This source code is licensed under the BSD-style license found in the
8 // LICENSE file in the root directory of this source tree.
9
10 #include <assert.h>
11
12 #include <arm_neon.h>
13
14 #include <xnnpack/gemm.h>
15 #include <xnnpack/math.h>
16
17
xnn_qs8_gemm_minmax_rndnu_ukernel_1x16c4__neondot(size_t mr,size_t nc,size_t kc,const int8_t * restrict a,size_t a_stride,const void * restrict w,int8_t * restrict c,size_t cm_stride,size_t cn_stride,const union xnn_qs8_conv_minmax_params params[restrict XNN_MIN_ELEMENTS (1)])18 void xnn_qs8_gemm_minmax_rndnu_ukernel_1x16c4__neondot(
19 size_t mr,
20 size_t nc,
21 size_t kc,
22 const int8_t* restrict a,
23 size_t a_stride,
24 const void* restrict w,
25 int8_t* restrict c,
26 size_t cm_stride,
27 size_t cn_stride,
28 const union xnn_qs8_conv_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_OOB_READS
29 {
30 assert(mr != 0);
31 assert(mr <= 1);
32 assert(nc != 0);
33 assert(kc != 0);
34 assert(kc % sizeof(int8_t) == 0);
35 assert(a != NULL);
36 assert(w != NULL);
37 assert(c != NULL);
38
39 kc = round_up_po2(kc, 4 * sizeof(int8_t));
40 const int8_t* a0 = a;
41 int8_t* c0 = c;
42
43 // Loop over groups of 16 columns.
44 do {
45 // Initialize accumulators with bias. 16 bias values are loaded from the
46 // weight matrix, at the start of the group of 16 columns.
47 int32x4_t vacc0x0123 = vld1q_s32(w); w = (const void*) ((const int32_t*) w + 4);
48 int32x4_t vacc0x4567 = vld1q_s32(w); w = (const void*) ((const int32_t*) w + 4);
49 int32x4_t vacc0x89AB = vld1q_s32(w); w = (const void*) ((const int32_t*) w + 4);
50 int32x4_t vacc0xCDEF = vld1q_s32(w); w = (const void*) ((const int32_t*) w + 4);
51
52 // Inner accumulation loop along the 16 columns.
53 size_t k = kc;
54 // 2x partial unrolled loop to load 8 bytes at a time.
55 while (k >= 8 * sizeof(int8_t)) {
56 // Load a 1x8 block of activations.
57 const int8x8_t va0x01234567 = vld1_s8(a0); a0 += 8;
58
59 // Load a 8x16 block of weights.
60 const int8x16_t vb0123x0123 = vld1q_s8(w); w = (const void*) ((const int8_t*) w + 16);
61 const int8x16_t vb0123x4567 = vld1q_s8(w); w = (const void*) ((const int8_t*) w + 16);
62 const int8x16_t vb0123x89AB = vld1q_s8(w); w = (const void*) ((const int8_t*) w + 16);
63 const int8x16_t vb0123xCDEF = vld1q_s8(w); w = (const void*) ((const int8_t*) w + 16);
64 const int8x16_t vb4567x0123 = vld1q_s8(w); w = (const void*) ((const int8_t*) w + 16);
65 const int8x16_t vb4567x4567 = vld1q_s8(w); w = (const void*) ((const int8_t*) w + 16);
66 const int8x16_t vb4567x89AB = vld1q_s8(w); w = (const void*) ((const int8_t*) w + 16);
67 const int8x16_t vb4567xCDEF = vld1q_s8(w); w = (const void*) ((const int8_t*) w + 16);
68
69 // Multiply-accumulate: 1x8 * 8x16 --> 1x16.
70 vacc0x0123 = vdotq_lane_s32(vacc0x0123, vb0123x0123, va0x01234567, 0);
71 vacc0x4567 = vdotq_lane_s32(vacc0x4567, vb0123x4567, va0x01234567, 0);
72 vacc0x89AB = vdotq_lane_s32(vacc0x89AB, vb0123x89AB, va0x01234567, 0);
73 vacc0xCDEF = vdotq_lane_s32(vacc0xCDEF, vb0123xCDEF, va0x01234567, 0);
74 vacc0x0123 = vdotq_lane_s32(vacc0x0123, vb4567x0123, va0x01234567, 1);
75 vacc0x4567 = vdotq_lane_s32(vacc0x4567, vb4567x4567, va0x01234567, 1);
76 vacc0x89AB = vdotq_lane_s32(vacc0x89AB, vb4567x89AB, va0x01234567, 1);
77 vacc0xCDEF = vdotq_lane_s32(vacc0xCDEF, vb4567xCDEF, va0x01234567, 1);
78
79 k -= 8 * sizeof(int8_t);
80 }
81 // Handle up to 4 final positions of `k`
82 if XNN_UNLIKELY(k != 0) {
83 // Load a 1x4 block of activations.
84 const int8x8_t va0x01234567 = vld1_s8(a0); a0 += 4;
85
86 // Load a 4x16 block of weights.
87 const int8x16_t vb0123x0123 = vld1q_s8(w); w = (const void*) ((const int8_t*) w + 16);
88 const int8x16_t vb0123x4567 = vld1q_s8(w); w = (const void*) ((const int8_t*) w + 16);
89 const int8x16_t vb0123x89AB = vld1q_s8(w); w = (const void*) ((const int8_t*) w + 16);
90 const int8x16_t vb0123xCDEF = vld1q_s8(w); w = (const void*) ((const int8_t*) w + 16);
91
92 // Multiply-accumulate: 1x4 * 4x16 --> 1x16.
93 vacc0x0123 = vdotq_lane_s32(vacc0x0123, vb0123x0123, va0x01234567, 0);
94 vacc0x4567 = vdotq_lane_s32(vacc0x4567, vb0123x4567, va0x01234567, 0);
95 vacc0x89AB = vdotq_lane_s32(vacc0x89AB, vb0123x89AB, va0x01234567, 0);
96 vacc0xCDEF = vdotq_lane_s32(vacc0xCDEF, vb0123xCDEF, va0x01234567, 0);
97 }
98
99 const int32x4_t vright_pre_shift = vld1q_dup_s32(¶ms->rndnu_neon.right_pre_shift);
100 const int32x4_t vmultiplier = vld1q_dup_s32(¶ms->rndnu_neon.multiplier);
101 const int32x4_t vright_post_shift = vld1q_dup_s32(¶ms->rndnu_neon.right_post_shift);
102
103 vacc0x0123 = vqshlq_s32(vacc0x0123, vright_pre_shift);
104 vacc0x4567 = vqshlq_s32(vacc0x4567, vright_pre_shift);
105 vacc0x89AB = vqshlq_s32(vacc0x89AB, vright_pre_shift);
106 vacc0xCDEF = vqshlq_s32(vacc0xCDEF, vright_pre_shift);
107
108 vacc0x0123 = vqdmulhq_s32(vacc0x0123, vmultiplier);
109 vacc0x4567 = vqdmulhq_s32(vacc0x4567, vmultiplier);
110 vacc0x89AB = vqdmulhq_s32(vacc0x89AB, vmultiplier);
111 vacc0xCDEF = vqdmulhq_s32(vacc0xCDEF, vmultiplier);
112
113 vacc0x0123 = vrshlq_s32(vacc0x0123, vright_post_shift);
114 vacc0x4567 = vrshlq_s32(vacc0x4567, vright_post_shift);
115 vacc0x89AB = vrshlq_s32(vacc0x89AB, vright_post_shift);
116 vacc0xCDEF = vrshlq_s32(vacc0xCDEF, vright_post_shift);
117
118 const int16x8_t voutput_zero_point = vld1q_dup_s16(¶ms->rndnu_neon.output_zero_point);
119 #if XNN_ARCH_ARM64
120 const int16x8_t vacc0x01234567 = vqaddq_s16(vqmovn_high_s32(vqmovn_s32(vacc0x0123), vacc0x4567), voutput_zero_point);
121 const int16x8_t vacc0x89ABCDEF = vqaddq_s16(vqmovn_high_s32(vqmovn_s32(vacc0x89AB), vacc0xCDEF), voutput_zero_point);
122
123 int8x16_t vout0x0123456789ABCDEF = vqmovn_high_s16(vqmovn_s16(vacc0x01234567), vacc0x89ABCDEF);
124 #else
125 const int16x8_t vacc0x01234567 = vqaddq_s16(vcombine_s16(vqmovn_s32(vacc0x0123), vqmovn_s32(vacc0x4567)), voutput_zero_point);
126 const int16x8_t vacc0x89ABCDEF = vqaddq_s16(vcombine_s16(vqmovn_s32(vacc0x89AB), vqmovn_s32(vacc0xCDEF)), voutput_zero_point);
127
128 int8x16_t vout0x0123456789ABCDEF = vcombine_s8(vqmovn_s16(vacc0x01234567), vqmovn_s16(vacc0x89ABCDEF));
129 #endif
130 const int8x16_t voutput_min = vld1q_dup_s8(¶ms->rndnu_neon.output_min);
131 const int8x16_t voutput_max = vld1q_dup_s8(¶ms->rndnu_neon.output_max);
132
133 vout0x0123456789ABCDEF = vmaxq_s8(vout0x0123456789ABCDEF, voutput_min);
134
135 vout0x0123456789ABCDEF = vminq_s8(vout0x0123456789ABCDEF, voutput_max);
136
137 if (nc >= 16) {
138 // Main case where there the 16 columns fit in the destination.
139 vst1q_s8(c0 + 0, vout0x0123456789ABCDEF);
140
141 // Advance to the next 16 columns.
142 c0 = (int8_t*) ((uintptr_t) c0 + cn_stride);
143
144 a0 = (const int8_t*) ((uintptr_t) a0 - kc);
145
146 nc -= 16;
147 } else {
148 // Final case where not all of the 16 columns fit in the destination.
149 int8x8_t vout0x01234567 = vget_low_s8(vout0x0123456789ABCDEF);
150 if (nc & 8) {
151 vst1_s8(c0, vout0x01234567); c0 += 8;
152 vout0x01234567 = vget_high_s8(vout0x0123456789ABCDEF);
153 }
154 if (nc & 4) {
155 vst1_lane_u32((void*) c0, vreinterpret_u32_s8(vout0x01234567), 0); c0 += 4;
156 vout0x01234567 = vext_s8(vout0x01234567, vout0x01234567, 4);
157 }
158 if (nc & 2) {
159 vst1_lane_u16((void*) c0, vreinterpret_u16_s8(vout0x01234567), 0); c0 += 2;
160 vout0x01234567 = vext_s8(vout0x01234567, vout0x01234567, 2);
161 }
162 if (nc & 1) {
163 vst1_lane_s8(c0, vout0x01234567, 0);
164 }
165
166 nc = 0;
167 }
168 } while (nc != 0);
169 }
170