xref: /aosp_15_r20/external/XNNPACK/src/qs8-gavgpool/gen/7x-minmax-fp32-sse41-c8.c (revision 4bdc94577ba0e567308109d787f7fec7b531ce36)
1 // Auto-generated file. Do not edit!
2 //   Template: src/qs8-gavgpool/unipass-sse4.c.in
3 //   Generator: tools/xngen
4 //
5 // Copyright 2020 Google LLC
6 //
7 // This source code is licensed under the BSD-style license found in the
8 // LICENSE file in the root directory of this source tree.
9 
10 #include <assert.h>
11 
12 #include <smmintrin.h>
13 
14 #include <xnnpack/gavgpool.h>
15 #include <xnnpack/unaligned.h>
16 
17 
xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__sse41_c8(size_t rows,size_t channels,const int8_t * input,size_t input_stride,const int8_t * zero,int8_t * output,const union xnn_qs8_avgpool_minmax_params params[restrict XNN_MIN_ELEMENTS (1)])18 void xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__sse41_c8(
19     size_t rows,
20     size_t channels,
21     const int8_t* input,
22     size_t input_stride,
23     const int8_t* zero,
24     int8_t* output,
25     const union xnn_qs8_avgpool_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_OOB_READS
26 {
27   assert(rows != 0);
28   assert(rows <= 7);
29   assert(channels != 0);
30 
31   const int8_t* i0 = input;
32   const int8_t* i1 = (const int8_t*) ((uintptr_t) i0 + input_stride);
33   if XNN_UNPREDICTABLE(rows < 2) {
34     i1 = zero;
35   }
36   const int8_t* i2 = (const int8_t*) ((uintptr_t) i1 + input_stride);
37   if XNN_UNPREDICTABLE(rows <= 2) {
38     i2 = zero;
39   }
40   const int8_t* i3 = (const int8_t*) ((uintptr_t) i2 + input_stride);
41   if XNN_UNPREDICTABLE(rows < 4) {
42     i3 = zero;
43   }
44   const int8_t* i4 = (const int8_t*) ((uintptr_t) i3 + input_stride);
45   if XNN_UNPREDICTABLE(rows <= 4) {
46     i4 = zero;
47   }
48   const int8_t* i5 = (const int8_t*) ((uintptr_t) i4 + input_stride);
49   if XNN_UNPREDICTABLE(rows < 6) {
50     i5 = zero;
51   }
52   const int8_t* i6 = (const int8_t*) ((uintptr_t) i5 + input_stride);
53   if XNN_UNPREDICTABLE(rows <= 6) {
54     i6 = zero;
55   }
56 
57   const __m128i vinit_bias = _mm_load_si128((const __m128i*) params->fp32_sse4.init_bias);
58   const __m128 vscale = _mm_load_ps(params->fp32_sse4.scale);
59   const __m128 voutput_max_less_zero_point = _mm_load_ps(params->fp32_sse4.output_max_less_zero_point);
60   const __m128i voutput_zero_point = _mm_load_si128((const __m128i*) params->fp32_sse4.output_zero_point);
61   const __m128i voutput_min = _mm_load_si128((const __m128i*) params->fp32_sse4.output_min);
62   for (; channels >= 8; channels -= 8) {
63     const __m128i vxi0x01234567 = _mm_cvtepi8_epi16(_mm_loadl_epi64((const __m128i*) i0));
64     i0 += 8;
65     const __m128i vxi1x01234567 = _mm_cvtepi8_epi16(_mm_loadl_epi64((const __m128i*) i1));
66     i1 += 8;
67 
68     __m128i vacc01234567 = _mm_add_epi16(vxi0x01234567, vxi1x01234567);
69     const __m128i vxi2x01234567 = _mm_cvtepi8_epi16(_mm_loadl_epi64((const __m128i*) i2));
70     i2 += 8;
71 
72     vacc01234567 = _mm_add_epi16(vacc01234567, vxi2x01234567);
73     const __m128i vxi3x01234567 = _mm_cvtepi8_epi16(_mm_loadl_epi64((const __m128i*) i3));
74     i3 += 8;
75     vacc01234567 = _mm_add_epi16(vacc01234567, vxi3x01234567);
76     const __m128i vxi4x01234567 = _mm_cvtepi8_epi16(_mm_loadl_epi64((const __m128i*) i4));
77     i4 += 8;
78     vacc01234567 = _mm_add_epi16(vacc01234567, vxi4x01234567);
79     const __m128i vxi5x01234567 = _mm_cvtepi8_epi16(_mm_loadl_epi64((const __m128i*) i5));
80     i5 += 8;
81     vacc01234567 = _mm_add_epi16(vacc01234567, vxi5x01234567);
82     const __m128i vxi6x01234567 = _mm_cvtepi8_epi16(_mm_loadl_epi64((const __m128i*) i6));
83     i6 += 8;
84 
85     vacc01234567 = _mm_add_epi16(vacc01234567, vxi6x01234567);
86 
87     __m128i vacc0123 = _mm_cvtepi16_epi32(vacc01234567);
88     __m128i vacc4567 = _mm_srai_epi32(_mm_unpackhi_epi16(vacc01234567, vacc01234567), 16);
89 
90     vacc0123 = _mm_add_epi32(vacc0123, vinit_bias);
91     vacc4567 = _mm_add_epi32(vacc4567, vinit_bias);
92 
93     __m128 vfpacc0123 = _mm_cvtepi32_ps(vacc0123);
94     __m128 vfpacc4567 = _mm_cvtepi32_ps(vacc4567);
95 
96     vfpacc0123 = _mm_mul_ps(vfpacc0123, vscale);
97     vfpacc4567 = _mm_mul_ps(vfpacc4567, vscale);
98 
99     vfpacc0123 = _mm_min_ps(vfpacc0123, voutput_max_less_zero_point);
100     vfpacc4567 = _mm_min_ps(vfpacc4567, voutput_max_less_zero_point);
101 
102     vacc0123 = _mm_cvtps_epi32(vfpacc0123);
103     vacc4567 = _mm_cvtps_epi32(vfpacc4567);
104 
105     __m128i vout01234567 = _mm_adds_epi16(_mm_packs_epi32(vacc0123, vacc4567), voutput_zero_point);
106 
107     __m128i vout0123456701234567 = _mm_packs_epi16(vout01234567, vout01234567);
108 
109     vout0123456701234567 = _mm_max_epi8(vout0123456701234567, voutput_min);
110 
111     _mm_storel_epi64((__m128i*) output, vout0123456701234567);
112     output += 8;
113   }
114   if XNN_UNLIKELY(channels != 0) {
115     {
116       const __m128i vxi0x01234567 = _mm_cvtepi8_epi16(_mm_loadl_epi64((const __m128i*) i0));
117       i0 += 8;
118       const __m128i vxi1x01234567 = _mm_cvtepi8_epi16(_mm_loadl_epi64((const __m128i*) i1));
119       i1 += 8;
120 
121       __m128i vacc01234567 = _mm_add_epi16(vxi0x01234567, vxi1x01234567);
122       const __m128i vxi2x01234567 = _mm_cvtepi8_epi16(_mm_loadl_epi64((const __m128i*) i2));
123       i2 += 8;
124 
125       vacc01234567 = _mm_add_epi16(vacc01234567, vxi2x01234567);
126       const __m128i vxi3x01234567 = _mm_cvtepi8_epi16(_mm_loadl_epi64((const __m128i*) i3));
127       i3 += 8;
128       vacc01234567 = _mm_add_epi16(vacc01234567, vxi3x01234567);
129       const __m128i vxi4x01234567 = _mm_cvtepi8_epi16(_mm_loadl_epi64((const __m128i*) i4));
130       i4 += 8;
131       vacc01234567 = _mm_add_epi16(vacc01234567, vxi4x01234567);
132       const __m128i vxi5x01234567 = _mm_cvtepi8_epi16(_mm_loadl_epi64((const __m128i*) i5));
133       i5 += 8;
134       vacc01234567 = _mm_add_epi16(vacc01234567, vxi5x01234567);
135       const __m128i vxi6x01234567 = _mm_cvtepi8_epi16(_mm_loadl_epi64((const __m128i*) i6));
136       i6 += 8;
137 
138       vacc01234567 = _mm_add_epi16(vacc01234567, vxi6x01234567);
139 
140       __m128i vacc0123 = _mm_cvtepi16_epi32(vacc01234567);
141       __m128i vacc4567 = _mm_srai_epi32(_mm_unpackhi_epi16(vacc01234567, vacc01234567), 16);
142 
143       vacc0123 = _mm_add_epi32(vacc0123, vinit_bias);
144       vacc4567 = _mm_add_epi32(vacc4567, vinit_bias);
145 
146       __m128 vfpacc0123 = _mm_cvtepi32_ps(vacc0123);
147       __m128 vfpacc4567 = _mm_cvtepi32_ps(vacc4567);
148 
149       vfpacc0123 = _mm_mul_ps(vfpacc0123, vscale);
150       vfpacc4567 = _mm_mul_ps(vfpacc4567, vscale);
151 
152       vfpacc0123 = _mm_min_ps(vfpacc0123, voutput_max_less_zero_point);
153       vfpacc4567 = _mm_min_ps(vfpacc4567, voutput_max_less_zero_point);
154 
155       vacc0123 = _mm_cvtps_epi32(vfpacc0123);
156       vacc4567 = _mm_cvtps_epi32(vfpacc4567);
157 
158       __m128i vout01234567 = _mm_adds_epi16(_mm_packs_epi32(vacc0123, vacc4567), voutput_zero_point);
159 
160       __m128i vout0123456701234567 = _mm_packs_epi16(vout01234567, vout01234567);
161       vout0123456701234567 = _mm_max_epi8(vout0123456701234567, voutput_min);
162 
163       if (channels & 4) {
164         unaligned_store_u32(output, (uint32_t) _mm_cvtsi128_si32(vout0123456701234567));
165         vout0123456701234567 = _mm_srli_epi64(vout0123456701234567, 32);
166         output += 4;
167       }
168       if (channels & 2) {
169         unaligned_store_u16(output, (uint16_t) _mm_extract_epi16(vout0123456701234567, 0));
170         vout0123456701234567 = _mm_srli_epi32(vout0123456701234567, 16);
171         output += 2;
172       }
173       if (channels & 1) {
174         *output = (int8_t) _mm_extract_epi8(vout0123456701234567, 0);
175       }
176     }
177   }
178 }
179