1 // Auto-generated file. Do not edit!
2 // Template: src/qs8-gavgpool/unipass-neon.c.in
3 // Generator: tools/xngen
4 //
5 // Copyright 2020 Google LLC
6 //
7 // This source code is licensed under the BSD-style license found in the
8 // LICENSE file in the root directory of this source tree.
9
10 #include <assert.h>
11
12 #include <arm_neon.h>
13
14 #include <xnnpack/gavgpool.h>
15 #include <xnnpack/intrinsics-polyfill.h>
16
17
xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__neonv8_c16(size_t rows,size_t channels,const int8_t * input,size_t input_stride,const int8_t * zero,int8_t * output,const union xnn_qs8_avgpool_minmax_params params[restrict XNN_MIN_ELEMENTS (1)])18 void xnn_qs8_gavgpool_minmax_fp32_ukernel_7x__neonv8_c16(
19 size_t rows,
20 size_t channels,
21 const int8_t* input,
22 size_t input_stride,
23 const int8_t* zero,
24 int8_t* output,
25 const union xnn_qs8_avgpool_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_OOB_READS
26 {
27 assert(rows != 0);
28 assert(rows <= 7);
29 assert(channels != 0);
30
31 const int8_t* i0 = input;
32 const int8_t* i1 = (const int8_t*) ((uintptr_t) i0 + input_stride);
33 if XNN_UNPREDICTABLE(rows < 2) {
34 i1 = zero;
35 }
36 const int8_t* i2 = (const int8_t*) ((uintptr_t) i1 + input_stride);
37 if XNN_UNPREDICTABLE(rows <= 2) {
38 i2 = zero;
39 }
40 const int8_t* i3 = (const int8_t*) ((uintptr_t) i2 + input_stride);
41 if XNN_UNPREDICTABLE(rows < 4) {
42 i3 = zero;
43 }
44 const int8_t* i4 = (const int8_t*) ((uintptr_t) i3 + input_stride);
45 if XNN_UNPREDICTABLE(rows <= 4) {
46 i4 = zero;
47 }
48 const int8_t* i5 = (const int8_t*) ((uintptr_t) i4 + input_stride);
49 if XNN_UNPREDICTABLE(rows < 6) {
50 i5 = zero;
51 }
52 const int8_t* i6 = (const int8_t*) ((uintptr_t) i5 + input_stride);
53 if XNN_UNPREDICTABLE(rows <= 6) {
54 i6 = zero;
55 }
56
57 const int32x4_t vinit_bias = vld1q_dup_s32(¶ms->fp32_neonv8.init_bias);
58 const float32x4_t vscale = vld1q_dup_f32(¶ms->fp32_neonv8.scale);
59 const int16x8_t voutput_zero_point = vld1q_dup_s16(¶ms->fp32_neonv8.output_zero_point);
60 const int8x16_t voutput_min = vld1q_dup_s8(¶ms->fp32_neonv8.output_min);
61 const int8x16_t voutput_max = vld1q_dup_s8(¶ms->fp32_neonv8.output_max);
62 for (; channels >= 16; channels -= 16) {
63 const int8x8_t vi0x01234567 = vld1_s8(i0); i0 += 8;
64 const int8x8_t vi0x89ABCDEF = vld1_s8(i0); i0 += 8;
65 const int8x8_t vi1x01234567 = vld1_s8(i1); i1 += 8;
66 const int8x8_t vi1x89ABCDEF = vld1_s8(i1); i1 += 8;
67
68 const int8x8_t vi2x01234567 = vld1_s8(i2); i2 += 8;
69 int16x8_t vsum01234567 = vaddl_s8(vi0x01234567, vi1x01234567);
70 const int8x8_t vi2x89ABCDEF = vld1_s8(i2); i2 += 8;
71 int16x8_t vsum89ABCDEF = vaddl_s8(vi0x89ABCDEF, vi1x89ABCDEF);
72
73 const int8x8_t vi3x01234567 = vld1_s8(i3); i3 += 8;
74 vsum01234567 = vaddw_s8(vsum01234567, vi2x01234567);
75 const int8x8_t vi3x89ABCDEF = vld1_s8(i3); i3 += 8;
76 vsum89ABCDEF = vaddw_s8(vsum89ABCDEF, vi2x89ABCDEF);
77 const int8x8_t vi4x01234567 = vld1_s8(i4); i4 += 8;
78 vsum01234567 = vaddw_s8(vsum01234567, vi3x01234567);
79 const int8x8_t vi4x89ABCDEF = vld1_s8(i4); i4 += 8;
80 vsum89ABCDEF = vaddw_s8(vsum89ABCDEF, vi3x89ABCDEF);
81 const int8x8_t vi5x01234567 = vld1_s8(i5); i5 += 8;
82 vsum01234567 = vaddw_s8(vsum01234567, vi4x01234567);
83 const int8x8_t vi5x89ABCDEF = vld1_s8(i5); i5 += 8;
84 vsum89ABCDEF = vaddw_s8(vsum89ABCDEF, vi4x89ABCDEF);
85 const int8x8_t vi6x01234567 = vld1_s8(i6); i6 += 8;
86 vsum01234567 = vaddw_s8(vsum01234567, vi5x01234567);
87 const int8x8_t vi6x89ABCDEF = vld1_s8(i6); i6 += 8;
88 vsum89ABCDEF = vaddw_s8(vsum89ABCDEF, vi5x89ABCDEF);
89 vsum01234567 = vaddw_s8(vsum01234567, vi6x01234567);
90 vsum89ABCDEF = vaddw_s8(vsum89ABCDEF, vi6x89ABCDEF);
91
92 int32x4_t vacc0123 = vaddw_s16(vinit_bias, vget_low_s16(vsum01234567));
93 int32x4_t vacc4567 = vaddw_s16(vinit_bias, vget_high_s16(vsum01234567));
94 int32x4_t vacc89AB = vaddw_s16(vinit_bias, vget_low_s16(vsum89ABCDEF));
95 int32x4_t vaccCDEF = vaddw_s16(vinit_bias, vget_high_s16(vsum89ABCDEF));
96
97 float32x4_t vfpacc0123 = vcvtq_f32_s32(vacc0123);
98 float32x4_t vfpacc4567 = vcvtq_f32_s32(vacc4567);
99 float32x4_t vfpacc89AB = vcvtq_f32_s32(vacc89AB);
100 float32x4_t vfpaccCDEF = vcvtq_f32_s32(vaccCDEF);
101
102 vfpacc0123 = vmulq_f32(vfpacc0123, vscale);
103 vfpacc4567 = vmulq_f32(vfpacc4567, vscale);
104 vfpacc89AB = vmulq_f32(vfpacc89AB, vscale);
105 vfpaccCDEF = vmulq_f32(vfpaccCDEF, vscale);
106
107 vacc0123 = vcvtnq_s32_f32(vfpacc0123);
108 vacc4567 = vcvtnq_s32_f32(vfpacc4567);
109 vacc89AB = vcvtnq_s32_f32(vfpacc89AB);
110 vaccCDEF = vcvtnq_s32_f32(vfpaccCDEF);
111
112 #if XNN_ARCH_ARM64
113 int16x8_t vacc01234567 = vqmovn_high_s32(vqmovn_s32(vacc0123), vacc4567);
114 int16x8_t vacc89ABCDEF = vqmovn_high_s32(vqmovn_s32(vacc89AB), vaccCDEF);
115 #else // !XNN_ARCH_ARM64
116 int16x8_t vacc01234567 = vcombine_s16(vqmovn_s32(vacc0123), vqmovn_s32(vacc4567));
117 int16x8_t vacc89ABCDEF = vcombine_s16(vqmovn_s32(vacc89AB), vqmovn_s32(vaccCDEF));
118 #endif // !XNN_ARCH_ARM64
119
120 vacc01234567 = vqaddq_s16(vacc01234567, voutput_zero_point);
121 vacc89ABCDEF = vqaddq_s16(vacc89ABCDEF, voutput_zero_point);
122
123 #if XNN_ARCH_ARM64
124 int8x16_t vout0123456789ABCDEF = vqmovn_high_s16(vqmovn_s16(vacc01234567), vacc89ABCDEF);
125 #else // !XNN_ARCH_ARM64
126 int8x16_t vout0123456789ABCDEF = vcombine_s8(vqmovn_s16(vacc01234567), vqmovn_s16(vacc89ABCDEF));
127 #endif // !XNN_ARCH_ARM64
128
129 vout0123456789ABCDEF = vmaxq_s8(vout0123456789ABCDEF, voutput_min);
130
131 vout0123456789ABCDEF = vminq_s8(vout0123456789ABCDEF, voutput_max);
132
133 vst1q_s8(output, vout0123456789ABCDEF); output += 16;
134 }
135 if XNN_UNLIKELY(channels != 0) {
136 do {
137 const int8x8_t vi0x01234567 = vld1_s8(i0); i0 += 8;
138 const int8x8_t vi1x01234567 = vld1_s8(i1); i1 += 8;
139 const int8x8_t vi2x01234567 = vld1_s8(i2); i2 += 8;
140 int16x8_t vsum01234567 = vaddl_s8(vi0x01234567, vi1x01234567);
141
142 const int8x8_t vi3x01234567 = vld1_s8(i3); i3 += 8;
143 vsum01234567 = vaddw_s8(vsum01234567, vi2x01234567);
144 const int8x8_t vi4x01234567 = vld1_s8(i4); i4 += 8;
145 vsum01234567 = vaddw_s8(vsum01234567, vi3x01234567);
146 const int8x8_t vi5x01234567 = vld1_s8(i5); i5 += 8;
147 vsum01234567 = vaddw_s8(vsum01234567, vi4x01234567);
148 const int8x8_t vi6x01234567 = vld1_s8(i6); i6 += 8;
149 vsum01234567 = vaddw_s8(vsum01234567, vi5x01234567);
150 vsum01234567 = vaddw_s8(vsum01234567, vi6x01234567);
151
152 int32x4_t vacc0123 = vaddw_s16(vinit_bias, vget_low_s16(vsum01234567));
153 int32x4_t vacc4567 = vaddw_s16(vinit_bias, vget_high_s16(vsum01234567));
154
155 float32x4_t vfpacc0123 = vcvtq_f32_s32(vacc0123);
156 float32x4_t vfpacc4567 = vcvtq_f32_s32(vacc4567);
157
158 vfpacc0123 = vmulq_f32(vfpacc0123, vscale);
159 vfpacc4567 = vmulq_f32(vfpacc4567, vscale);
160
161 vacc0123 = vcvtnq_s32_f32(vfpacc0123);
162 vacc4567 = vcvtnq_s32_f32(vfpacc4567);
163
164 #if XNN_ARCH_ARM64
165 int16x8_t vacc01234567 = vqmovn_high_s32(vqmovn_s32(vacc0123), vacc4567);
166 #else
167 int16x8_t vacc01234567 = vcombine_s16(vqmovn_s32(vacc0123), vqmovn_s32(vacc4567));
168 #endif
169 vacc01234567 = vqaddq_s16(vacc01234567, voutput_zero_point);
170
171 int8x8_t vout01234567 = vqmovn_s16(vacc01234567);
172 vout01234567 = vmax_s8(vout01234567, vget_low_s8(voutput_min));
173 vout01234567 = vmin_s8(vout01234567, vget_low_s8(voutput_max));
174
175 if XNN_LIKELY(channels >= 8) {
176 vst1_s8(output, vout01234567); output += 8;
177 channels -= 8;
178 } else {
179 if (channels & 4) {
180 vst1_lane_u32((void*) output, vreinterpret_u32_s8(vout01234567), 0); output += 4;
181 vout01234567 = vext_s8(vout01234567, vout01234567, 4);
182 }
183 if (channels & 2) {
184 vst1_lane_u16((void*) output, vreinterpret_u16_s8(vout01234567), 0); output += 2;
185 vout01234567 = vext_s8(vout01234567, vout01234567, 2);
186 }
187 if (channels & 1) {
188 vst1_lane_s8(output, vout01234567, 0); output += 1;
189 }
190 channels = 0;
191 }
192 } while (channels != 0);
193 }
194 }
195