xref: /aosp_15_r20/external/XNNPACK/src/qc8-igemm/gen/3x4c2s4-minmax-fp32-avx-ld128.c (revision 4bdc94577ba0e567308109d787f7fec7b531ce36)
1 // Auto-generated file. Do not edit!
2 //   Template: src/qs8-igemm/MRx4c2s4-sse.c.in
3 //   Generator: tools/xngen
4 //
5 // Copyright 2022 Google LLC
6 //
7 // This source code is licensed under the BSD-style license found in the
8 // LICENSE file in the root directory of this source tree.
9 
10 #include <assert.h>
11 
12 #include <smmintrin.h>
13 
14 #include <xnnpack/igemm.h>
15 #include <xnnpack/math.h>
16 #include <xnnpack/unaligned.h>
17 
18 
xnn_qc8_igemm_minmax_fp32_ukernel_3x4c2s4__avx_ld128(size_t mr,size_t nc,size_t kc,size_t ks,const int8_t ** restrict a,const void * restrict w,int8_t * restrict c,size_t cm_stride,size_t cn_stride,size_t a_offset,const int8_t * zero,const union xnn_qc8_conv_minmax_params params[restrict XNN_MIN_ELEMENTS (1)])19 void xnn_qc8_igemm_minmax_fp32_ukernel_3x4c2s4__avx_ld128(
20     size_t mr,
21     size_t nc,
22     size_t kc,
23     size_t ks,
24     const int8_t** restrict a,
25     const void* restrict w,
26     int8_t* restrict c,
27     size_t cm_stride,
28     size_t cn_stride,
29     size_t a_offset,
30     const int8_t* zero,
31     const union xnn_qc8_conv_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_OOB_READS
32 {
33   assert(mr != 0);
34   assert(mr <= 3);
35   assert(nc != 0);
36   assert(kc != 0);
37   assert(ks != 0);
38   assert(ks % (3 * sizeof(void*)) == 0);
39   assert(a_offset % sizeof(int8_t) == 0);
40   assert(a != NULL);
41   assert(w != NULL);
42   assert(c != NULL);
43 
44   kc = round_up_po2(kc, 8 * sizeof(int8_t));
45   int8_t* c0 = c;
46   int8_t* c1 = (int8_t*) ((uintptr_t) c0 + cm_stride);
47   if XNN_UNPREDICTABLE(mr < 2) {
48     c1 = c0;
49   }
50   int8_t* c2 = (int8_t*) ((uintptr_t) c1 + cm_stride);
51   if XNN_UNPREDICTABLE(mr <= 2) {
52     c2 = c1;
53   }
54 
55   do {
56     __m128i vacc0x0123 = _mm_loadu_si128((const __m128i*) w);
57     __m128i vacc1x0123 = vacc0x0123;
58     __m128i vacc2x0123 = vacc0x0123;
59     w = (const void*) ((const int32_t*) w + 4);
60 
61     size_t p = ks;
62     do {
63       const int8_t* restrict a0 = a[0];
64       if XNN_UNPREDICTABLE(a0 != zero) {
65         a0 = (const int8_t*) ((uintptr_t) a0 + a_offset);
66       }
67       const int8_t* restrict a1 = a[1];
68       if XNN_UNPREDICTABLE(a1 != zero) {
69         a1 = (const int8_t*) ((uintptr_t) a1 + a_offset);
70       }
71       const int8_t* restrict a2 = a[2];
72       if XNN_UNPREDICTABLE(a2 != zero) {
73         a2 = (const int8_t*) ((uintptr_t) a2 + a_offset);
74       }
75       a += 3;
76 
77       size_t k = kc;
78       do {
79         const __m128i va0 = _mm_loadl_epi64((const __m128i*) a0);
80         __m128i vxa0 = _mm_cvtepi8_epi16(va0);
81         a0 += 8;
82         const __m128i va1 = _mm_loadl_epi64((const __m128i*) a1);
83         __m128i vxa1 = _mm_cvtepi8_epi16(va1);
84         a1 += 8;
85         const __m128i va2 = _mm_loadl_epi64((const __m128i*) a2);
86         __m128i vxa2 = _mm_cvtepi8_epi16(va2);
87         a2 += 8;
88 
89         const __m128i vb01 = _mm_loadu_si128((const __m128i*) w);
90         const __m128i vxb0 = _mm_cvtepi8_epi16(vb01);
91         const __m128i vxb1 = _mm_srai_epi16(_mm_unpackhi_epi8(vb01, vb01), 8);
92 
93         vacc0x0123 = _mm_add_epi32(vacc0x0123, _mm_madd_epi16(vxa0, vxb0));
94         vxa0 = _mm_shuffle_epi32(vxa0, _MM_SHUFFLE(0, 3, 2, 1));
95         vacc1x0123 = _mm_add_epi32(vacc1x0123, _mm_madd_epi16(vxa1, vxb0));
96         vxa1 = _mm_shuffle_epi32(vxa1, _MM_SHUFFLE(0, 3, 2, 1));
97         vacc2x0123 = _mm_add_epi32(vacc2x0123, _mm_madd_epi16(vxa2, vxb0));
98         vxa2 = _mm_shuffle_epi32(vxa2, _MM_SHUFFLE(0, 3, 2, 1));
99 
100         vacc0x0123 = _mm_add_epi32(vacc0x0123, _mm_madd_epi16(vxa0, vxb1));
101         vxa0 = _mm_shuffle_epi32(vxa0, _MM_SHUFFLE(0, 3, 2, 1));
102         vacc1x0123 = _mm_add_epi32(vacc1x0123, _mm_madd_epi16(vxa1, vxb1));
103         vxa1 = _mm_shuffle_epi32(vxa1, _MM_SHUFFLE(0, 3, 2, 1));
104         vacc2x0123 = _mm_add_epi32(vacc2x0123, _mm_madd_epi16(vxa2, vxb1));
105         vxa2 = _mm_shuffle_epi32(vxa2, _MM_SHUFFLE(0, 3, 2, 1));
106         const __m128i vb23 = _mm_loadu_si128((const __m128i*) ((const int8_t*) w + 16));
107         const __m128i vxb2 = _mm_cvtepi8_epi16(vb23);
108         const __m128i vxb3 = _mm_srai_epi16(_mm_unpackhi_epi8(vb23, vb23), 8);
109 
110         vacc0x0123 = _mm_add_epi32(vacc0x0123, _mm_madd_epi16(vxa0, vxb2));
111         vxa0 = _mm_shuffle_epi32(vxa0, _MM_SHUFFLE(0, 3, 2, 1));
112         vacc1x0123 = _mm_add_epi32(vacc1x0123, _mm_madd_epi16(vxa1, vxb2));
113         vxa1 = _mm_shuffle_epi32(vxa1, _MM_SHUFFLE(0, 3, 2, 1));
114         vacc2x0123 = _mm_add_epi32(vacc2x0123, _mm_madd_epi16(vxa2, vxb2));
115         vxa2 = _mm_shuffle_epi32(vxa2, _MM_SHUFFLE(0, 3, 2, 1));
116 
117         vacc0x0123 = _mm_add_epi32(vacc0x0123, _mm_madd_epi16(vxa0, vxb3));
118         vacc1x0123 = _mm_add_epi32(vacc1x0123, _mm_madd_epi16(vxa1, vxb3));
119         vacc2x0123 = _mm_add_epi32(vacc2x0123, _mm_madd_epi16(vxa2, vxb3));
120 
121         w = (const void*) ((const int8_t*) w + 32);
122         k -= 8 * sizeof(int8_t);
123       } while (k != 0);
124       p -= 3 * sizeof(void*);
125     } while (p != 0);
126 
127     __m128 vscaled0x0123 = _mm_cvtepi32_ps(vacc0x0123);
128     __m128 vscaled1x0123 = _mm_cvtepi32_ps(vacc1x0123);
129     __m128 vscaled2x0123 = _mm_cvtepi32_ps(vacc2x0123);
130 
131     const __m128 vscale0123 = _mm_loadu_ps((const float*) w);
132     w = (const void*) ((const float*) w + 4);
133     vscaled0x0123 = _mm_mul_ps(vscaled0x0123, vscale0123);
134     vscaled1x0123 = _mm_mul_ps(vscaled1x0123, vscale0123);
135     vscaled2x0123 = _mm_mul_ps(vscaled2x0123, vscale0123);
136 
137     const __m128 voutput_max_less_zero_point = _mm_load_ps(params->fp32_sse4.output_max_less_zero_point);
138     vscaled0x0123 = _mm_min_ps(vscaled0x0123, voutput_max_less_zero_point);
139     vscaled1x0123 = _mm_min_ps(vscaled1x0123, voutput_max_less_zero_point);
140     vscaled2x0123 = _mm_min_ps(vscaled2x0123, voutput_max_less_zero_point);
141 
142     vacc0x0123 = _mm_cvtps_epi32(vscaled0x0123);
143     vacc1x0123 = _mm_cvtps_epi32(vscaled1x0123);
144     vacc2x0123 = _mm_cvtps_epi32(vscaled2x0123);
145 
146     const __m128i voutput_zero_point = _mm_load_si128((const __m128i*) params->fp32_sse4.output_zero_point);
147     __m128i vacc01x0123 = _mm_adds_epi16(_mm_packs_epi32(vacc0x0123, vacc1x0123), voutput_zero_point);
148     __m128i vacc22x0123 = _mm_adds_epi16(_mm_packs_epi32(vacc2x0123, vacc2x0123), voutput_zero_point);
149 
150 
151     __m128i vout = _mm_packs_epi16(vacc01x0123, vacc22x0123);
152 
153     vout = _mm_max_epi8(vout, _mm_load_si128((const __m128i*) params->fp32_sse4.output_min));
154 
155     if (nc >= 4) {
156       unaligned_store_u32(c2, (uint32_t) _mm_extract_epi32(vout, 2));
157       c2 = (int8_t*) ((uintptr_t) c2 + cn_stride);
158       unaligned_store_u32(c1, (uint32_t) _mm_extract_epi32(vout, 1));
159       c1 = (int8_t*) ((uintptr_t) c1 + cn_stride);
160       unaligned_store_u32(c0, (uint32_t) _mm_cvtsi128_si32(vout));
161       c0 = (int8_t*) ((uintptr_t) c0 + cn_stride);
162 
163       a = (const int8_t**restrict) ((uintptr_t) a - ks);
164 
165       nc -= 4;
166     } else {
167       if (nc & 2) {
168         unaligned_store_u16(c2, (uint16_t) _mm_extract_epi16(vout, 4));
169         c2 += 2;
170         unaligned_store_u16(c1, (uint16_t) _mm_extract_epi16(vout, 2));
171         c1 += 2;
172         unaligned_store_u16(c0, (uint16_t) _mm_extract_epi16(vout, 0));
173         c0 += 2;
174         vout = _mm_srli_epi32(vout, 16);
175       }
176       if (nc & 1) {
177         *c2 = (int8_t) _mm_extract_epi8(vout, 8);
178         *c1 = (int8_t) _mm_extract_epi8(vout, 4);
179         *c0 = (int8_t) _mm_extract_epi8(vout, 0);
180       }
181 
182       nc = 0;
183     }
184   } while (nc != 0);
185 }
186