xref: /aosp_15_r20/external/XNNPACK/src/qc8-igemm/gen/1x2c4-minmax-fp32-armsimd32.c (revision 4bdc94577ba0e567308109d787f7fec7b531ce36)
1 // Auto-generated file. Do not edit!
2 //   Template: src/qs8-igemm/c4-armsimd32.c.in
3 //   Generator: tools/xngen
4 //
5 // Copyright 2022 Google LLC
6 //
7 // This source code is licensed under the BSD-style license found in the
8 // LICENSE file in the root directory of this source tree.
9 
10 #include <assert.h>
11 
12 #include <arm_acle.h>
13 
14 #include <xnnpack/intrinsics-polyfill.h>
15 #include <xnnpack/math.h>
16 #include <xnnpack/gemm.h>
17 #include <xnnpack/unaligned.h>
18 
19 
xnn_qc8_igemm_minmax_fp32_ukernel_1x2c4__armsimd32(size_t mr,size_t nc,size_t kc,size_t ks,const int8_t ** restrict a,const void * restrict w,int8_t * restrict c,size_t cm_stride,size_t cn_stride,size_t a_offset,const int8_t * zero,const union xnn_qc8_conv_minmax_params params[restrict XNN_MIN_ELEMENTS (1)])20 void xnn_qc8_igemm_minmax_fp32_ukernel_1x2c4__armsimd32(
21     size_t mr,
22     size_t nc,
23     size_t kc,
24     size_t ks,
25     const int8_t**restrict a,
26     const void*restrict w,
27     int8_t*restrict c,
28     size_t cm_stride,
29     size_t cn_stride,
30     size_t a_offset,
31     const int8_t* zero,
32     const union xnn_qc8_conv_minmax_params params[restrict XNN_MIN_ELEMENTS(1)])
33 {
34   assert(mr != 0);
35   assert(mr <= 1);
36   assert(nc != 0);
37   assert(kc != 0);
38   assert(ks != 0);
39   assert(ks % (1 * sizeof(void*)) == 0);
40   assert(a != NULL);
41   assert(w != NULL);
42   assert(c != NULL);
43 
44   kc = round_up_po2(kc, 4 * sizeof(int8_t));
45   int8_t* c0 = c;
46 
47   const float vmagic_bias = params->fp32_armsimd32.magic_bias;
48   do {
49     int32_t vacc0x0 = ((const int32_t*) w)[0];
50     int32_t vacc0x1 = ((const int32_t*) w)[1];
51     w = (const void*) ((const int32_t*) w + 2);
52 
53     size_t p = ks;
54     do {
55       const int8_t* restrict a0 = a[0];
56       assert(a0 != NULL);
57       if XNN_UNPREDICTABLE(a0 != zero) {
58         a0 = (const int8_t*) ((uintptr_t) a0 + a_offset);
59       }
60       a += 1;
61 
62       size_t k = kc;
63       do {
64         const int8x4_t va0 = (int8x4_t) unaligned_load_s32(a0); a0 += 4;
65 
66         const int16x2_t va0c02 = __sxtb16(va0);
67         const int16x2_t va0c13 = __sxtb16(__ror(va0, 8));
68 
69         const int8x4_t vb0 = *((const int8x4_t*) w); w = (const int8_t*) w + 4;
70         const int16x2_t vb0c02 = __sxtb16(vb0);
71 
72         vacc0x0 = __smlad(va0c02, vb0c02, vacc0x0);
73 
74         const int16x2_t vb0c13 = __sxtb16(__ror(vb0, 8));
75         vacc0x0 = __smlad(va0c13, vb0c13, vacc0x0);
76         const int8x4_t vb1 = *((const int8x4_t*) w); w = (const int8_t*) w + 4;
77         const int16x2_t vb1c02 = __sxtb16(vb1);
78 
79         vacc0x1 = __smlad(va0c02, vb1c02, vacc0x1);
80 
81         const int16x2_t vb1c13 = __sxtb16(__ror(vb1, 8));
82         vacc0x1 = __smlad(va0c13, vb1c13, vacc0x1);
83 
84         k -= 4 * sizeof(int8_t);
85       } while (k != 0);
86       p -= 1 * sizeof(void*);
87     } while (p != 0);
88 
89     float vfpacc0x0 = (float) vacc0x0;
90     float vfpacc0x1 = (float) vacc0x1;
91 
92     const float vscale0 = ((const float*) w)[0];
93     vfpacc0x0 *= vscale0;
94     const float vscale1 = ((const float*) w)[1];
95     vfpacc0x1 *= vscale1;
96     w = (const void*) ((const float*) w + 2);
97 
98     vfpacc0x0 += vmagic_bias;
99     vfpacc0x1 += vmagic_bias;
100 
101     int32_t vout0x0 = (int32_t) float_as_uint32(vfpacc0x0);
102     int32_t vout0x1 = (int32_t) float_as_uint32(vfpacc0x1);
103 
104     const int32_t vmagic_bias_less_zero_point = params->fp32_armsimd32.magic_bias_less_zero_point;
105     vout0x0 = __qsub(vout0x0, vmagic_bias_less_zero_point);
106     vout0x1 = __qsub(vout0x1, vmagic_bias_less_zero_point);
107 
108     vout0x0 = __ssat(vout0x0, 8);
109     vout0x1 = __ssat(vout0x1, 8);
110 
111     const uint32_t vout0 = (uint32_t) (uint8_t) vout0x0 | ((uint32_t) vout0x1 << 8);
112 
113     uint32_t vout = vout0;
114 
115     const int8x4_t voutput_min = (int8x4_t) params->fp32_armsimd32.output_min;
116     __ssub8((int8x4_t) vout, voutput_min);
117     vout = (uint32_t) __sel((uint8x4_t) vout, (uint8x4_t) voutput_min);
118 
119     const int8x4_t voutput_max = (int8x4_t) params->fp32_armsimd32.output_max;
120     __ssub8((int8x4_t) vout, voutput_max);
121     vout = (uint32_t) __sel((uint8x4_t) voutput_max, (uint8x4_t) vout);
122 
123     if XNN_LIKELY(nc >= 2) {
124       unaligned_store_u16(c0, (uint16_t) vout);
125 
126       c0 = (int8_t*) ((uintptr_t) c0 + cn_stride);
127 
128       a = (const int8_t**restrict) ((uintptr_t) a - ks);
129       nc -= 2;
130     } else {
131       *c0 = (int8_t) vout;
132 
133       nc = 0;
134     }
135   } while (nc != 0);
136 }
137