xref: /aosp_15_r20/external/XNNPACK/src/qc8-gemm/gen/2x8c8-xw-minmax-fp32-avx2.c (revision 4bdc94577ba0e567308109d787f7fec7b531ce36)
1 // Auto-generated file. Do not edit!
2 //   Template: src/qs8-gemm/MRx8c8-avx2.c.in
3 //   Generator: tools/xngen
4 //
5 // Copyright 2020 Google LLC
6 //
7 // This source code is licensed under the BSD-style license found in the
8 // LICENSE file in the root directory of this source tree.
9 
10 #include <assert.h>
11 
12 #include <immintrin.h>
13 
14 #include <xnnpack/gemm.h>
15 #include <xnnpack/intrinsics-polyfill.h>
16 #include <xnnpack/math.h>
17 #include <xnnpack/unaligned.h>
18 
19 
xnn_qc8_gemm_xw_minmax_fp32_ukernel_2x8c8__avx2(size_t mr,size_t nc,size_t kc,const int8_t * restrict a,size_t a_stride,const void * restrict w,int8_t * restrict c,size_t cm_stride,size_t cn_stride,const union xnn_qc8_conv_minmax_params params[restrict XNN_MIN_ELEMENTS (1)])20 void xnn_qc8_gemm_xw_minmax_fp32_ukernel_2x8c8__avx2(
21     size_t mr,
22     size_t nc,
23     size_t kc,
24     const int8_t* restrict a,
25     size_t a_stride,
26     const void* restrict w,
27     int8_t* restrict c,
28     size_t cm_stride,
29     size_t cn_stride,
30     const union xnn_qc8_conv_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_OOB_READS
31 {
32   assert(mr != 0);
33   assert(mr <= 2);
34   assert(nc != 0);
35   assert(kc != 0);
36   assert(kc % sizeof(int8_t) == 0);
37   assert(a != NULL);
38   assert(w != NULL);
39   assert(c != NULL);
40 
41   kc = round_up_po2(kc, 8);
42   const int8_t* a0 = a;
43   int8_t* c0 = c;
44   const int8_t* a1 = (const int8_t*) ((uintptr_t) a0 + a_stride);
45   int8_t* c1 = (int8_t*) ((uintptr_t) c0 + cm_stride);
46   if XNN_UNPREDICTABLE(mr != 2) {
47     a1 = a0;
48     c1 = c0;
49   }
50 
51   do {
52     const __m128i vbias0x0 = _mm_cvtsi32_si128(((const int*) w)[0]);
53     const __m128i vbias0x1 = _mm_cvtsi32_si128(((const int*) w)[1]);
54     __m256i vacc0x01 = _mm256_inserti128_si256(_mm256_castsi128_si256(vbias0x0), vbias0x1, 1);
55     const __m128i vbias0x2 = _mm_cvtsi32_si128(((const int*) w)[2]);
56     const __m128i vbias0x3 = _mm_cvtsi32_si128(((const int*) w)[3]);
57     __m256i vacc0x23 = _mm256_inserti128_si256(_mm256_castsi128_si256(vbias0x2), vbias0x3, 1);
58     const __m128i vbias0x4 = _mm_cvtsi32_si128(((const int*) w)[4]);
59     const __m128i vbias0x5 = _mm_cvtsi32_si128(((const int*) w)[5]);
60     __m256i vacc0x45 = _mm256_inserti128_si256(_mm256_castsi128_si256(vbias0x4), vbias0x5, 1);
61     const __m128i vbias0x6 = _mm_cvtsi32_si128(((const int*) w)[6]);
62     const __m128i vbias0x7 = _mm_cvtsi32_si128(((const int*) w)[7]);
63     __m256i vacc0x67 = _mm256_inserti128_si256(_mm256_castsi128_si256(vbias0x6), vbias0x7, 1);
64     __m256i vacc1x01 = vacc0x01;
65     __m256i vacc1x23 = vacc0x23;
66     __m256i vacc1x45 = vacc0x45;
67     __m256i vacc1x67 = vacc0x67;
68     w = (const int32_t*) w + 8;
69 
70     size_t k = 0;
71     while (k < kc) {
72       const __m128i va0 = _mm_broadcastq_epi64(_mm_loadl_epi64((const __m128i*) a0));
73       const __m256i vxa0 = _mm256_cvtepi8_epi16(va0);
74       a0 += 8;
75       const __m128i va1 = _mm_broadcastq_epi64(_mm_loadl_epi64((const __m128i*) a1));
76       const __m256i vxa1 = _mm256_cvtepi8_epi16(va1);
77       a1 += 8;
78 
79       const __m256i vxb01 = _mm256_load_si256((const __m256i*) w);
80 
81       vacc0x01 = _mm256_add_epi32(vacc0x01, _mm256_madd_epi16(vxa0, vxb01));
82       vacc1x01 = _mm256_add_epi32(vacc1x01, _mm256_madd_epi16(vxa1, vxb01));
83       const __m256i vxb23 = _mm256_load_si256((const __m256i*) ((const int16_t*) w + 16));
84 
85       vacc0x23 = _mm256_add_epi32(vacc0x23, _mm256_madd_epi16(vxa0, vxb23));
86       vacc1x23 = _mm256_add_epi32(vacc1x23, _mm256_madd_epi16(vxa1, vxb23));
87       const __m256i vxb45 = _mm256_load_si256((const __m256i*) ((const int16_t*) w + 32));
88 
89       vacc0x45 = _mm256_add_epi32(vacc0x45, _mm256_madd_epi16(vxa0, vxb45));
90       vacc1x45 = _mm256_add_epi32(vacc1x45, _mm256_madd_epi16(vxa1, vxb45));
91       const __m256i vxb67 = _mm256_load_si256((const __m256i*) ((const int16_t*) w + 48));
92 
93       vacc0x67 = _mm256_add_epi32(vacc0x67, _mm256_madd_epi16(vxa0, vxb67));
94       vacc1x67 = _mm256_add_epi32(vacc1x67, _mm256_madd_epi16(vxa1, vxb67));
95 
96       w = (const void*) ((const int16_t*) w + 64);
97       k += 8 * sizeof(int8_t);
98     }
99 
100     const __m256i vacc0x0213 = _mm256_hadd_epi32(vacc0x01, vacc0x23);
101     const __m256i vacc0x4657 = _mm256_hadd_epi32(vacc0x45, vacc0x67);
102     const __m256i vacc1x0213 = _mm256_hadd_epi32(vacc1x01, vacc1x23);
103     const __m256i vacc1x4657 = _mm256_hadd_epi32(vacc1x45, vacc1x67);
104 
105     const __m256i vacc0x02461357 = _mm256_hadd_epi32(vacc0x0213, vacc0x4657);
106     const __m256i vacc1x02461357 = _mm256_hadd_epi32(vacc1x0213, vacc1x4657);
107 
108     const __m256i vpermute_mask = _mm256_set_epi32(7, 3, 6, 2, 5, 1, 4, 0);
109     __m256i vacc0x01234567 = _mm256_permutevar8x32_epi32(vacc0x02461357, vpermute_mask);
110     __m256i vacc1x01234567 = _mm256_permutevar8x32_epi32(vacc1x02461357, vpermute_mask);
111 
112     __m256 vscaled0x01234567 = _mm256_cvtepi32_ps(vacc0x01234567);
113     __m256 vscaled1x01234567 = _mm256_cvtepi32_ps(vacc1x01234567);
114 
115     const __m256 vscale01234567 = _mm256_load_ps(w);
116     w = (const void*) ((const float*) w + 8);
117     vscaled0x01234567 = _mm256_mul_ps(vscaled0x01234567, vscale01234567);
118     vscaled1x01234567 = _mm256_mul_ps(vscaled1x01234567, vscale01234567);
119 
120     const __m256 voutput_max_less_zero_point = _mm256_load_ps(params->fp32_avx2.output_max_less_zero_point);
121     vscaled0x01234567 = _mm256_min_ps(vscaled0x01234567, voutput_max_less_zero_point);
122     vscaled1x01234567 = _mm256_min_ps(vscaled1x01234567, voutput_max_less_zero_point);
123 
124     vacc0x01234567 = _mm256_cvtps_epi32(vscaled0x01234567);
125     vacc1x01234567 = _mm256_cvtps_epi32(vscaled1x01234567);
126 
127     const __m256i voutput_zero_point = _mm256_load_si256((const __m256i*) params->fp32_avx2.output_zero_point);
128     __m256i vacc01x01234567 = _mm256_adds_epi16(_mm256_packs_epi32(vacc0x01234567, vacc1x01234567), voutput_zero_point);
129 
130     vacc01x01234567 = _mm256_permute4x64_epi64(vacc01x01234567, _MM_SHUFFLE(3, 1, 2, 0));
131 
132     __m256i vout = _mm256_packs_epi16(vacc01x01234567, vacc01x01234567);
133 
134     vout = _mm256_max_epi8(vout, _mm256_load_si256((const __m256i*) params->fp32_avx2.output_min));
135 
136     __m128i vout_lo = _mm256_castsi256_si128(vout);
137     __m128i vout_hi = _mm256_extracti128_si256(vout, 1);
138 
139     if (nc >= 8) {
140       _mm_storel_epi64((__m128i*) c0, vout_lo);
141       _mm_storel_epi64((__m128i*) c1, vout_hi);
142 
143       c0 = (int8_t*) ((uintptr_t) c0 + cn_stride);
144       c1 = (int8_t*) ((uintptr_t) c1 + cn_stride);
145 
146       a0 = (const int8_t*) ((uintptr_t) a0 - kc);
147       a1 = (const int8_t*) ((uintptr_t) a1 - kc);
148 
149       nc -= 8;
150     } else {
151       if (nc & 4) {
152         _mm_storeu_si32(c0, vout_lo);
153         _mm_storeu_si32(c1, vout_hi);
154 
155         c0 += 4;
156         c1 += 4;
157 
158         vout_lo = _mm_srli_epi64(vout_lo, 32);
159         vout_hi = _mm_srli_epi64(vout_hi, 32);
160       }
161       if (nc & 2) {
162         unaligned_store_u16(c0, (uint16_t) _mm_extract_epi16(vout_lo, 0));
163         unaligned_store_u16(c1, (uint16_t) _mm_extract_epi16(vout_hi, 0));
164 
165         c0 += 2;
166         c1 += 2;
167 
168         vout_lo = _mm_srli_epi32(vout_lo, 16);
169         vout_hi = _mm_srli_epi32(vout_hi, 16);
170       }
171       if (nc & 1) {
172         *c0 = (int8_t) _mm_extract_epi8(vout_lo, 0);
173         *c1 = (int8_t) _mm_extract_epi8(vout_hi, 0);
174       }
175 
176       nc = 0;
177     }
178   } while (nc != 0);
179 }
180