1 // Auto-generated file. Do not edit!
2 // Template: src/qs8-gemm/c4-neondot.c.in
3 // Generator: tools/xngen
4 //
5 // Copyright 2020 Google LLC
6 //
7 // This source code is licensed under the BSD-style license found in the
8 // LICENSE file in the root directory of this source tree.
9
10 #include <assert.h>
11
12 #include <arm_neon.h>
13
14 #include <xnnpack/gemm.h>
15 #include <xnnpack/intrinsics-polyfill.h>
16 #include <xnnpack/math.h>
17
18
xnn_qc8_gemm_minmax_fp32_ukernel_1x16c4__neondot(size_t mr,size_t nc,size_t kc,const int8_t * restrict a,size_t a_stride,const void * restrict w,int8_t * restrict c,size_t cm_stride,size_t cn_stride,const union xnn_qc8_conv_minmax_params params[restrict XNN_MIN_ELEMENTS (1)])19 void xnn_qc8_gemm_minmax_fp32_ukernel_1x16c4__neondot(
20 size_t mr,
21 size_t nc,
22 size_t kc,
23 const int8_t* restrict a,
24 size_t a_stride,
25 const void* restrict w,
26 int8_t* restrict c,
27 size_t cm_stride,
28 size_t cn_stride,
29 const union xnn_qc8_conv_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_OOB_READS
30 {
31 assert(mr != 0);
32 assert(mr <= 1);
33 assert(nc != 0);
34 assert(kc != 0);
35 assert(kc % sizeof(int8_t) == 0);
36 assert(a != NULL);
37 assert(w != NULL);
38 assert(c != NULL);
39
40 kc = round_up_po2(kc, 4 * sizeof(int8_t));
41 const int8_t* a0 = a;
42 int8_t* c0 = c;
43
44 // Loop over groups of 16 columns.
45 do {
46 // Initialize accumulators with bias. 16 bias values are loaded from the
47 // weight matrix, at the start of the group of 16 columns.
48 int32x4_t vacc0x0123 = vld1q_s32(w); w = (const void*) ((const int32_t*) w + 4);
49 int32x4_t vacc0x4567 = vld1q_s32(w); w = (const void*) ((const int32_t*) w + 4);
50 int32x4_t vacc0x89AB = vld1q_s32(w); w = (const void*) ((const int32_t*) w + 4);
51 int32x4_t vacc0xCDEF = vld1q_s32(w); w = (const void*) ((const int32_t*) w + 4);
52
53 // Inner accumulation loop along the 16 columns.
54 size_t k = kc;
55 // 2x partial unrolled loop to load 8 bytes at a time.
56 while (k >= 8 * sizeof(int8_t)) {
57 // Load a 1x8 block of activations.
58 const int8x8_t va0x01234567 = vld1_s8(a0); a0 += 8;
59
60 // Load a 8x16 block of weights.
61 const int8x16_t vb0123x0123 = vld1q_s8(w); w = (const void*) ((const int8_t*) w + 16);
62 const int8x16_t vb0123x4567 = vld1q_s8(w); w = (const void*) ((const int8_t*) w + 16);
63 const int8x16_t vb0123x89AB = vld1q_s8(w); w = (const void*) ((const int8_t*) w + 16);
64 const int8x16_t vb0123xCDEF = vld1q_s8(w); w = (const void*) ((const int8_t*) w + 16);
65 const int8x16_t vb4567x0123 = vld1q_s8(w); w = (const void*) ((const int8_t*) w + 16);
66 const int8x16_t vb4567x4567 = vld1q_s8(w); w = (const void*) ((const int8_t*) w + 16);
67 const int8x16_t vb4567x89AB = vld1q_s8(w); w = (const void*) ((const int8_t*) w + 16);
68 const int8x16_t vb4567xCDEF = vld1q_s8(w); w = (const void*) ((const int8_t*) w + 16);
69
70 // Multiply-accumulate: 1x8 * 8x16 --> 1x16.
71 vacc0x0123 = vdotq_lane_s32(vacc0x0123, vb0123x0123, va0x01234567, 0);
72 vacc0x4567 = vdotq_lane_s32(vacc0x4567, vb0123x4567, va0x01234567, 0);
73 vacc0x89AB = vdotq_lane_s32(vacc0x89AB, vb0123x89AB, va0x01234567, 0);
74 vacc0xCDEF = vdotq_lane_s32(vacc0xCDEF, vb0123xCDEF, va0x01234567, 0);
75 vacc0x0123 = vdotq_lane_s32(vacc0x0123, vb4567x0123, va0x01234567, 1);
76 vacc0x4567 = vdotq_lane_s32(vacc0x4567, vb4567x4567, va0x01234567, 1);
77 vacc0x89AB = vdotq_lane_s32(vacc0x89AB, vb4567x89AB, va0x01234567, 1);
78 vacc0xCDEF = vdotq_lane_s32(vacc0xCDEF, vb4567xCDEF, va0x01234567, 1);
79
80 k -= 8 * sizeof(int8_t);
81 }
82 // Handle up to 4 final positions of `k`
83 if XNN_UNLIKELY(k != 0) {
84 // Load a 1x4 block of activations.
85 const int8x8_t va0x01234567 = vld1_s8(a0); a0 += 4;
86
87 // Load a 4x16 block of weights.
88 const int8x16_t vb0123x0123 = vld1q_s8(w); w = (const void*) ((const int8_t*) w + 16);
89 const int8x16_t vb0123x4567 = vld1q_s8(w); w = (const void*) ((const int8_t*) w + 16);
90 const int8x16_t vb0123x89AB = vld1q_s8(w); w = (const void*) ((const int8_t*) w + 16);
91 const int8x16_t vb0123xCDEF = vld1q_s8(w); w = (const void*) ((const int8_t*) w + 16);
92
93 // Multiply-accumulate: 1x4 * 4x16 --> 1x16.
94 vacc0x0123 = vdotq_lane_s32(vacc0x0123, vb0123x0123, va0x01234567, 0);
95 vacc0x4567 = vdotq_lane_s32(vacc0x4567, vb0123x4567, va0x01234567, 0);
96 vacc0x89AB = vdotq_lane_s32(vacc0x89AB, vb0123x89AB, va0x01234567, 0);
97 vacc0xCDEF = vdotq_lane_s32(vacc0xCDEF, vb0123xCDEF, va0x01234567, 0);
98 }
99
100 float32x4_t vfpacc0x0123 = vcvtq_f32_s32(vacc0x0123);
101 float32x4_t vfpacc0x4567 = vcvtq_f32_s32(vacc0x4567);
102 float32x4_t vfpacc0x89AB = vcvtq_f32_s32(vacc0x89AB);
103 float32x4_t vfpacc0xCDEF = vcvtq_f32_s32(vacc0xCDEF);
104
105 const float32x4_t vscale0123 = vld1q_f32((const float*) w); w = (const void*) ((const float*) w + 4);
106 vfpacc0x0123 = vmulq_f32(vfpacc0x0123, vscale0123);
107 const float32x4_t vscale4567 = vld1q_f32((const float*) w); w = (const void*) ((const float*) w + 4);
108 vfpacc0x4567 = vmulq_f32(vfpacc0x4567, vscale4567);
109 const float32x4_t vscale89AB = vld1q_f32((const float*) w); w = (const void*) ((const float*) w + 4);
110 vfpacc0x89AB = vmulq_f32(vfpacc0x89AB, vscale89AB);
111 const float32x4_t vscaleCDEF = vld1q_f32((const float*) w); w = (const void*) ((const float*) w + 4);
112 vfpacc0xCDEF = vmulq_f32(vfpacc0xCDEF, vscaleCDEF);
113
114 vacc0x0123 = vcvtnq_s32_f32(vfpacc0x0123);
115 vacc0x4567 = vcvtnq_s32_f32(vfpacc0x4567);
116 vacc0x89AB = vcvtnq_s32_f32(vfpacc0x89AB);
117 vacc0xCDEF = vcvtnq_s32_f32(vfpacc0xCDEF);
118
119 const int16x8_t voutput_zero_point = vld1q_dup_s16(¶ms->fp32_neonv8.output_zero_point);
120 #if XNN_ARCH_ARM64
121 const int16x8_t vacc0x01234567 = vqaddq_s16(vqmovn_high_s32(vqmovn_s32(vacc0x0123), vacc0x4567), voutput_zero_point);
122 const int16x8_t vacc0x89ABCDEF = vqaddq_s16(vqmovn_high_s32(vqmovn_s32(vacc0x89AB), vacc0xCDEF), voutput_zero_point);
123
124 int8x16_t vout0x0123456789ABCDEF = vqmovn_high_s16(vqmovn_s16(vacc0x01234567), vacc0x89ABCDEF);
125 #else
126 const int16x8_t vacc0x01234567 = vqaddq_s16(vcombine_s16(vqmovn_s32(vacc0x0123), vqmovn_s32(vacc0x4567)), voutput_zero_point);
127 const int16x8_t vacc0x89ABCDEF = vqaddq_s16(vcombine_s16(vqmovn_s32(vacc0x89AB), vqmovn_s32(vacc0xCDEF)), voutput_zero_point);
128
129 int8x16_t vout0x0123456789ABCDEF = vcombine_s8(vqmovn_s16(vacc0x01234567), vqmovn_s16(vacc0x89ABCDEF));
130 #endif
131 const int8x16_t voutput_min = vld1q_dup_s8(¶ms->fp32_neonv8.output_min);
132 const int8x16_t voutput_max = vld1q_dup_s8(¶ms->fp32_neonv8.output_max);
133
134 vout0x0123456789ABCDEF = vmaxq_s8(vout0x0123456789ABCDEF, voutput_min);
135
136 vout0x0123456789ABCDEF = vminq_s8(vout0x0123456789ABCDEF, voutput_max);
137
138 if (nc >= 16) {
139 // Main case where there the 16 columns fit in the destination.
140 vst1q_s8(c0 + 0, vout0x0123456789ABCDEF);
141
142 // Advance to the next 16 columns.
143 c0 = (int8_t*) ((uintptr_t) c0 + cn_stride);
144
145 a0 = (const int8_t*) ((uintptr_t) a0 - kc);
146
147 nc -= 16;
148 } else {
149 // Final case where not all of the 16 columns fit in the destination.
150 int8x8_t vout0x01234567 = vget_low_s8(vout0x0123456789ABCDEF);
151 if (nc & 8) {
152 vst1_s8(c0, vout0x01234567); c0 += 8;
153 vout0x01234567 = vget_high_s8(vout0x0123456789ABCDEF);
154 }
155 if (nc & 4) {
156 vst1_lane_u32((void*) c0, vreinterpret_u32_s8(vout0x01234567), 0); c0 += 4;
157 vout0x01234567 = vext_s8(vout0x01234567, vout0x01234567, 4);
158 }
159 if (nc & 2) {
160 vst1_lane_u16((void*) c0, vreinterpret_u16_s8(vout0x01234567), 0); c0 += 2;
161 vout0x01234567 = vext_s8(vout0x01234567, vout0x01234567, 2);
162 }
163 if (nc & 1) {
164 vst1_lane_s8(c0, vout0x01234567, 0);
165 }
166
167 nc = 0;
168 }
169 } while (nc != 0);
170 }
171