1 // Auto-generated file. Do not edit!
2 // Template: src/f32-vsigmoid/avx-rr2-p5.c.in
3 // Generator: tools/xngen
4 //
5 // Copyright 2020 Google LLC
6 //
7 // This source code is licensed under the BSD-style license found in the
8 // LICENSE file in the root directory of this source tree.
9
10 #include <assert.h>
11
12 #include <immintrin.h>
13
14 #include <xnnpack/common.h>
15 #include <xnnpack/vunary.h>
16
17
xnn_f32_vsigmoid_ukernel__avx_rr2_p5_nr2_x48(size_t n,const float * x,float * y,const union xnn_f32_sigmoid_params params[restrict XNN_MIN_ELEMENTS (1)])18 void xnn_f32_vsigmoid_ukernel__avx_rr2_p5_nr2_x48(
19 size_t n,
20 const float* x,
21 float* y,
22 const union xnn_f32_sigmoid_params params[restrict XNN_MIN_ELEMENTS(1)])
23 {
24 assert(n % sizeof(float) == 0);
25
26 const __m256 vsign_mask = _mm256_load_ps(params->avx_rr2_p5.sign_mask);
27 const __m256 vmagic_bias = _mm256_load_ps(params->avx_rr2_p5.magic_bias);
28 const __m256 vlog2e = _mm256_load_ps(params->avx_rr2_p5.log2e);
29 const __m256 vminus_ln2_hi = _mm256_load_ps(params->avx_rr2_p5.minus_ln2_hi);
30 const __m256 vminus_ln2_lo = _mm256_load_ps(params->avx_rr2_p5.minus_ln2_lo);
31 const __m256 vc5 = _mm256_load_ps(params->avx_rr2_p5.c5);
32 const __m256 vc4 = _mm256_load_ps(params->avx_rr2_p5.c4);
33 const __m256 vc3 = _mm256_load_ps(params->avx_rr2_p5.c3);
34 const __m256 vc2 = _mm256_load_ps(params->avx_rr2_p5.c2);
35 const __m256 vc1 = _mm256_load_ps(params->avx_rr2_p5.c1);
36 const __m256 vone = _mm256_load_ps(params->avx_rr2_p5.one);
37 const __m256 vtwo = _mm256_load_ps(params->avx_rr2_p5.two);
38 const __m256 vdenorm_cutoff = _mm256_load_ps(params->avx_rr2_p5.denorm_cutoff);
39
40 for (; n >= 48 * sizeof(float); n -= 48 * sizeof(float)) {
41 const __m256 vx0 = _mm256_loadu_ps(x);
42 const __m256 vx1 = _mm256_loadu_ps(x + 8);
43 const __m256 vx2 = _mm256_loadu_ps(x + 16);
44 const __m256 vx3 = _mm256_loadu_ps(x + 24);
45 const __m256 vx4 = _mm256_loadu_ps(x + 32);
46 const __m256 vx5 = _mm256_loadu_ps(x + 40);
47 x += 48;
48
49 const __m256 vz0 = _mm256_or_ps(vx0, vsign_mask);
50 const __m256 vz1 = _mm256_or_ps(vx1, vsign_mask);
51 const __m256 vz2 = _mm256_or_ps(vx2, vsign_mask);
52 const __m256 vz3 = _mm256_or_ps(vx3, vsign_mask);
53 const __m256 vz4 = _mm256_or_ps(vx4, vsign_mask);
54 const __m256 vz5 = _mm256_or_ps(vx5, vsign_mask);
55
56 __m256 vn0 = _mm256_add_ps(_mm256_mul_ps(vz0, vlog2e), vmagic_bias);
57 __m256 vn1 = _mm256_add_ps(_mm256_mul_ps(vz1, vlog2e), vmagic_bias);
58 __m256 vn2 = _mm256_add_ps(_mm256_mul_ps(vz2, vlog2e), vmagic_bias);
59 __m256 vn3 = _mm256_add_ps(_mm256_mul_ps(vz3, vlog2e), vmagic_bias);
60 __m256 vn4 = _mm256_add_ps(_mm256_mul_ps(vz4, vlog2e), vmagic_bias);
61 __m256 vn5 = _mm256_add_ps(_mm256_mul_ps(vz5, vlog2e), vmagic_bias);
62
63 const __m128 vs_lo0 = _mm_castsi128_ps(_mm_slli_epi32(_mm_castps_si128(_mm256_castps256_ps128(vn0)), 23));
64 const __m128 vs_hi0 = _mm_castsi128_ps(_mm_slli_epi32(_mm_castps_si128(_mm256_extractf128_ps(vn0, 1)), 23));
65 const __m256 vs0 = _mm256_insertf128_ps(_mm256_castps128_ps256(vs_lo0), vs_hi0, 1);
66 const __m128 vs_lo1 = _mm_castsi128_ps(_mm_slli_epi32(_mm_castps_si128(_mm256_castps256_ps128(vn1)), 23));
67 const __m128 vs_hi1 = _mm_castsi128_ps(_mm_slli_epi32(_mm_castps_si128(_mm256_extractf128_ps(vn1, 1)), 23));
68 const __m256 vs1 = _mm256_insertf128_ps(_mm256_castps128_ps256(vs_lo1), vs_hi1, 1);
69 const __m128 vs_lo2 = _mm_castsi128_ps(_mm_slli_epi32(_mm_castps_si128(_mm256_castps256_ps128(vn2)), 23));
70 const __m128 vs_hi2 = _mm_castsi128_ps(_mm_slli_epi32(_mm_castps_si128(_mm256_extractf128_ps(vn2, 1)), 23));
71 const __m256 vs2 = _mm256_insertf128_ps(_mm256_castps128_ps256(vs_lo2), vs_hi2, 1);
72 const __m128 vs_lo3 = _mm_castsi128_ps(_mm_slli_epi32(_mm_castps_si128(_mm256_castps256_ps128(vn3)), 23));
73 const __m128 vs_hi3 = _mm_castsi128_ps(_mm_slli_epi32(_mm_castps_si128(_mm256_extractf128_ps(vn3, 1)), 23));
74 const __m256 vs3 = _mm256_insertf128_ps(_mm256_castps128_ps256(vs_lo3), vs_hi3, 1);
75 const __m128 vs_lo4 = _mm_castsi128_ps(_mm_slli_epi32(_mm_castps_si128(_mm256_castps256_ps128(vn4)), 23));
76 const __m128 vs_hi4 = _mm_castsi128_ps(_mm_slli_epi32(_mm_castps_si128(_mm256_extractf128_ps(vn4, 1)), 23));
77 const __m256 vs4 = _mm256_insertf128_ps(_mm256_castps128_ps256(vs_lo4), vs_hi4, 1);
78 const __m128 vs_lo5 = _mm_castsi128_ps(_mm_slli_epi32(_mm_castps_si128(_mm256_castps256_ps128(vn5)), 23));
79 const __m128 vs_hi5 = _mm_castsi128_ps(_mm_slli_epi32(_mm_castps_si128(_mm256_extractf128_ps(vn5, 1)), 23));
80 const __m256 vs5 = _mm256_insertf128_ps(_mm256_castps128_ps256(vs_lo5), vs_hi5, 1);
81
82 vn0 = _mm256_sub_ps(vn0, vmagic_bias);
83 vn1 = _mm256_sub_ps(vn1, vmagic_bias);
84 vn2 = _mm256_sub_ps(vn2, vmagic_bias);
85 vn3 = _mm256_sub_ps(vn3, vmagic_bias);
86 vn4 = _mm256_sub_ps(vn4, vmagic_bias);
87 vn5 = _mm256_sub_ps(vn5, vmagic_bias);
88
89 __m256 vt0 = _mm256_add_ps(_mm256_mul_ps(vn0, vminus_ln2_hi), vz0);
90 __m256 vt1 = _mm256_add_ps(_mm256_mul_ps(vn1, vminus_ln2_hi), vz1);
91 __m256 vt2 = _mm256_add_ps(_mm256_mul_ps(vn2, vminus_ln2_hi), vz2);
92 __m256 vt3 = _mm256_add_ps(_mm256_mul_ps(vn3, vminus_ln2_hi), vz3);
93 __m256 vt4 = _mm256_add_ps(_mm256_mul_ps(vn4, vminus_ln2_hi), vz4);
94 __m256 vt5 = _mm256_add_ps(_mm256_mul_ps(vn5, vminus_ln2_hi), vz5);
95
96 vt0 = _mm256_add_ps(_mm256_mul_ps(vn0, vminus_ln2_lo), vt0);
97 vt1 = _mm256_add_ps(_mm256_mul_ps(vn1, vminus_ln2_lo), vt1);
98 vt2 = _mm256_add_ps(_mm256_mul_ps(vn2, vminus_ln2_lo), vt2);
99 vt3 = _mm256_add_ps(_mm256_mul_ps(vn3, vminus_ln2_lo), vt3);
100 vt4 = _mm256_add_ps(_mm256_mul_ps(vn4, vminus_ln2_lo), vt4);
101 vt5 = _mm256_add_ps(_mm256_mul_ps(vn5, vminus_ln2_lo), vt5);
102
103 __m256 vp0 = _mm256_add_ps(_mm256_mul_ps(vc5, vt0), vc4);
104 __m256 vp1 = _mm256_add_ps(_mm256_mul_ps(vc5, vt1), vc4);
105 __m256 vp2 = _mm256_add_ps(_mm256_mul_ps(vc5, vt2), vc4);
106 __m256 vp3 = _mm256_add_ps(_mm256_mul_ps(vc5, vt3), vc4);
107 __m256 vp4 = _mm256_add_ps(_mm256_mul_ps(vc5, vt4), vc4);
108 __m256 vp5 = _mm256_add_ps(_mm256_mul_ps(vc5, vt5), vc4);
109
110 vp0 = _mm256_add_ps(_mm256_mul_ps(vp0, vt0), vc3);
111 vp1 = _mm256_add_ps(_mm256_mul_ps(vp1, vt1), vc3);
112 vp2 = _mm256_add_ps(_mm256_mul_ps(vp2, vt2), vc3);
113 vp3 = _mm256_add_ps(_mm256_mul_ps(vp3, vt3), vc3);
114 vp4 = _mm256_add_ps(_mm256_mul_ps(vp4, vt4), vc3);
115 vp5 = _mm256_add_ps(_mm256_mul_ps(vp5, vt5), vc3);
116
117 vp0 = _mm256_add_ps(_mm256_mul_ps(vp0, vt0), vc2);
118 vp1 = _mm256_add_ps(_mm256_mul_ps(vp1, vt1), vc2);
119 vp2 = _mm256_add_ps(_mm256_mul_ps(vp2, vt2), vc2);
120 vp3 = _mm256_add_ps(_mm256_mul_ps(vp3, vt3), vc2);
121 vp4 = _mm256_add_ps(_mm256_mul_ps(vp4, vt4), vc2);
122 vp5 = _mm256_add_ps(_mm256_mul_ps(vp5, vt5), vc2);
123
124 vp0 = _mm256_add_ps(_mm256_mul_ps(vp0, vt0), vc1);
125 vp1 = _mm256_add_ps(_mm256_mul_ps(vp1, vt1), vc1);
126 vp2 = _mm256_add_ps(_mm256_mul_ps(vp2, vt2), vc1);
127 vp3 = _mm256_add_ps(_mm256_mul_ps(vp3, vt3), vc1);
128 vp4 = _mm256_add_ps(_mm256_mul_ps(vp4, vt4), vc1);
129 vp5 = _mm256_add_ps(_mm256_mul_ps(vp5, vt5), vc1);
130
131 vt0 = _mm256_mul_ps(vt0, vs0);
132 vt1 = _mm256_mul_ps(vt1, vs1);
133 vt2 = _mm256_mul_ps(vt2, vs2);
134 vt3 = _mm256_mul_ps(vt3, vs3);
135 vt4 = _mm256_mul_ps(vt4, vs4);
136 vt5 = _mm256_mul_ps(vt5, vs5);
137
138 const __m256 ve0 = _mm256_add_ps(_mm256_mul_ps(vt0, vp0), vs0);
139 const __m256 ve1 = _mm256_add_ps(_mm256_mul_ps(vt1, vp1), vs1);
140 const __m256 ve2 = _mm256_add_ps(_mm256_mul_ps(vt2, vp2), vs2);
141 const __m256 ve3 = _mm256_add_ps(_mm256_mul_ps(vt3, vp3), vs3);
142 const __m256 ve4 = _mm256_add_ps(_mm256_mul_ps(vt4, vp4), vs4);
143 const __m256 ve5 = _mm256_add_ps(_mm256_mul_ps(vt5, vp5), vs5);
144
145 const __m256 vd0 = _mm256_add_ps(ve0, vone);
146 const __m256 vd1 = _mm256_add_ps(ve1, vone);
147 const __m256 vd2 = _mm256_add_ps(ve2, vone);
148 const __m256 vd3 = _mm256_add_ps(ve3, vone);
149 const __m256 vd4 = _mm256_add_ps(ve4, vone);
150 const __m256 vd5 = _mm256_add_ps(ve5, vone);
151
152 __m256 vr0 = _mm256_rcp_ps(vd0);
153 __m256 vr1 = _mm256_rcp_ps(vd1);
154 __m256 vr2 = _mm256_rcp_ps(vd2);
155 __m256 vr3 = _mm256_rcp_ps(vd3);
156 __m256 vr4 = _mm256_rcp_ps(vd4);
157 __m256 vr5 = _mm256_rcp_ps(vd5);
158
159 vr0 = _mm256_mul_ps(vr0, _mm256_sub_ps(vtwo, _mm256_mul_ps(vr0, vd0)));
160 vr0 = _mm256_mul_ps(vr0, _mm256_sub_ps(vtwo, _mm256_mul_ps(vr0, vd0)));
161 vr1 = _mm256_mul_ps(vr1, _mm256_sub_ps(vtwo, _mm256_mul_ps(vr1, vd1)));
162 vr1 = _mm256_mul_ps(vr1, _mm256_sub_ps(vtwo, _mm256_mul_ps(vr1, vd1)));
163 vr2 = _mm256_mul_ps(vr2, _mm256_sub_ps(vtwo, _mm256_mul_ps(vr2, vd2)));
164 vr2 = _mm256_mul_ps(vr2, _mm256_sub_ps(vtwo, _mm256_mul_ps(vr2, vd2)));
165 vr3 = _mm256_mul_ps(vr3, _mm256_sub_ps(vtwo, _mm256_mul_ps(vr3, vd3)));
166 vr3 = _mm256_mul_ps(vr3, _mm256_sub_ps(vtwo, _mm256_mul_ps(vr3, vd3)));
167 vr4 = _mm256_mul_ps(vr4, _mm256_sub_ps(vtwo, _mm256_mul_ps(vr4, vd4)));
168 vr4 = _mm256_mul_ps(vr4, _mm256_sub_ps(vtwo, _mm256_mul_ps(vr4, vd4)));
169 vr5 = _mm256_mul_ps(vr5, _mm256_sub_ps(vtwo, _mm256_mul_ps(vr5, vd5)));
170 vr5 = _mm256_mul_ps(vr5, _mm256_sub_ps(vtwo, _mm256_mul_ps(vr5, vd5)));
171
172 __m256 vf0 = _mm256_mul_ps(ve0, vr0);
173 __m256 vf1 = _mm256_mul_ps(ve1, vr1);
174 __m256 vf2 = _mm256_mul_ps(ve2, vr2);
175 __m256 vf3 = _mm256_mul_ps(ve3, vr3);
176 __m256 vf4 = _mm256_mul_ps(ve4, vr4);
177 __m256 vf5 = _mm256_mul_ps(ve5, vr5);
178
179 vf0 = _mm256_andnot_ps(_mm256_cmp_ps(vz0, vdenorm_cutoff, _CMP_LT_OS), vf0);
180 vf1 = _mm256_andnot_ps(_mm256_cmp_ps(vz1, vdenorm_cutoff, _CMP_LT_OS), vf1);
181 vf2 = _mm256_andnot_ps(_mm256_cmp_ps(vz2, vdenorm_cutoff, _CMP_LT_OS), vf2);
182 vf3 = _mm256_andnot_ps(_mm256_cmp_ps(vz3, vdenorm_cutoff, _CMP_LT_OS), vf3);
183 vf4 = _mm256_andnot_ps(_mm256_cmp_ps(vz4, vdenorm_cutoff, _CMP_LT_OS), vf4);
184 vf5 = _mm256_andnot_ps(_mm256_cmp_ps(vz5, vdenorm_cutoff, _CMP_LT_OS), vf5);
185
186 vf0 = _mm256_blendv_ps(_mm256_sub_ps(vone, vf0), vf0, vx0);
187 vf1 = _mm256_blendv_ps(_mm256_sub_ps(vone, vf1), vf1, vx1);
188 vf2 = _mm256_blendv_ps(_mm256_sub_ps(vone, vf2), vf2, vx2);
189 vf3 = _mm256_blendv_ps(_mm256_sub_ps(vone, vf3), vf3, vx3);
190 vf4 = _mm256_blendv_ps(_mm256_sub_ps(vone, vf4), vf4, vx4);
191 vf5 = _mm256_blendv_ps(_mm256_sub_ps(vone, vf5), vf5, vx5);
192
193 _mm256_storeu_ps(y, vf0);
194 _mm256_storeu_ps(y + 8, vf1);
195 _mm256_storeu_ps(y + 16, vf2);
196 _mm256_storeu_ps(y + 24, vf3);
197 _mm256_storeu_ps(y + 32, vf4);
198 _mm256_storeu_ps(y + 40, vf5);
199 y += 48;
200 }
201 for (; n >= 8 * sizeof(float); n -= 8 * sizeof(float)) {
202 const __m256 vx = _mm256_loadu_ps(x);
203 x += 8;
204
205 const __m256 vz = _mm256_or_ps(vx, vsign_mask);
206
207 __m256 vn = _mm256_add_ps(_mm256_mul_ps(vz, vlog2e), vmagic_bias);
208
209 const __m128 vs_lo = _mm_castsi128_ps(_mm_slli_epi32(_mm_castps_si128(_mm256_castps256_ps128(vn)), 23));
210 const __m128 vs_hi = _mm_castsi128_ps(_mm_slli_epi32(_mm_castps_si128(_mm256_extractf128_ps(vn, 1)), 23));
211 const __m256 vs = _mm256_insertf128_ps(_mm256_castps128_ps256(vs_lo), vs_hi, 1);
212
213 vn = _mm256_sub_ps(vn, vmagic_bias);
214
215 __m256 vt = _mm256_add_ps(_mm256_mul_ps(vn, vminus_ln2_hi), vz);
216 vt = _mm256_add_ps(_mm256_mul_ps(vn, vminus_ln2_lo), vt);
217
218 __m256 vp = _mm256_add_ps(_mm256_mul_ps(vc5, vt), vc4);
219 vp = _mm256_add_ps(_mm256_mul_ps(vp, vt), vc3);
220 vp = _mm256_add_ps(_mm256_mul_ps(vp, vt), vc2);
221 vp = _mm256_add_ps(_mm256_mul_ps(vp, vt), vc1);
222
223 vt = _mm256_mul_ps(vt, vs);
224 const __m256 ve = _mm256_add_ps(_mm256_mul_ps(vt, vp), vs);
225
226 const __m256 vd = _mm256_add_ps(ve, vone);
227 __m256 vr = _mm256_rcp_ps(vd);
228 vr = _mm256_mul_ps(vr, _mm256_sub_ps(vtwo, _mm256_mul_ps(vr, vd)));
229 vr = _mm256_mul_ps(vr, _mm256_sub_ps(vtwo, _mm256_mul_ps(vr, vd)));
230 __m256 vf = _mm256_mul_ps(ve, vr);
231
232 vf = _mm256_andnot_ps(_mm256_cmp_ps(vz, vdenorm_cutoff, _CMP_LT_OS), vf);
233 vf = _mm256_blendv_ps(_mm256_sub_ps(vone, vf), vf, vx);
234
235 _mm256_storeu_ps(y, vf);
236 y += 8;
237 }
238 if XNN_UNLIKELY(n != 0) {
239 assert(n >= 1 * sizeof(float));
240 assert(n <= 7 * sizeof(float));
241 const __m256i vmask = _mm256_loadu_si256((const __m256i*) ((uintptr_t) ¶ms->avx_rr2_p5.mask_table[7] - n));
242
243 const __m256 vx = _mm256_maskload_ps(x, vmask);
244
245 const __m256 vz = _mm256_or_ps(vx, vsign_mask);
246
247 __m256 vn = _mm256_add_ps(_mm256_mul_ps(vz, vlog2e), vmagic_bias);
248 const __m128 vs_lo = _mm_castsi128_ps(_mm_slli_epi32(_mm_castps_si128(_mm256_castps256_ps128(vn)), 23));
249 const __m128 vs_hi = _mm_castsi128_ps(_mm_slli_epi32(_mm_castps_si128(_mm256_extractf128_ps(vn, 1)), 23));
250 const __m256 vs = _mm256_insertf128_ps(_mm256_castps128_ps256(vs_lo), vs_hi, 1);
251
252 vn = _mm256_sub_ps(vn, vmagic_bias);
253
254 __m256 vt = _mm256_add_ps(_mm256_mul_ps(vn, vminus_ln2_hi), vz);
255 vt = _mm256_add_ps(_mm256_mul_ps(vn, vminus_ln2_lo), vt);
256
257 __m256 vp = _mm256_add_ps(_mm256_mul_ps(vc5, vt), vc4);
258 vp = _mm256_add_ps(_mm256_mul_ps(vp, vt), vc3);
259 vp = _mm256_add_ps(_mm256_mul_ps(vp, vt), vc2);
260 vp = _mm256_add_ps(_mm256_mul_ps(vp, vt), vc1);
261
262 vt = _mm256_mul_ps(vt, vs);
263 const __m256 ve = _mm256_add_ps(_mm256_mul_ps(vt, vp), vs);
264
265 const __m256 vd = _mm256_add_ps(ve, vone);
266 __m256 vr = _mm256_rcp_ps(vd);
267 vr = _mm256_mul_ps(vr, _mm256_sub_ps(vtwo, _mm256_mul_ps(vr, vd)));
268 vr = _mm256_mul_ps(vr, _mm256_sub_ps(vtwo, _mm256_mul_ps(vr, vd)));
269 __m256 vf = _mm256_mul_ps(ve, vr);
270
271 vf = _mm256_andnot_ps(_mm256_cmp_ps(vz, vdenorm_cutoff, _CMP_LT_OS), vf);
272 vf = _mm256_blendv_ps(_mm256_sub_ps(vone, vf), vf, vx);
273
274 __m128 vf_lo = _mm256_castps256_ps128(vf);
275 if (n & (4 * sizeof(float))) {
276 _mm_storeu_ps(y, vf_lo);
277 vf_lo = _mm256_extractf128_ps(vf, 1);
278 y += 4;
279 }
280 if (n & (2 * sizeof(float))) {
281 _mm_storel_pi((__m64*) y, vf_lo);
282 vf_lo = _mm_movehl_ps(vf_lo, vf_lo);
283 y += 2;
284 }
285 if (n & (1 * sizeof(float))) {
286 _mm_store_ss(y, vf_lo);
287 }
288 }
289 }
290